JP3168091B2 - Three-dimensional circuit formation method - Google Patents

Three-dimensional circuit formation method

Info

Publication number
JP3168091B2
JP3168091B2 JP2851693A JP2851693A JP3168091B2 JP 3168091 B2 JP3168091 B2 JP 3168091B2 JP 2851693 A JP2851693 A JP 2851693A JP 2851693 A JP2851693 A JP 2851693A JP 3168091 B2 JP3168091 B2 JP 3168091B2
Authority
JP
Japan
Prior art keywords
dimensional circuit
forming
substrate
dimensional
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2851693A
Other languages
Japanese (ja)
Other versions
JPH0623855A (en
Inventor
俊之 鈴木
良幸 内野々
勲二 中嶋
啓明 北村
策雄 鎌田
隆児 大谷
剛 岡本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP2851693A priority Critical patent/JP3168091B2/en
Publication of JPH0623855A publication Critical patent/JPH0623855A/en
Application granted granted Critical
Publication of JP3168091B2 publication Critical patent/JP3168091B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0284Details of three-dimensional rigid printed circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0002Apparatus or processes for manufacturing printed circuits for manufacturing artworks for printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0073Masks not provided for in groups H05K3/02 - H05K3/46, e.g. for photomechanical production of patterned surfaces
    • H05K3/0082Masks not provided for in groups H05K3/02 - H05K3/46, e.g. for photomechanical production of patterned surfaces characterised by the exposure method of radiation-sensitive masks

Landscapes

  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、立体状の回路基板に所
要の回路パターンを3次元的に形成してなる立体回路形
成方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a three-dimensional circuit by forming a required circuit pattern three-dimensionally on a three-dimensional circuit board.

【0002】[0002]

【従来の技術】立体回路基板等の3次元的部材に対する
立体配線パターンを形成する方法には、2ショット法等
によるフルアディティブ法や、予めフィルムに2次元的
に回路を形成し、成形型内で金型に沿った形状に転写す
ることによる方法等が用いられている。しかし、パター
ンのファイン化、複雑な立体形状への転写等には限界が
あった。また、立体回路基板の回路面を有した立体回路
露光用マスクを用いた立体回路形成方法も提案されてい
るが、その例として、例えば特開平2−251959号
公報記載の技術が知られている。
2. Description of the Related Art A method for forming a three-dimensional wiring pattern for a three-dimensional member such as a three-dimensional circuit board includes a full-addition method such as a two-shot method or a method in which a circuit is formed two-dimensionally on a film in advance and a molding die is formed. For example, a method of transferring the image to a shape along a mold is used. However, there is a limit to fine patterning and transfer to a complicated three-dimensional shape. Further, a method of forming a three-dimensional circuit using a three-dimensional circuit exposure mask having a circuit surface of a three-dimensional circuit board has also been proposed. As an example, a technique described in, for example, JP-A-2-251959 is known. .

【0003】[0003]

【発明が解決しようとする課題】しかし、上記の従来技
術における光透過部は透光性樹脂を用いており、この部
分での光の吸収(特に紫外光)が若干有り、エネルギー
のロス、露光に有効な光の波長がカットされること、光
透光部樹脂の劣化等の問題がある。また、立体マスク透
明体は成形により作成されると考えられるが、このため
の金型が必要となり、更にマスクと立体回路形成基板の
回路面を完全に一致させるのは難しく、露光精度がおち
る等の課題を有している。この発明は斯かる課題を解決
するためになされたもので、その目的とするところは、
立体回路形成面と同一の面を有し、露光用光エネルギー
のロスと光透光部樹脂の劣化を防ぐことができる立体マ
スクを用いた立体回路形成方法を提供することにある。
However, the light transmitting portion in the above-mentioned prior art uses a translucent resin, and there is a slight absorption of light (particularly ultraviolet light) in this portion, which results in energy loss and light exposure. However, there is a problem that the effective wavelength of light is cut, and the resin of the light transmitting portion is deteriorated. Also, it is considered that the three-dimensional mask transparent body is made by molding, but a mold is required for this, and it is difficult to completely match the mask and the circuit surface of the three-dimensional circuit forming substrate, and the exposure accuracy is reduced. Have the following problems. The present invention has been made to solve such a problem, and the purpose thereof is to:
An object of the present invention is to provide a method for forming a three-dimensional circuit using a three-dimensional mask which has the same surface as the three-dimensional circuit formation surface and can prevent loss of light energy for exposure and deterioration of the light transmitting portion resin.

【0004】[0004]

【課題を解決するための手段】前記目的を達成するため
に、本発明は、立体回路形成基板の表面形状に合致した
立体回路露光用マスクを該基板上の感光層表面に密着さ
せて露光することにより立体回路を形成する立体回路形
成方法において、熱可塑性フィルムに熱および圧力を加
え、かつ立体回路形成基板の回路形成面に押しつけるこ
とにより立体回路形成基板の表面形状に成形した後、レ
ーザで光透過部をスリット状に開口させ、その後立体回
路形成基板より抜き取り、光透過部がスリット状に開口
している立体回路露光用マスクを用いて回路形成を行う
ことを特徴とする。
In order to achieve the above-mentioned object, the present invention provides a three-dimensional circuit exposure mask which conforms to the surface shape of a three-dimensional circuit forming substrate and is exposed to the surface of a photosensitive layer on the substrate. In the method of forming a three-dimensional circuit by forming a three-dimensional circuit by applying heat and pressure to the thermoplastic film, and pressing the thermoplastic film on the circuit forming surface of the three-dimensional circuit forming substrate to form the surface shape of the three-dimensional circuit forming substrate, and then using a laser The light-transmitting portion is opened in a slit shape, and thereafter, the light-transmitting portion is extracted from the substrate for forming a three-dimensional circuit, and the circuit is formed using a three-dimensional circuit exposure mask having the light-transmitting portion opened in a slit shape.

【0005】また、立体回路形成基板の表面形状に合致
した立体回路露光用マスクを該基板上の感光層表面に密
着させて露光することにより立体回路を形成する立体回
路形成方法において、光硬化性フィルムに熱および圧力
を加え、かつ立体回路形成基板の回路形成面に押しつけ
ることにより立体回路形成基板の表面形状に成形した
後、レーザで露光し樹脂を硬化させ、光遮蔽部を形成
し、かつ現像して、未露光部を除去して光透過部をスリ
ット状に開口させ、この後立体回路基板より抜き取り、
光透過部がスリット状に開口している立体回路露光用マ
スクを用いて回路形成を行うことを特徴とする。
Further, in a three-dimensional circuit forming method for forming a three-dimensional circuit by exposing a three-dimensional circuit exposure mask conforming to the surface shape of a three-dimensional circuit forming substrate to a photosensitive layer surface on the substrate and exposing the same, a photocurable After applying heat and pressure to the film and pressing it against the circuit forming surface of the three-dimensional circuit forming substrate to form it into the surface shape of the three-dimensional circuit forming substrate, it is exposed to laser light to cure the resin, forming a light shielding portion, and Developing, removing the unexposed part, opening the light transmitting part in a slit shape, and then extracting it from the three-dimensional circuit board,
The circuit is formed using a three-dimensional circuit exposure mask having a light-transmitting portion opened in a slit shape.

【0006】また、立体回路形成基板の表面形状に合致
した立体回路露光用マスクを該基板上の感光層表面に密
着させて露光することにより立体回路を形成する立体回
路形成方法において、形状記憶合金または形状記憶樹脂
を使用し、立体回路形成基板の形状を記憶させた後、平
板にもどしてスリット状に開口させて光透過部を形成
し、その後記憶させた立体形状にもどし、光透過部がス
リット状に開口している立体回路露光用マスクを用いて
回路形成を行うことを特徴とする。
In a three-dimensional circuit forming method for forming a three-dimensional circuit by exposing a three-dimensional circuit exposure mask conforming to the surface shape of a three-dimensional circuit forming substrate to a photosensitive layer surface of the substrate in close contact with the mask, the shape memory alloy Alternatively, using a shape memory resin, after storing the shape of the three-dimensional circuit forming substrate, returning to a flat plate and opening in a slit shape to form a light transmitting portion, and then returning to the stored three-dimensional shape, the light transmitting portion is The circuit is formed using a three-dimensional circuit exposure mask having a slit-like opening.

【0007】また、立体回路形成基板の表面形状に合致
した立体回路露光用マスクを該基板上の感光層表面に密
着させて露光することにより立体回路を形成する立体回
路形成方法において、光透過部がスリット状に開口して
いる部分は金属または積層板でマスクを作成し、凹凸の
ある部分はフィルムでマスクを作成した光透過部がスリ
ット状に開口している立体回路露光用マスクを用いて回
路形成を行うことを特徴とする。
In a three-dimensional circuit forming method for forming a three-dimensional circuit by exposing a three-dimensional circuit exposure mask conforming to the surface shape of a three-dimensional circuit formation substrate to a photosensitive layer surface of the substrate, and exposing the light, a light transmitting portion is provided. The mask is made of metal or laminated board for the part where the slit is opened, and the mask with the film is used for the part with the unevenness. A circuit is formed.

【0008】[0008]

【作用】前記構成により本発明においては立体回路基板
と同じ形状を有した立体回路露光用マスクを立体回路形
成基板に隙間なく密着し(完全に一致し)、散乱光で露
光するので、平板面の回路形成と同様の回路形成ができ
る。また、従来のフィルムマスクの光透過部は透明樹脂
があるので250nm付近のUV光は吸収されてしまい
光硬化に必要な波長が透過しないために300nm以上
でも光硬化反応がおこる光重合開始剤をフォトレジスト
に添加している。本発明のマスクは光透過部がスリット
状に開口しているので、250nm付近のUV光は吸収
されず光硬化反応がおこるので光重合開始剤が不要であ
る。
According to the present invention, a three-dimensional circuit exposure mask having the same shape as the three-dimensional circuit substrate is closely adhered to the three-dimensional circuit forming substrate without any gap (completely coincides) and exposed with scattered light. The same circuit formation as that described above can be performed. In addition, since the light transmitting portion of the conventional film mask has a transparent resin, UV light around 250 nm is absorbed and a wavelength required for photocuring is not transmitted. It is added to the photoresist. In the mask of the present invention, since the light transmitting portion is opened in a slit shape, UV light near 250 nm is not absorbed and a photocuring reaction occurs, so that a photopolymerization initiator is unnecessary.

【0009】[0009]

【実施例】以下、図面に基づき本発明の好ましい実施例
を説明する。 (実施例1) 図1は立体回路露光用マスクの形成プロセスを示すもの
で、立体回路形成基板(成形品)9aを母型とし、必要
に応じて空気抜き又は真空引きできる穴(図示せず)を
あけておく、図1(a)のように母型となる成形品9a
の上部に熱可塑性フィルム29を設置し、図1(b)の
ごとく熱可塑性フィルム29に熱と圧力を加え、必要に
応じて母型9a側を真空にすることによりフィルム29
を母型となる成形品9aに密着成形させる。さらに図1
(c)のごとくエキシマレーザ30により、回路パター
ン(光透過部)31を穴開け加工する。フィルム29が
光透過性(紫外光透過性)の場合は無電解めっき、スパ
ッタリング等の金属化処理、又は光遮光性材料のコーテ
ィング等により光遮光性をもたせる。次に図1(d)の
ように母型9aから成形フィルム29を抜きとり立体回
路露光用マスク6が完成する。スリット状開口部31も
同時に完成する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings. Example 1 FIG. 1 shows a process for forming a mask for three-dimensional circuit exposure, in which a three-dimensional circuit forming substrate (molded product) 9a is used as a matrix, and holes (not shown) through which air can be vented or evacuated as necessary. The molded product 9a serving as a matrix as shown in FIG.
A thermoplastic film 29 is placed on top of the film 29, and heat and pressure are applied to the thermoplastic film 29 as shown in FIG.
Is molded in close contact with a molded article 9a to be a matrix. Further FIG.
As shown in (c), a circuit pattern (light transmitting portion) 31 is punched by an excimer laser 30. When the film 29 is light-transmissive (ultraviolet light-transmissive), light-shielding properties are imparted by electroless plating, metallization such as sputtering, or coating of a light-shielding material. Next, as shown in FIG. 1D, the molded film 29 is removed from the matrix 9a to complete the three-dimensional circuit exposure mask 6. The slit-shaped opening 31 is also completed at the same time.

【0010】次に、図2は立体回路の形成プロセスを示
す。立体回路の形成方法は、図2(a)のような成形品
(立体回路形成基板)9aに、図2(b)のように導電
性を付与する。導電性を付与する方法は、無電解めっき
又は無電解めっき+電解めっき、あるいはスパッタ、真
空蒸着等により銅、ニッケル、アルミ等の導電層9bを
形成する。そして、図2(c)のように、フォトレジス
ト9cを電着法、スプレー法、ディッピング法等により
塗布し、先に説明した立体回路露光用マスク6を密着さ
せ散乱光により露光(図2(d))、現像(図2
(e))、エッチング、ハクリ工程(図2(f))をへ
て立体回路配線板9を完成させる。
Next, FIG. 2 shows a process of forming a three-dimensional circuit. In the method of forming a three-dimensional circuit, a molded article (three-dimensional circuit forming substrate) 9a as shown in FIG. 2A is given conductivity as shown in FIG. 2B. As a method for imparting conductivity, a conductive layer 9b of copper, nickel, aluminum, or the like is formed by electroless plating or electroless plating + electrolytic plating, sputtering, vacuum deposition, or the like. Then, as shown in FIG. 2C, a photoresist 9c is applied by an electrodeposition method, a spray method, a dipping method or the like, and the mask 6 for three-dimensional circuit exposure described above is brought into close contact with the photoresist 9c and exposed by scattered light (FIG. d)), development (FIG. 2)
(E)), the etching and the removing process (FIG. 2 (f)) are completed to complete the three-dimensional circuit wiring board 9.

【0011】(実施例2) 図3は立体回路露光用マスクの形成プロセスを示すもの
で、立体回路形成基板(成形品)9aを母型とし、必要
に応じて空気抜き又は真空引きできる穴(図示せず)を
あけておく。図3(a)のように母型となる成形品9a
の上部に光硬化性フィルム32を設置し、図3(b)の
ごとく熱と圧力を加え、必要に応じて母型となる成形品
9a側から真空引きすることによりフィルム32を母型
となる成形品9aに密着成形させる。又は図3(a1)
のように光硬化性液状樹脂(例えばポリイミド)33を
母型となる成形品9aにスプレー33aでコーティング
することにより図3(b1)のように成形フィルム化す
る。さらに図3(c)のごとくレーザ光34等を用いて
回路パターンを直接露光、現像することにより光硬化性
フィルム32の回路パターン31を形成する(回路パタ
ーンは光透過部でスリット状の開口部31)、光硬化部
が光透過性(紫外光透過性)の場合は実施例1と同様に
光遮光化処理をする。次に図3(d)のように成形品9
aから成形フィルム32を抜きとり立体回路露光用マス
ク6及び開口部31が完成する。立体回路の形成プロセ
スは実施例1と同様である。
(Embodiment 2) FIG. 3 shows a process for forming a mask for three-dimensional circuit exposure, in which a three-dimensional circuit forming substrate (molded product) 9a is used as a matrix, and holes or holes for bleeding air or evacuating (FIG. (Not shown). As shown in FIG. 3A, a molded product 9a to be a matrix
The photo-curable film 32 is placed on the upper part of the substrate, and heat and pressure are applied as shown in FIG. 3 (b), and if necessary, the film 32 is turned into a matrix by evacuating the molded article 9a to be a matrix. It is closely molded to the molded product 9a. Or FIG. 3 (a1)
The photocurable liquid resin (for example, polyimide) 33 is coated on the molded article 9a serving as a matrix with a spray 33a as shown in FIG. Further, as shown in FIG. 3C, the circuit pattern is directly exposed and developed using a laser beam 34 or the like to form a circuit pattern 31 of the photocurable film 32 (the circuit pattern is a slit-shaped opening at the light transmitting portion). 31) If the light-cured portion is light-transmissive (ultraviolet light-transmissive), light-shielding treatment is performed as in the first embodiment. Next, as shown in FIG.
The molded film 32 is removed from the mask a, and the three-dimensional circuit exposure mask 6 and the opening 31 are completed. The formation process of the three-dimensional circuit is the same as that of the first embodiment.

【0012】(実施例3) 図4は立体回路露光用マスクの形成プロセスを示す。ま
ず図4(a)に示すように成形品(立体回路形成基板)
9aを母型とし、その母型となる成形品9aの回路形成
面に、形状記憶合金35または形状記憶樹脂を用いて熱
と圧力で形状を記憶させる。記憶させた後、図4(b)
に示すように平板に戻す。その後、図4(c)に示すよ
うにレーザ光34を使用して、光透過部にスリット状の
開口部31を形成するために金属または樹脂を除去す
る。または図4(d)に示すように一般のエッチング方
法と同様にエッチングレジスト36を形成する。エッチ
ングレジスト36の形成方法としてはエッチングレジス
ト36をスクリーン印刷する方法、液状レジストまたは
ドライフィルムを形成して露光・現像で形成する方法等
がある。次に図4(e)に示すように例えば塩化第2鉄
エッチング溶液を用いてレジスト36で覆われていない
部分の金属を除去する。このエッチング液は形状記憶合
金35の場合、例えば酸等この金属が溶ける溶液であれ
ば何でも良い。形状記憶樹脂の場合、例えばDMF等の
溶剤でこの樹脂が溶ける溶液であれば何でも良い。次に
図4(f)に示すようにスリット状の開口部31を形成
した平板の形状記憶合金35または形状記憶樹脂に熱等
をかけて記憶した形状にもどす。図4(g)に示すよう
に立体回路露光用マスク6が完成する。同時にスリット
状の開口部(光透過部)31も完成する。立体回路の形
成プロセスは実施例1と同様である。
Embodiment 3 FIG. 4 shows a process for forming a mask for three-dimensional circuit exposure. First, as shown in FIG. 4A, a molded product (three-dimensional circuit forming substrate)
9a is used as a mother die, and the shape is memorized by heat and pressure using a shape memory alloy 35 or a shape memory resin on the circuit forming surface of the molded article 9a serving as the master. After storing, FIG.
Return to flat plate as shown. Thereafter, as shown in FIG. 4C, the metal or resin is removed by using the laser light 34 to form the slit-shaped opening 31 in the light transmitting portion. Alternatively, as shown in FIG. 4D, an etching resist 36 is formed in the same manner as a general etching method. As a method of forming the etching resist 36, there are a method of screen-printing the etching resist 36, a method of forming a liquid resist or a dry film and exposing and developing the same. Next, as shown in FIG. 4E, the metal not covered with the resist 36 is removed using, for example, a ferric chloride etching solution. In the case of the shape memory alloy 35, this etchant may be any solution that dissolves this metal such as an acid. In the case of a shape memory resin, any solution may be used as long as the resin is soluble in a solvent such as DMF. Next, as shown in FIG. 4 (f), the shape memory alloy 35 or the shape memory resin of the flat plate in which the slit-shaped opening 31 is formed is returned to the stored shape by applying heat or the like. As shown in FIG. 4G, a three-dimensional circuit exposure mask 6 is completed. At the same time, a slit-shaped opening (light transmitting portion) 31 is completed. The formation process of the three-dimensional circuit is the same as that of the first embodiment.

【0013】(実施例4) 図5に示すように立体回路露光用マスクの光透過部にあ
たる回路31aが成形品(立体回路形成基板)9aのフ
ラット部のみにある場合の立体回路露光用マスクの形成
プロセスを図5に示す。まず図6(a)に示すようにガ
ラスエポキシ基板36aにスリット状の開口部31を形
成する。ガラスエポキシ基板36aは金属板、積層板等
を用いる。スリット状の開口部31の形成方法はエッチ
ングレジスト37を形成してエッチング除去する方法
(図6(e))、レーザ光34での除去加工する方法
(図6(f))等がある。次に図6(b)に示すように
例えば18μmのポリイミドフィルム37aの成形品
(立体回路形成基板)9aのフラット部つまりガラスエ
ポキシ基板36aを載せる部分にガラスエポキシ基板3
6aより少し小さい穴39を開ける。その後、図6
(c)に示すようにこのガラスエポキシ基板36aをポ
リイミドフィルム37aの穴39の開いた部分に載せて
接着させる。さらに、図6(d)に示すようにこのポリ
イミドフィルムを含有したガラスエポキシ基板40、す
なわちポリイミドフィルムに固い基板を設け、固い部分
と可撓性を有する部分を併せ持つ部材を熱、圧力で成形
品(立体回路形成基板)9aにガラスエポキシ基板36
aがそのフラット部に位置するように密着させる。
(Embodiment 4) As shown in FIG. 5, there is provided a three-dimensional circuit exposure mask in which a circuit 31a corresponding to a light transmitting portion of the three-dimensional circuit exposure mask is provided only on a flat part of a molded product (three-dimensional circuit forming substrate) 9a. The formation process is shown in FIG. First, as shown in FIG. 6A, a slit-shaped opening 31 is formed in a glass epoxy substrate 36a. The glass epoxy substrate 36a uses a metal plate, a laminated plate, or the like. The method of forming the slit-shaped opening 31 includes a method of forming an etching resist 37 and removing it by etching (FIG. 6E), and a method of removing and processing with a laser beam 34 (FIG. 6F). Next, as shown in FIG. 6B, the glass epoxy substrate 3 is placed on a flat portion of a molded product (three-dimensional circuit forming substrate) 9a of, for example, an 18 μm polyimide film 37a, that is, a portion on which the glass epoxy substrate 36a is placed.
Drill a hole 39 slightly smaller than 6a. Then, FIG.
As shown in (c), the glass epoxy substrate 36a is placed on the portion of the polyimide film 37a where the hole 39 is opened, and bonded. Further, as shown in FIG. 6 (d), a glass epoxy substrate 40 containing this polyimide film, that is, a hard substrate is provided on the polyimide film, and a member having both a hard portion and a flexible portion is molded by heat and pressure. (Three-dimensional circuit forming substrate) 9a glass epoxy substrate 36
a so as to be positioned on the flat portion.

【0014】[0014]

【発明の効果】この発明は、以上説明した通り立体露光
用マスク形成のための金型が不要であり、又、光透過部
は透明樹脂等が存在しないでスリット状に開口している
か、またはマスク間を連結する光透過に支障ない程度の
連結部が設けられているため、露光用光エネルギーがこ
の部分で吸収されることもなく、ロスがないため露光時
間も短くすることができる。
According to the present invention, as described above, a mold for forming a mask for three-dimensional exposure is unnecessary, and the light transmitting portion is opened in a slit shape without the presence of a transparent resin or the like. Since a connecting portion for connecting the masks is provided so as not to hinder the light transmission, the light energy for exposure is not absorbed in this portion, and there is no loss, so that the exposure time can be shortened.

【図面の簡単な説明】[Brief description of the drawings]

【図1】(a)〜(d)は立体回路露光用マスクの形成
プロセスの説明図である。
FIGS. 1A to 1D are explanatory views of a process for forming a mask for three-dimensional circuit exposure.

【図2】(a)〜(f)は立体回路形成プロセスの一例
を示す。
FIGS. 2A to 2F show an example of a three-dimensional circuit forming process.

【図3】(a)〜(d),(a1)(b1)は立体回路
露光用マスクの形成プロセスの説明図である。
3 (a) to 3 (d), (a1) and (b1) are explanatory views of a process for forming a mask for three-dimensional circuit exposure.

【図4】(a)〜(g)は立体回路露光用マスクの形成
プロセスの説明図である。
FIGS. 4A to 4G are explanatory views of a process of forming a mask for three-dimensional circuit exposure.

【図5】立体回路配線板の断面図である。FIG. 5 is a sectional view of a three-dimensional circuit wiring board.

【図6】(a)〜(f)は立体回路露光用マスクの形成
プロセスの説明図である。
FIGS. 6A to 6F are explanatory views of a process of forming a mask for three-dimensional circuit exposure.

【符号の説明】[Explanation of symbols]

6、10 立体回路露光用マスク 9 立体回路配線板 9a 成形品(立体回路形成基板) 9c、36 フォトレジスト 18 凹凸部 34 レーザ光 29 熱可塑性フィルム 30 エキシマレーザ 32 光硬化性フィルム 35 形状記憶合金 36a ガラスエポキシ基板 37a ポリイミドフィルム 6, 10 Three-dimensional circuit exposure mask 9 Three-dimensional circuit wiring board 9a Molded product (three-dimensional circuit forming substrate) 9c, 36 Photoresist 18 Irregularities 34 Laser light 29 Thermoplastic film 30 Excimer laser 32 Photocurable film 35 Shape memory alloy 36a Glass epoxy board 37a Polyimide film

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI H05K 3/18 H05K 3/18 D (72)発明者 北村 啓明 大阪府門真市大字門真1048番地 松下電 工株式会社内 (72)発明者 鎌田 策雄 大阪府門真市大字門真1048番地 松下電 工株式会社内 (72)発明者 大谷 隆児 大阪府門真市大字門真1048番地 松下電 工株式会社内 (72)発明者 岡本 剛 大阪府門真市大字門真1048番地 松下電 工株式会社内 (56)参考文献 特開 昭54−27367(JP,A) 特開 昭54−27368(JP,A) 特開 平2−111528(JP,A) 特開 平2−251959(JP,A) (58)調査した分野(Int.Cl.7,DB名) H05K 3/00 ────────────────────────────────────────────────── ─── Continued on the front page (51) Int.Cl. 7 Identification symbol FI H05K 3/18 H05K 3/18 D (72) Inventor Hiroaki Kitamura 1048 Ojidoma, Kadoma City, Osaka Prefecture Matsushita Electric Works, Ltd. (72 Inventor Norio Kamata 1048 Odakadoma, Kadoma, Osaka Prefecture Inside Matsushita Electric Works Co., Ltd. 1048 Kadoma, Ichidai-shi Matsushita Electric Works, Ltd. (56) References JP-A-54-27367 (JP, A) JP-A-54-27368 (JP, A) JP-A-2-111528 (JP, A) Kaihei 2-251959 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H05K 3/00

Claims (4)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 立体回路形成基板の表面形状に合致した
立体回路露光用マスクを該基板上の感光層表面に密着さ
せて露光することにより立体回路を形成する立体回路形
成方法において、 熱可塑性フィルムに熱および圧力を加え、かつ立体回路
形成基板の回路形成面に押しつけることにより立体回路
形成基板の表面形状に成形した後、レーザで光透過部を
スリット状に開口させ、その後立体回路形成基板より抜
き取り、光透過部がスリット状に開口している立体回路
露光用マスクを用いて回路形成を行うことを特徴とする
立体回路形成方法。
1. A three-dimensional circuit forming method for forming a three-dimensional circuit by exposing a three-dimensional circuit exposure mask conforming to the surface shape of a three-dimensional circuit forming substrate to the surface of a photosensitive layer on the substrate so as to form a three-dimensional circuit. After applying heat and pressure to the substrate and pressing it against the circuit forming surface of the three-dimensional circuit forming substrate to form it into the surface shape of the three-dimensional circuit forming substrate, the light transmitting portion is opened in a slit shape with a laser, and then from the three-dimensional circuit forming substrate. A method of forming a three-dimensional circuit, wherein a circuit is formed using a three-dimensional circuit exposure mask in which a light-transmitting portion is opened in a slit shape.
【請求項2】 立体回路形成基板の表面形状に合致した
立体回路露光用マスクを該基板上の感光層表面に密着さ
せて露光することにより立体回路を形成する立体回路形
成方法において、 光硬化性フィルムに熱および圧力を加え、かつ立体回路
形成基板の回路形成面に押しつけることにより立体回路
形成基板の表面形状に成形した後、レーザで露光し樹脂
を硬化させ、光遮蔽部を形成し、かつ現像して、未露光
部を除去して光透過部をスリット状に開口させ、この後
立体回路形成基板より抜き取り、光透過部がスリット状
に開口している立体回路露光用マスクを用いて回路形成
を行うことを特徴とする立体回路形成方法。
2. A three-dimensional circuit forming method for forming a three-dimensional circuit by exposing a three-dimensional circuit exposure mask conforming to the surface shape of a three-dimensional circuit forming substrate to a photosensitive layer surface of the substrate in close contact with the photosensitive layer. After applying heat and pressure to the film and pressing it against the circuit forming surface of the three-dimensional circuit forming substrate to form it into the surface shape of the three-dimensional circuit forming substrate, it is exposed to laser light to cure the resin, forming a light shielding portion, and After developing, the unexposed portion is removed, the light transmitting portion is opened in a slit shape, and thereafter, the light transmitting portion is extracted from the three-dimensional circuit forming substrate, and the circuit is formed using a three-dimensional circuit exposure mask in which the light transmitting portion is opened in a slit shape. A method for forming a three-dimensional circuit, wherein the method is performed.
【請求項3】 立体回路形成基板の表面形状に合致した
立体回路露光用マスクを該基板上の感光層表面に密着さ
せて露光することにより立体回路を形成する立体回路形
成方法において、 形状記憶合金または形状記憶樹脂を使用し、立体回路形
成基板の形状を記憶させた後、平板にもどしてスリット
状に開口させて光透過部を形成し、その後記憶させた立
体形状にもどし、光透過部がスリット状に開口している
立体回路露光用マスクを用いて回路形成を行うことを特
徴とする立体回路形成方法。
3. A three-dimensional circuit forming method for forming a three-dimensional circuit by exposing a three-dimensional circuit exposure mask conforming to the surface shape of a three-dimensional circuit formation substrate to a photosensitive layer surface of the substrate in close contact with the mask, and comprising: Alternatively, using a shape memory resin, after storing the shape of the three-dimensional circuit forming substrate, returning to a flat plate and opening in a slit shape to form a light transmitting portion, and then returning to the stored three-dimensional shape, the light transmitting portion is A method of forming a three-dimensional circuit, comprising forming a circuit using a three-dimensional circuit exposure mask having a slit-like opening.
【請求項4】 立体回路形成基板の表面形状に合致した
立体回路露光用マスクを該基板上の感光層表面に密着さ
せて露光することにより立体回路を形成する立体回路形
成方法において、 光透過部がスリット状に開口している部分は金属または
積層板でマスクを作成し、凹凸のある部分はフィルムで
マスクを作成した光透過部がスリット状に開口している
立体回路露光用マスクを用いて回路形成を行うことを特
徴とする立体回路形成方法。
4. A three-dimensional circuit forming method for forming a three-dimensional circuit by exposing a three-dimensional circuit exposure mask conforming to the surface shape of a three-dimensional circuit formation substrate to a photosensitive layer surface of the substrate and exposing the light to a light transmitting portion. The mask is made of metal or laminated board for the part where the slit is opened, and the mask with the film is used for the part with the unevenness. A method for forming a three-dimensional circuit, comprising forming a circuit.
JP2851693A 1992-03-24 1993-01-25 Three-dimensional circuit formation method Expired - Fee Related JP3168091B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2851693A JP3168091B2 (en) 1992-03-24 1993-01-25 Three-dimensional circuit formation method

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP9718892 1992-03-24
JP4-97188 1992-03-24
JP2851693A JP3168091B2 (en) 1992-03-24 1993-01-25 Three-dimensional circuit formation method

Publications (2)

Publication Number Publication Date
JPH0623855A JPH0623855A (en) 1994-02-01
JP3168091B2 true JP3168091B2 (en) 2001-05-21

Family

ID=26366622

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2851693A Expired - Fee Related JP3168091B2 (en) 1992-03-24 1993-01-25 Three-dimensional circuit formation method

Country Status (1)

Country Link
JP (1) JP3168091B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9972781B2 (en) 2015-04-30 2018-05-15 Samsung Display Co., Ltd. Method of manufacturing mask and method of manufacturing display device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016090795A (en) * 2014-11-04 2016-05-23 株式会社豊光社 Circuit pattern formation method, photomask, photomask production method, and production method of electric electronic apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9972781B2 (en) 2015-04-30 2018-05-15 Samsung Display Co., Ltd. Method of manufacturing mask and method of manufacturing display device

Also Published As

Publication number Publication date
JPH0623855A (en) 1994-02-01

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