JP3127866B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to the manufacture of semiconductor devices.
The present invention relates to a technique of a method , and particularly to a technique of manufacturing a capacitive insulating film of a semiconductor device having a capacitor .

[0002]

2. Description of the Related Art Conventionally, a silicon oxide film / silicon nitride film structure has been used as a capacitive insulating film. This is because the leakage current can be suppressed by forming an oxide film on the surface of the nitride film. This is described as a reference in “ Semiconductor Research P.17 ”.

A method of manufacturing a capacitive element will be described with reference to FIGS.

[0004] First, a field oxide film 202 is formed in a device isolation region on the surface of a P-type silicon substrate 201.
A gate oxide film 203 is formed. After forming the gate electrode 204 also serving as a gate line, an N-type diffusion layer 205 and an N-type diffusion layer 206 serving as source / drain regions are formed by ion implantation or the like.

Next, after depositing an interlayer insulating film 207 made of a silicon oxide based insulating film by a CVD (chemical vapor deposition) method, a bit line 208 is formed. Further, after depositing the interlayer insulating film 207, a contact hole is opened.

Next, after depositing a silicon film by LPCVD (Low Pressure Chemical Vapor Deposition), dry etching is performed using a photoresist film (not shown) as a mask to form a storage node electrode 209 (FIG. 6). ). Next, as shown in FIG. 7, a silicon nitride film 2 having a thickness of about 6 to 7 nm is formed.
10 is deposited by the LPCVD method.

Next, as shown in FIG. 8, the surface of the silicon nitride film is oxidized using a diffusion furnace,
Form one. The oxidation conditions at this time are 800-900 ° C.
And the thickness of the formed silicon oxide film 211 is 1 to 1.5 nm. Further, as shown in FIG. 9, the cell plate electrode 212 is formed, and the formation of the capacitor is completed.

[0008]

When oxidizing a nitride film as in the past, it is necessary to perform a heat treatment at a high temperature (800 to 900 ° C. or higher) for a long time (15 to 60 minutes). There is a problem that redistribution occurs, element isolation characteristics deteriorate, and yield decreases.

[0009] Accordingly, the present invention is to suppress the diffusion of impurities in the diffusion layer, yet, Ru <br/> to the purpose of forming a capacitor insulating film having a silicon oxide film / silicon nitride film structure.

[0010]

According to a first aspect of the present invention, there is provided:
The gist of the invention described in the table on the P-type silicon substrate (101) is as follows.
Field oxide film (102) is formed in the element isolation region on the surface
Then, a gate oxide film (103) is formed and
After forming the gate electrode (104) also serving as the
N-type diffusion layer that becomes source / drain region by implantation
Forming (105, 106) and chemical vapor deposition
The interlayer insulating film (1) made of silicon oxide based insulating film
07), a bit line (108) is formed,
After depositing the interlayer insulating film (107),
A hole in the hole, and a low pressure chemical vapor deposition method.
After the silicon film is deposited, the photoresist film is masked.
As dry-etched storage node electrode
Forming (109) and forming a film having a thickness of about 6 to 7 nm.
Silicon nitride film (110) is formed by low pressure chemical vapor deposition.
Depositing and reducing at temperatures between 500 and 550 ° C.
Pressure is about 1 to 1.5 nm by CVD.
Depositing a morphus silicon film (111);
The amorphous silicon film (111) is
Rapid in oxidizing atmosphere at 000 ° C for 20 to 40 seconds
Step of forming silicon oxide film (112) by performing thermal oxidation
And the step of forming the cell plate electrode (113)
Semiconductor element characterized by forming a capacitive element by performing
It lies in the method of manufacturing the child. Also, as described in claim 2 of the present invention.
The gist of the invention described in the table on the P-type silicon substrate (101) is as follows.
Field oxide film (102) is formed in the element isolation region on the surface
Then, a gate oxide film (103) is formed and
After forming the gate electrode (104) also serving as the
N-type diffusion layer that becomes source / drain region by implantation
Forming (105, 106) and chemical vapor deposition
The interlayer insulating film (1) made of silicon oxide based insulating film
07), a bit line (108) is formed,
After depositing the interlayer insulating film (107),
A hole in the hole, and a low pressure chemical vapor deposition method.
After the silicon film is deposited, the photoresist film is masked.
As dry-etched storage node electrode
Forming (109) and forming a film having a thickness of about 6 to 7 nm.
Silicon nitride film (110) is formed by low pressure chemical vapor deposition.
Depositing and reducing at temperatures between 500 and 550 ° C.
Pressure is about 1 to 1.5 nm by CVD.
Depositing a morphus silicon film (111);
The amorphous silicon film (111) is changed from 700 to 8
Oxidizing atmosphere at about 00 ° C for about 10 to 15 minutes
Oxidation to form a silicon oxide film (112).
And forming a cell / plate electrode (113)
Forming a capacitive element by performing a process
The present invention relates to a method for manufacturing a body element.

[0011] capacitor insulating film of the present invention are formed by depositing a silicon nitride film on the capacitor lower electrode, after depositing about 1~1.5nm amorphous silicon, amorphous
It is formed by oxidizing silicon . amorphous
Oxidation of silicon makes it possible to shorten the time required for heat treatment or to lower the temperature, thereby suppressing the diffusion of the diffusion layer.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A preferred embodiment of the present invention will be described below with reference to FIGS.

First, a field oxide film 102 is formed in a device isolation region on a surface of a P-type silicon substrate 101,
A gate oxide film 103 is formed. After forming the gate electrode 104 also serving as a gate line, N-type diffusion layers 105 and 106 serving as source / drain regions are formed by ion implantation or the like.

Next, after depositing an interlayer insulating film 107 made of a silicon oxide based insulating film by a CVD (chemical vapor deposition) method, a bit line 108 is formed. Further, after depositing the interlayer insulating film 107 , a contact hole is opened.

Next, after depositing a silicon film by LPCVD ( Low Pressure Chemical Vapor Deposition), dry etching is performed using a photoresist film (not shown) as a mask to form a storage node electrode 109 (FIG. 1). ).

Next, as shown in FIG.
A silicon nitride film 110 is deposited by the LPCVD method. Up to this point, it is the same as the conventional method shown in FIGS.

Next, as shown in FIG.
At 50 ° C., the film thickness is 1 to 1.5 n by the LPCVD method.
An amorphous silicon film 111 of about m is deposited. At this time, the amorphous silicon film is used because it is superior to polysilicon in terms of controllability in depositing a thin film (1 to 1.5 nm).

Next, as shown in FIG. 4, the amorpha
The silicon oxide film 112 is formed by performing rapid thermal oxidation of the silicon silicon film 111 in an oxidizing atmosphere at 800 to 1000 ° C. for 20 to 40 seconds.

Further, as shown in FIG. 5, a cell plate electrode 113 is formed, and the formation of the capacitor is completed.

In the above description, the oxidation is performed by the rapid oxidation method. However, the oxidation can be performed by using a diffusion furnace. In this case, after depositing amorphous silicon , oxidation is performed in an oxidizing atmosphere at a temperature of about 700 to 800 ° C. for 10 to 15 minutes.

[0021]

According to the present invention, when forming a capacitor insulating film having an oxide film / nitride film structure, conventionally, a temperature of 800 to 900.degree.
It takes a long-time heat treatment in minutes and a high temperature, but will happening redistribution of impurities in the diffusion layer, Amorufu in the present invention
The use of low-temperature silicon or the like makes it possible to shorten the heat treatment time or to lower the temperature, and it is possible to minimize the spread of the diffusion layer, thereby improving the yield.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view of a manufacturing process according to an embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view of a manufacturing process according to the embodiment of the present invention.

FIG. 3 is a schematic sectional view of a manufacturing process according to the embodiment of the present invention.

FIG. 4 is a schematic cross-sectional view of a manufacturing process according to the embodiment of the present invention.

FIG. 5 is a schematic sectional view of a manufacturing process according to the embodiment of the present invention.

FIG. 6 is a schematic cross-sectional view of a manufacturing process of a conventional capacitive element.

FIG. 7 is a schematic cross-sectional view of a manufacturing process of a conventional capacitive element.

FIG. 8 is a schematic cross-sectional view of a manufacturing process of a conventional capacitive element.

FIG. 9 is a schematic cross-sectional view of a manufacturing process of a conventional capacitive element.

[Explanation of symbols]

101, 201 P-type silicon substrate 102, 202 Field oxide film 103, 203 Gate oxide film 104, 204 Gate electrode 105, 106, 205, 206 N-type diffusion layer 107, 207 Interlayer insulating film 108, 208 Bit line 109, 209 Storage -Node electrode 110, 210 Silicon nitride film 111 Amorphous silicon film 112, 211 Silicon oxide film 113, 212 Cell plate electrode

──────────────────────────────────────────────────続 き Continued on the front page (58) Fields surveyed (Int. Cl. ⁷ , DB name) H01L 27/108 H01L 21/31 H01L 21/318 H01L 21/8242

Claims (2)

(57) [Claims] 1. The method according to claim 1 , wherein the surface of the P-type silicon substrate (101) is
Forming a field oxide film (102) in the element isolation region;
A gate oxide film (103) is formed and a gate line is formed.
After forming the gate electrode (104) also serving as
N-type diffusion layer (1
05, 106) and a silicon oxide-based insulating film formed by chemical vapor deposition.
After depositing the interlayer insulating film (107), the bit line (10
8) is formed, and the interlayer insulating film (107) is deposited.
Opening a contact hole , depositing a silicon film by low pressure chemical vapor deposition,
Dry etching using photoresist film as a mask
Forming the storage node electrode (109 ) and reducing the silicon nitride film (110) to a thickness of about 6 to 7 nm;
Depositing by a chemical vapor deposition method, and a low pressure chemical vapor deposition method at a temperature of 500 to 550 ° C.
Amorphous silicon with a thickness of about 1 to 1.5 nm
Depositing an amorphous silicon film (111);
Suddenly for 20 to 40 seconds in an oxidizing atmosphere at 1000 ° C.
Performing rapid thermal oxidation to form a silicon oxide film (112)
And a step of forming a cell / plate electrode (113).
Manufacturing a semiconductor element characterized by forming a capacitive element by
Construction method. 2. The method according to claim 1, further comprising the step of:
Forming a field oxide film (102) in the element isolation region;
A gate oxide film (103) is formed and a gate line is formed.
After forming the gate electrode (104) also serving as
N-type diffusion layer (1
05, 106); Consisting of silicon oxide based insulating film by chemical vapor deposition
After depositing the interlayer insulating film (107), the bit line (10
8) is formed, and the interlayer insulating film (107) is deposited.
After stacking, a step of opening a contact hole, After depositing a silicon film by low pressure chemical vapor deposition,
Dry etching using photoresist film as a mask
Forming a storage node electrode (109); The silicon nitride film (110) having a thickness of about 6 to 7 nm is reduced.
Depositing by chemical vapor deposition, At a temperature of 500 to 550 ° C., reduced pressure chemical vapor deposition
Amorphous silicon with a thickness of about 1 to 1.5 nm
Depositing a deposition film (111); The amorphous silicon film (111) is
Oxidizing atmosphere at about 800 ° C for about 10 to 15 minutes
Is performed to form a silicon oxide film (112)
The process of Performing a step of forming a cell plate electrode (113);
Manufacturing a semiconductor element characterized by forming a capacitive element by
Construction method.