JP3097180B2 - Correlated double sampling circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a correlated double sampling circuit, and more particularly to a correlated double sampling circuit for processing a two-dimensional CCD sensor output of a VTR camera.

[0002]

2. Description of the Related Art Conventional VTR cameras are NTSC, PA
The L, SECAM system is adopted, in which a correlated double sampling circuit for processing a two-dimensional CCD sensor output is used.

FIG. 2 is a diagram of a correlated double sampling circuit showing an example of such a conventional technique. As shown in FIG. 2, the conventional correlated double sampling circuit includes a two-dimensional CCD sensor 1 for inputting and detecting optical image information and a feed-through period of an output signal output from the two-dimensional CCD sensor 1 for a clock input terminal 10. A first feed-through clamp circuit 2 that clamps to a specific DC reference level with a clock timing from the first and a first sample and hold circuit 3 that samples and holds a video signal with a clock timing from a clock input terminal 11, The output of the first sample and hold circuit 3 is supplied to one of the differential inputs of the differential AGC amplifier 4. Further, the conventional correlated double sampling circuit has exactly the same configuration as the first feed-through clamp circuit 2 and the first sample-hold circuit 3 in order to supply a predetermined potential to the other input of the differential AGC amplifier 4. The second feed-through clamp circuit 8 and the second sample-and-hold circuit 9 are provided, and subtraction is performed by the differential AGC amplifier 4 from the clock input terminals 10 and 11, thereby removing sampling noise. Outputs video signal.

[0004]

The above conventional correlation 2
Since the double sampling circuit generates a reference signal to be input to the differential AGC amplifier from a specific DC reference level in the feedthrough clamp circuit, sampling noise due to an internal clock or the like can be removed. However, there is a disadvantage that it is not possible to remove the crosstalk noise mixed in the optical black (OB) period caused by the above.

An object of the present invention is to provide a correlation 2 which can also remove crosstalk noise mixed in the OB period.
It is to provide a double sampling circuit.

[0006]

A correlated double sampling circuit according to the present invention clamps a feedthrough level of an output signal in a two-dimensional CCD sensor of a VTR camera and samples and holds a video signal. A first feed-through clamp circuit and a first sample-and-hold circuit for generating a video signal obtained by correlating double sampling of the output of the two-dimensional CCD sensor, and a reference D for removing sampling noise
A second feed-through clamp circuit and a second sample-and-hold circuit for generating a signal obtained by correlated double sampling of the C level, and a differential input AGC amplifier for differentially inputting the outputs of the first and second sample-and-hold circuits When,
During the blanking period including the optical black period of the output signal of the two-dimensional CCD sensor, the reference D
C level correlated double sampling
A switch for switching to an output signal of the D sensor, so as to remove noise due to crosstalk during the optical black period.

[0007]

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a diagram of a correlated double sampling circuit showing one embodiment of the present invention. As shown in FIG. 1, this embodiment has a configuration in which an analog switch 7 as a means for switching the input of the second feed-through clamp circuit 8 in the conventional example of FIG. 2 is added. That is, the signal output from the two-dimensional CCD sensor 1 to which the optical video signal is input is correlated double-sampled at the clock timing from the clock input terminals 10 and 11 in the feed-through clamp circuit 2 and the sample-and-hold circuit 3, It is input to one of the differential inputs of the dynamic AGC amplifier 4. The other differential input of the differential AGC amplifier 4 has. During the blanking period including the OB period, the output signal of the two-dimensional CCD sensor 1 switched by the analog switch 7 by the blanking signal input from the blanking signal input terminal 6 is fed-through clamp circuit 8 and sample-hold circuit 9 , A signal subjected to correlation double sampling is input as a reference signal. On the other hand, during the video signal period other than the blanking period, the analog switch 7 is set to GN.
D is switched to a capacitor connected between the differential AGC amplifier 4 and a signal obtained by correlating double sampling of a specific DC reference level in the feedthrough clamp circuit 8 by the clamp circuit 8 and the sample hold circuit 9 as a reference signal. To the other differential input.

[0009]

As described above, the correlated double sampling circuit of the present invention outputs the output signal of the two-dimensional CCD sensor during the blanking period including the OB period, and outputs the output signal during the other video signal periods. A reference signal obtained by correlating double sampling of a specific DC level in the clamp circuit is differential A
By supplying the signal to the GC amplifier, crosstalk noise in the two-dimensional CCD sensor during the OB period can be removed by the differential AGC amplifier, and stable OB clamping can be performed even when OB clamping is performed by a process amplifier or the like at a later stage. There is an effect that can be.

[Brief description of the drawings]

FIG. 1 is a correlated double sampling circuit diagram showing one embodiment of the present invention.

FIG. 2 is a diagram of a correlated double sampling circuit showing an example of the related art.

[Explanation of symbols]

 Reference Signs List 1 2D CCD sensor 2, 8 Feedthrough clamp circuit 3, 9 Sample hold circuit 4 Differential input AGC amplifier 5 Output terminal 6 Blanking signal input terminal 7 Analog switch 10, 11 Clock input terminal

Claims (2)

(57) [Claims] 1. A correlated double sampling circuit for clamping a feedthrough level of an output signal of a two-dimensional CCD sensor of a VTR camera and sampling and holding a video signal, the correlated double sampling of the output of the two-dimensional CCD sensor. A first feed-through clamp circuit and a first sample-and-hold circuit for generating a signal; and a reference D for removing sampling noise.
A second feed-through clamp circuit and a second sample-and-hold circuit for generating a signal obtained by correlated double sampling of the C level, and a differential input AGC amplifier for differentially inputting the outputs of the first and second sample-and-hold circuits When,
During the blanking period including the optical black period of the output signal of the two-dimensional CCD sensor, the reference D
C level correlated double sampling
A switch for switching to an output signal of a D sensor, wherein noise due to crosstalk during the optical black period is removed. 2. The correlated double sampling circuit according to claim 1, wherein said switch uses an analog switch and is controlled by a blanking signal.