JP3094754B2 - Printed wiring board and method of manufacturing the same - Google Patents
Printed wiring board and method of manufacturing the sameInfo
- Publication number
- JP3094754B2 JP3094754B2 JP26218393A JP26218393A JP3094754B2 JP 3094754 B2 JP3094754 B2 JP 3094754B2 JP 26218393 A JP26218393 A JP 26218393A JP 26218393 A JP26218393 A JP 26218393A JP 3094754 B2 JP3094754 B2 JP 3094754B2
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- prepreg
- printed wiring
- copper foil
- conductive paste
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
- H05K1/092—Dispersed materials, e.g. conductive pastes or inks
- H05K1/095—Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
- H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明はプリント配線板及びその
製造方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board and a method for manufacturing the same.
【０００２】[0002]
【従来の技術】導電性ペーストで回路層間を接続したプ
リント配線板は両面銅張り積層板の銅はくをエッチング
により回路形成した後、基板にスルーホールを形成しこ
のスルーホール内に銅や銀などの金属粉末とエポキシな
どの熱硬化性樹脂から構成される導電性ペーストを塗布
後加熱して基板両面の回路層間の電気的接続を得てい
る。2. Description of the Related Art A printed wiring board in which circuit layers are connected by a conductive paste is formed by etching a copper foil of a double-sided copper-clad laminate, and then a through hole is formed in the substrate, and copper or silver is formed in the through hole. A conductive paste composed of a metal powder such as epoxy resin and a thermosetting resin such as epoxy is applied and heated to obtain an electrical connection between circuit layers on both surfaces of the substrate.
【０００３】[0003]
【発明が解決しようとする課題】しかしながらこのよう
な従来の方法では、導電性ペーストを構成する熱硬化性
樹脂への吸湿及び塩素イオンなどの不純物により導電性
ペーストを構成する金属表面が腐食され回路層間の接続
抵抗が劣化する課題があった。However, in such a conventional method, the surface of the metal constituting the conductive paste is corroded due to moisture absorption into the thermosetting resin constituting the conductive paste and impurities such as chlorine ions. There is a problem that the connection resistance between the layers is deteriorated.
【０００４】[0004]
【課題を解決するための手段】この問題を解決するため
に本発明のプリント配線板は、導電性ペーストを構成す
る金属に対し標準単極電位が卑な金属層を介して導電性
ペーストと回路銅はくを接続するものである。In order to solve this problem, a printed wiring board according to the present invention is provided with a conductive paste and a circuit through a metal layer having a standard monopolar potential lower than that of a metal constituting the conductive paste. It connects copper foils.
【０００５】[0005]
【作用】上記の手段により、導電性ペーストを構成する
金属が水分及び塩素イオンなどの不純物により腐食電流
が流れ腐食が開始した場合、標準単極電位が卑な金属と
接触しているため防食電流に等しい犠牲アノード溶解電
流が流れ電位をカソード防食電位に保つため腐食は停止
する。このカソード防食の原理により導電性ペーストを
構成する金属の腐食は抑制される。According to the above-mentioned means, when a metal constituting the conductive paste causes a corrosion current to flow due to impurities such as moisture and chlorine ions, and the corrosion starts, the corrosion prevention current is reduced because the standard monopolar potential is in contact with the base metal. Corrosion ceases because a sacrificial anode dissolution current equal to and flows to maintain the cathodic protection potential. Corrosion of the metal constituting the conductive paste is suppressed by the principle of the cathodic protection.
【０００６】[0006]
【実施例】以下に本発明の一実施例を図面に基づき説明
する。An embodiment of the present invention will be described below with reference to the drawings.
【０００７】（実施例１）図１から図９は本発明の一実
施例における両面及び多層プリント配線板の製造方法を
示す工程断面図である。(Embodiment 1) FIGS. 1 to 9 are process sectional views showing a method for manufacturing a double-sided and multilayer printed wiring board according to an embodiment of the present invention.
【０００８】図において１はアラミド不織布エポキシ樹
脂プリプレグ、２は離型フィルム、３はスルーホール、
４は導電性ペーストを構成する金属粒子、５は導電性ペ
ーストを構成するエポキシ樹脂、６は電解銅箔、７は導
電性ペーストを構成する金属に対し標準単極電位が卑な
金属層である。In the figure, 1 is an aramid nonwoven epoxy resin prepreg, 2 is a release film, 3 is a through hole,
4 is a metal particle constituting the conductive paste, 5 is an epoxy resin constituting the conductive paste, 6 is an electrolytic copper foil, and 7 is a metal layer having a standard single pole potential lower than that of the metal constituting the conductive paste. .
【０００９】図１は厚み２００μｍのアラミド不織布エ
ポキシ樹脂プリプレグの両面に厚み１２μｍポリエチレ
ンテレフタレートフィルムからなる離型フィルム２を熱
プレスにより摂氏１００度、３０ｋｇ／ｃｍ2、５分の
条件で熱圧着により張り付けた状態を示している。FIG. 1 shows a release film 2 made of a 12 μm-thick polyethylene terephthalate film on both sides of a 200 μm-thick aramid non-woven epoxy resin prepreg by hot pressing at 100 ° C., 30 kg / cm 2 and 5 minutes by hot pressing. It shows the state where it was turned on.
【００１０】次に図２は穿孔してスルーホール３を形成
した状態を示している。スルーホール３の形成はドリル
やレーザー加工により可能であるが今回は炭酸ガスレー
ザーを用いてφ０．２の穿孔を行った。Next, FIG. 2 shows a state in which a through hole 3 is formed by drilling. The through hole 3 can be formed by drilling or laser processing, but in this case, a hole of φ0.2 was formed using a carbon dioxide laser.
【００１１】次に図３は離型フィルム２をマスクとして
印刷法によりスルーホール３内に金属粒子４とエポキシ
樹脂５からなる導電性ペーストを充填した状態を示して
いる。Next, FIG. 3 shows a state in which a conductive paste composed of metal particles 4 and epoxy resin 5 is filled in the through holes 3 by a printing method using the release film 2 as a mask.
【００１２】次に図４は離型フィルム２を剥離した後表
面に導電性ペーストを構成する金属粒子４に対し標準単
極電位が卑な金属層７を形成した電解銅はく６（３５ミ
クロン厚）を両面に重ね合わせた状態、図５は積み重ね
た後、真空熱プレスにより摂氏２００度、３０kg/cm2、
１時間の条件で加熱加圧接着した状態を示している。Next, FIG. 4 shows an electrolytic copper foil 6 (35 μm) in which a metal layer 7 having a lower standard monopolar potential is formed on the surface of the metal particles 4 constituting the conductive paste after the release film 2 is peeled off. Thickness) is superimposed on both sides, and FIG. 5 shows that after stacking, 200 ° C., 30 kg / cm2,
This shows a state in which heating and pressure bonding is performed for one hour.
【００１３】図６は表面の銅箔をエッチング法をもちい
て回路銅箔を形成して本発明の両面プリント配線板を得
た状態を示している。また次の図７は図１から図６を用
いて説明した方法により得られた両面プリント配線板を
内層板としてその両面に、前記の導電性ペースト充填後
離型フィルム２を剥離したプリプレグを重ね合わせた状
態を示したものである。FIG. 6 shows a state in which a double-sided printed wiring board of the present invention is obtained by forming a circuit copper foil by etching the surface copper foil by using an etching method. Further, FIG. 7 shows a double-sided printed wiring board obtained by the method described with reference to FIGS. 1 to 6 as an inner layer board, and a prepreg obtained by peeling the release film 2 after filling the conductive paste on both sides thereof. FIG.
【００１４】図８は積み重ねた後、真空熱プレスにより
摂氏２００度、３０kg/cm2、１時間の条件で加熱加圧接
着した状態である。図９は表面の銅はくをエッチング法
を用いて回路銅はくを形成して本発明の多層プリント配
線板を得た状態を示している。FIG. 8 shows a state in which the sheets are stacked and bonded by heating and pressing at 200 ° C., 30 kg / cm 2 and 1 hour by a vacuum hot press. FIG. 9 shows a state where a multilayer copper wiring board of the present invention is obtained by forming a circuit copper foil by etching the surface copper foil.
【００１５】導電性ペーストを構成する金属４及び電解
銅はく表面に形成した金属層５を形成する金属は（表
１）に示したものについて前記製造方法にて両面及び多
層基板を作製し、プレッシヤークッカー法（摂氏１２１
度、２気圧、１時間）にて加速試験を行い回路層間の接
続抵抗変化により信頼性検討を行った。The metal 4 forming the conductive paste and the metal forming the metal layer 5 formed on the surface of the electrolytic copper foil were the same as those shown in (Table 1). Presser cooker method (121 degrees Celsius)
(Two degrees of pressure, one hour), and an acceleration test was performed, and reliability was examined based on a change in connection resistance between circuit layers.
【００１６】[0016]
【表１】 [Table 1]
【００１７】その結果両面及び多層プリント配線板共に
導電性ペーストを構成する金属に対し標準単極電位が卑
な金属層を介して導電性ペーストと回路銅箔を接続した
層間接続抵抗は変化が認められなかった。しかし導電性
ペーストを構成する金属と電解銅はく表面に形成した金
属層を形成する金属が同一金属の場合は層間接続抵抗が
劣化した。As a result, on both sides and the multilayer printed wiring board, the interlayer connection resistance in which the conductive paste and the circuit copper foil are connected via a metal layer having a standard single-pole potential lower than that of the metal forming the conductive paste is changed. I couldn't. However, when the metal forming the conductive paste and the metal forming the metal layer formed on the surface of the electrolytic copper foil were the same metal, the interlayer connection resistance deteriorated.
【００１８】（実施例２）図１０から図１７は本発明の
一実施例における多層プリント配線板の製造方法を示す
工程断面図である。(Embodiment 2) FIGS. 10 to 17 are process sectional views showing a method of manufacturing a multilayer printed wiring board according to an embodiment of the present invention.
【００１９】図において１１はアラミド不織布エポキシ
樹脂プリプレグ、１２は離型フィルム、１３はスルーホ
ール、１４は導電性ペーストを構成する金属粒子、１５
は導電性ペーストを構成するエポキシ樹脂、１６は電解
銅箔、１７は導電性ペーストを構成する金属に対し標準
単極電位が卑な金属層である。In the figure, 11 is an aramid nonwoven epoxy resin prepreg, 12 is a release film, 13 is a through hole, 14 is metal particles constituting a conductive paste, 15
Is an epoxy resin constituting the conductive paste, 16 is an electrolytic copper foil, and 17 is a metal layer having a standard single pole potential lower than that of the metal constituting the conductive paste.
【００２０】図１０は厚み２００μｍのアラミド不織布
エポキシ樹脂プリプレグの両面に厚み１２μｍポリエチ
レンテレフタレートフィルムからなる離型フィルム１２
を熱プレスにより摂氏１００度、３０ｋｇ／ｃｍ2、５
分の条件で熱圧着により張り付けた状態を示している。FIG. 10 shows a release film 12 composed of a 12 μm thick polyethylene terephthalate film on both sides of a 200 μm thick aramid nonwoven epoxy resin prepreg.
100 ° C., 30 kg / cm 2 , 5
It shows a state of bonding by thermocompression bonding under the condition of minutes.
【００２１】図１１は穿孔してスルーホール１３を形成
した状態を示している。スルーホール１３の形成はドリ
ルやレーザー加工により可能であるが今回は炭酸ガスレ
ーザーを用いてφ０．２の穿孔を行った。FIG. 11 shows a state in which a through hole 13 is formed by drilling. The through-hole 13 can be formed by drilling or laser processing, but in this case, a hole of φ0.2 was formed using a carbon dioxide laser.
【００２２】図１２は離型フィルム１２をマスクとして
印刷法によりスルーホール１３内に金属粒子１４とエポ
キシ樹脂１５からなる導電性ペーストを充填した状態を
示している。。次に図１３は離型フィルム１２を剥離し
た後表面に導電性ペーストを構成する金属１４に対し標
準単極電位が卑な金属層１７を形成した電解銅はく１６
（３５ミクロン厚）を両面に重ね合わせた状態、図１４
は積み重ねた後、真空熱プレスにより摂氏２００度、３
０kg/cm2、１時間の条件で加熱加圧接着した状態を示し
ている。FIG. 12 shows a state in which a conductive paste composed of metal particles 14 and epoxy resin 15 is filled in through holes 13 by a printing method using the release film 12 as a mask. . Next, FIG. 13 shows an electrolytic copper foil 16 in which a metal layer 17 having a standard monopolar potential lower than that of the metal 14 constituting the conductive paste is formed on the surface after the release film 12 is peeled off.
(35 micron thickness) superimposed on both sides, FIG. 14
Are stacked and then heated to 200 degrees Celsius by a vacuum heat press.
The figure shows a state of bonding under heat and pressure under the condition of 0 kg / cm2 for 1 hour.
【００２３】図１５は表面の銅箔をエッチング法をもち
いて回路銅箔を形成して両面プリント配線板を得た状態
を示している。図１０から図１５を用いて説明した方法
により２組の両面板を作製する。FIG. 15 shows a state in which a double-sided printed wiring board is obtained by forming a circuit copper foil by etching the surface copper foil. Two sets of double-sided boards are manufactured by the method described with reference to FIGS.
【００２４】次の図１６は図１０から図１５を用いて説
明した方法により得られた両面プリント配線板を外層板
としてその間に、前記の導電性ペースト充填後離型フィ
ルム２を剥離したプリプレグを中間接続体として重ね合
わせた状態を示したものである。Next, FIG. 16 shows a prepreg from which the release film 2 has been peeled off after filling the above-mentioned conductive paste between the double-sided printed wiring boards obtained by the method described with reference to FIGS. It shows a state of being superimposed as an intermediate connector.
【００２５】図１７は積み重ねた後、真空熱プレスによ
り摂氏２００度、３０kg/cm2、１時間の条件で加熱加圧
接着して本発明の多層プリント配線板を得た状態を示し
ている。前記製造方法にて導電性ペーストを構成する金
属１４及び電解銅はく表面に形成した金属層１５を形成
する金属は実施例１で示した表１に示したものについて
多層プリント配線板を作製し、プレッシヤークッカー法
（摂氏１２１度、２気圧、１時間）にて加速試験を行い
回路層間の接続抵抗変化により信頼性検討を行った。そ
の結果導電性ペーストを構成する金属に対し標準単極電
位が卑な金属層を介して導電性ペーストと回路銅箔を接
続した層間接続抵抗は変化が認められなかった。しかし
導電性ペーストを構成する金属と電解銅箔表面に形成し
た金属層を形成する金属が同一金属の場合は層間接続抵
抗が劣化した。FIG. 17 shows a state where the multilayer printed wiring board of the present invention is obtained by bonding by heating and pressing at 200 ° C., 30 kg / cm 2, and 1 hour by vacuum hot pressing after stacking. The metal 14 forming the conductive paste and the metal forming the metal layer 15 formed on the surface of the electrolytic copper foil by the above-mentioned manufacturing method were prepared as shown in Table 1 shown in Example 1 to prepare a multilayer printed wiring board. An acceleration test was performed by the pressurized cooker method (121 degrees Celsius, 2 atmospheres, 1 hour), and reliability was examined based on a change in connection resistance between circuit layers. As a result, no change was observed in the interlayer connection resistance in which the conductive paste was connected to the circuit copper foil via the metal layer having a lower standard monopolar potential with respect to the metal constituting the conductive paste. However, when the metal forming the conductive paste and the metal forming the metal layer formed on the surface of the electrolytic copper foil were the same metal, the interlayer connection resistance deteriorated.
【００２６】[0026]
【発明の効果】以上のように本発明は、導電性ペースト
で回路層間を接続したプリント配線板において導電性ペ
ーストと回路銅箔が導電性ペーストを構成する金属に対
し標準単極電位が卑な金属層を介して接続することによ
り導電性ペーストを構成する金属の腐食は抑制され回路
層間の接続抵抗劣化が防止できる。As described above, according to the present invention, in a printed wiring board in which circuit layers are connected by a conductive paste, the conductive paste and the circuit copper foil have a lower standard monopolar potential than the metal constituting the conductive paste. By connecting via the metal layer, corrosion of the metal constituting the conductive paste is suppressed, and deterioration of the connection resistance between circuit layers can be prevented.
【図１】本発明の実施例１における印刷配線板の製造方
法の工程説明のための断面図FIG. 1 is a cross-sectional view for describing a process in a method for manufacturing a printed wiring board according to a first embodiment of the present invention.
【図２】同実施例１における印刷配線板の製造方法の工
程説明のための断面図FIG. 2 is a cross-sectional view for explaining a step in the method for manufacturing a printed wiring board in Example 1;
【図３】同実施例１における印刷配線板の製造方法の工
程説明のための断面図FIG. 3 is a sectional view for illustrating a step in the method for manufacturing a printed wiring board in Example 1;
【図４】同実施例１における印刷配線板の製造方法の工
程説明のための断面図FIG. 4 is a sectional view for illustrating a step in the method for manufacturing a printed wiring board in Example 1;
【図５】同実施例１における印刷配線板の製造方法の工
程説明のための断面図FIG. 5 is a sectional view for illustrating a step in the method for manufacturing a printed wiring board in Example 1;
【図６】同実施例１における印刷配線板の製造方法の工
程説明のための断面図FIG. 6 is a sectional view for illustrating a step in the method for manufacturing a printed wiring board in Example 1;
【図７】同実施例１における印刷配線板の製造方法の工
程説明のための断面図FIG. 7 is a sectional view for illustrating a step in the method for manufacturing the printed wiring board in Example 1;
【図８】同実施例１における印刷配線板の製造方法の工
程説明のための断面図FIG. 8 is a sectional view for illustrating a step in the method for manufacturing a printed wiring board in Example 1;
【図９】同実施例１における印刷配線板の製造方法の工
程説明のための断面図FIG. 9 is a sectional view for illustrating a step in the method for manufacturing a printed wiring board in Example 1;
【図１０】本発明の実施例２における印刷配線板の製造
方法の工程説明のための断面図FIG. 10 is a cross-sectional view for describing a process in a method for manufacturing a printed wiring board according to the second embodiment of the present invention.
【図１１】同実施例２における印刷配線板の製造方法の
工程説明のための断面図FIG. 11 is a sectional view for illustrating a step in the method for manufacturing a printed wiring board in Example 2;
【図１２】同実施例２における印刷配線板の製造方法の
工程説明のための断面図FIG. 12 is a sectional view for illustrating a step in the method for manufacturing a printed wiring board in Example 2;
【図１３】同実施例２における印刷配線板の製造方法の
工程説明のための断面図FIG. 13 is a sectional view for illustrating a step in the method for manufacturing a printed wiring board in Example 2;
【図１４】同実施例２における印刷配線板の製造方法の
工程説明のための断面図FIG. 14 is a sectional view for illustrating a step in the method for manufacturing a printed wiring board in Example 2;
【図１５】同実施例２における印刷配線板の製造方法の
工程説明のための断面図FIG. 15 is a sectional view for illustrating a step in the method for manufacturing a printed wiring board in Example 2;
【図１６】同実施例２における印刷配線板の製造方法の
工程説明のための断面図FIG. 16 is a sectional view for illustrating a step in the method for manufacturing a printed wiring board in Example 2;
【図１７】同実施例２における印刷配線板の製造方法の
工程説明のための断面図FIG. 17 is a sectional view for illustrating a step in the method for manufacturing a printed wiring board in Example 2;
１ アラミド不織布エホキシ樹脂プリプレグ ２ 離型フィルム ３ スルーホール ４ 導電性ペーストを構成する金属粒子 ５ 導電性ペーストを構成するエポキシ樹脂 ６ 電解銅箔 ７ 導電性ペーストを構成する金属に対し標準電極電位
が卑な金属層 １１ アラミド不織布エホキシ樹脂プリプレグ １２ 離型フィルム １３ スルーホール １４ 導電性ペーストを構成する金属粒子 １５ 導電性ペーストを構成するエポキシ樹脂 １６ 電解銅箔 １７ 導電性ペーストを構成する金属に対し標準電極電
位が卑な金属層REFERENCE SIGNS LIST 1 aramid nonwoven fabric ethoxy resin prepreg 2 release film 3 through hole 4 metal particles forming conductive paste 5 epoxy resin forming conductive paste 6 electrolytic copper foil 7 standard electrode potential lower than metal forming conductive paste Metal layer 11 Aramid non-woven fabric ethoxy resin prepreg 12 Release film 13 Through hole 14 Metal particles forming conductive paste 15 Epoxy resin forming conductive paste 16 Electrolytic copper foil 17 Standard electrode for metal forming conductive paste Metal layer with low potential
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 ＦＩ Ｈ０５Ｋ 3/46 Ｈ０５Ｋ 3/46 Ｓ (72)発明者 川北 晃司 大阪府門真市大字門真1006番地 松下電 器産業株式会社内 (72)発明者 小川 立夫 大阪府門真市大字門真1006番地 松下電 器産業株式会社内 (72)発明者 小島 環生 大阪府門真市大字門真1006番地 松下電 器産業株式会社内 (56)参考文献 特開 昭55−55600（ＪＰ，Ａ) 特開 平２−213495（ＪＰ，Ａ) 特公 昭57−2200（ＪＰ，Ｂ２) 日本プリント回路工業会編「プリント 回路技術便覧」（昭62−２−28）日刊工 業新聞社 ｐ．254 (58)調査した分野(Int.Cl.7，ＤＢ名) H05K 1/11 H05K 1/09 H05K 3/40 H05K 3/46 ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 7 Identification code FI H05K 3/46 H05K 3/46 S (72) Inventor Koji Kawakita 1006 Kadoma, Kazuma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. 72) Inventor Tatsuo Ogawa 1006 Kazuma Kadoma, Kadoma City, Osaka Prefecture Inside Matsushita Electric Industrial Co., Ltd. (72) Inventor Tamio Kojima 1006 Kadoma Kadoma, Kadoma City Osaka Prefecture Inside Matsushita Electric Industrial Co., Ltd. Showa 55-55600 (JP, A) JP-A-2-213495 (JP, A) Japanese Patent Publication No. 57-2200 (JP, B2) Japan Printed Circuit Manufacturers Association, "Printed Circuit Technology Handbook" (Showa 62-2-28) ) Nikkan Kogyo Shimbun p. 254 (58) Field surveyed (Int.Cl. 7 , DB name) H05K 1/11 H05K 1/09 H05K 3/40 H05K 3/46
Claims (9)
性ペーストで回路層間を接続し、回路銅箔が前記導電性
ペーストを覆うように設けられており、かつ前記金属粒
子と前記回路銅箔が前記金属粒子に対して標準単極電位
が卑な金属層を介して電気的に接続することを特徴とす
るプリント配線板。1. A conductive material having metal particles and a thermosetting resin.
The circuit layers are connected with conductive paste, and the circuit copper foil is
Provided so as to cover the paste, and
And the circuit copper foil have a standard unipolar potential with respect to the metal particles.
Printed circuit board but which is characterized by electrically connecting through a base metal layer.
キシ樹脂から構成されることを特徴とする請求項１記載
のプリント配線板。2. The printed wiring board according to claim 1, wherein the printed wiring board is made of an aramid nonwoven fabric and an epoxy resin.
を特徴とする請求項１記載のプリント配線板。3. The printed wiring board according to claim 1, wherein the thermosetting resin is an epoxy resin.
とを特徴とする請求項１記載のプリント配線板。 4. The metal layer is made of zinc or a zinc alloy.
The printed wiring board according to claim 1, wherein
の両面に離型フィルムを熱圧着し、その後スルーホール
を形成し、前記スルーホール内に前記導電性ペーストを
充填し、前記離型フィルムを除去するプリプレグ準備工
程と、 その後、前記導電性ペースト中の金属粒子に対し標準単
極電位が卑な金属層を介して銅箔を前記プリプレグの両
面に重ね合わせる工程と、 その後、加熱加圧により前記プリプレグの厚みを減少さ
せて前記銅箔を接着してプリプレグを硬化する工程と、 その後、前記銅箔をエッチングして回路銅箔を形成する
工程、とを有する両面プリント配線板の製造方法。 5. An aramid non-woven fabric epoxy resin prepreg.
Thermocompression-bonded release films on both sides of the
And forming the conductive paste in the through hole.
Pre-preg preparation for filling and removing the release film
And then the standard unit for the metal particles in the conductive paste.
The copper foil is applied to both the prepreg via a metal layer having a very low potential.
A step of superimposing the prepreg on a surface, and then reducing the thickness of the prepreg by heating and pressing.
Curing the prepreg by bonding the copper foil, and thereafter, etching the copper foil to form a circuit copper foil
And a method for producing a double-sided printed wiring board.
プリント基板の両面に請求項５に記載のプリプレグ準備
工程と同様に作製したプリプレグ及び銅箔の順序で積み
重ねる工程と、その後、加熱加圧により前記プリプレグ
の厚みを減少させて積層する工程、とを有する多層プリ
ント配線板の製造方法。 6. A double-sided surface obtained by the method according to claim 5.
The prepreg preparation according to claim 5 on both sides of a printed circuit board.
Prepreg and copper foil in the same order
Stacking step and then heating and pressurizing the prepreg
Stacking by reducing the thickness of the
Manufacturing method of printed wiring board.
の両面プリント基板の間に、請求項５記載のプリプレク
準備工程と同様に作製したプリプレグを中間接続体とし
て挟持し積み重ねる工程と、その後、加熱加圧により前
記プリプレグの厚みを減少させて積層する工程、とを有
する多層プリント配線板の製造方法。 7. A plurality obtained by the method according to claim 5.
The prepreg according to claim 5, between the two-sided printed circuit boards.
A prepreg prepared in the same manner as in the preparation process is used as an intermediate connector.
And stacking, and then heat and press
Reducing the thickness of the prepreg and laminating the prepreg.
Manufacturing method of a multilayer printed wiring board.
ことを特徴とする請求 項５〜７のいずれかに記載の多層
プリント配線板の製造方法。 8. The metal particles in the conductive paste are copper.
A multilayer according to any one of claims 5 to 7 , characterized in that:
Manufacturing method of printed wiring board.
とを特徴とする請求項５〜７のいずれかに記載の多層プ
リント配線板の製造方法。 9. The metal layer is made of zinc or a zinc alloy.
The multilayer press according to any one of claims 5 to 7, wherein
Manufacturing method of lint wiring board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26218393A JP3094754B2 (en) | 1993-10-20 | 1993-10-20 | Printed wiring board and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26218393A JP3094754B2 (en) | 1993-10-20 | 1993-10-20 | Printed wiring board and method of manufacturing the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH07115255A JPH07115255A (en) | 1995-05-02 |
| JP3094754B2 true JP3094754B2 (en) | 2000-10-03 |
Family
ID=17372225
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP26218393A Expired - Lifetime JP3094754B2 (en) | 1993-10-20 | 1993-10-20 | Printed wiring board and method of manufacturing the same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3094754B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101782159B1 (en) * | 2016-11-15 | 2017-09-26 | 김광희 | Hypothetical Pipe Rack Structure |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002217510A (en) * | 2001-01-15 | 2002-08-02 | Matsushita Electric Ind Co Ltd | Connecting structure of board, and its manufacturing method |
| JP4920231B2 (en) * | 2005-10-05 | 2012-04-18 | 株式会社フジクラ | WIRING BOARD AND ITS MANUFACTURING METHOD, AND ELECTRONIC COMPONENT PACKAGE AND ITS MANUFACTURING METHOD |
| JP5691527B2 (en) * | 2010-01-07 | 2015-04-01 | 日立化成株式会社 | Wiring board surface treatment method and wiring board treated by this surface treatment method |
-
1993
- 1993-10-20 JP JP26218393A patent/JP3094754B2/en not_active Expired - Lifetime
Non-Patent Citations (1)
| Title |
|---|
| 日本プリント回路工業会編「プリント回路技術便覧」（昭６２−２−２８）日刊工業新聞社 ｐ．２５４ |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101782159B1 (en) * | 2016-11-15 | 2017-09-26 | 김광희 | Hypothetical Pipe Rack Structure |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH07115255A (en) | 1995-05-02 |
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