JPH07115255A - Printed circuit board and its manufacture - Google Patents

Printed circuit board and its manufacture

Info

Publication number
JPH07115255A
JPH07115255A JP26218393A JP26218393A JPH07115255A JP H07115255 A JPH07115255 A JP H07115255A JP 26218393 A JP26218393 A JP 26218393A JP 26218393 A JP26218393 A JP 26218393A JP H07115255 A JPH07115255 A JP H07115255A
Authority
JP
Japan
Prior art keywords
conductive paste
wiring board
printed wiring
metal
metal layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP26218393A
Other languages
Japanese (ja)
Other versions
JP3094754B2 (en
Inventor
Hiroshi Sogo
寛 十河
Seiichi Nakatani
誠一 中谷
Akihito Hatakeyama
秋仁 畠山
Koji Kawakita
晃司 川北
Tatsuo Ogawa
立夫 小川
Tamaki Kojima
環生 小島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP26218393A priority Critical patent/JP3094754B2/en
Publication of JPH07115255A publication Critical patent/JPH07115255A/en
Application granted granted Critical
Publication of JP3094754B2 publication Critical patent/JP3094754B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks
    • H05K1/095Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To prevent corrosion by connecting a conductive paste to circuit copper foils by way of a base metallic layer whose standard monopole potential is baser than the metal contained in the conductive paste. CONSTITUTION:A conductive paste made of metallic particles 4 and an epoxy resin 5 is charged into a through hole by means of a printing method using a detachable film 2 as a mask. After the detachable film 2 is peeled, electrolytic copper foils 6, on which a base metallic layer 7 whose standard monopole potential is baser than the metallic particles 4 contained in the conductive paste is formed on the surface, are overlaid on both sides and bonded by heating and pressing. Consequently, if a corrosive current flows through metals contained in the conductive paste due to moisture and impurities such as chlorine ions and corrosion starts because the conductive paste is in contact with the metal whose standard monopole potential is base, a sacrificial anode dissolution current equivalent to anticorrosive current flows to keep the potential at a cathode anticorrosive potential, thus stopping the corrosion.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はプリント配線板及びその
製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board and a method for manufacturing the same.

【0002】[0002]

【従来の技術】導電性ペーストで回路層間を接続したプ
リント配線板は両面銅張り積層板の銅はくをエッチング
により回路形成した後、基板にスルーホールを形成しこ
のスルーホール内に銅や銀などの金属粉末とエポキシな
どの熱硬化性樹脂から構成される導電性ペーストを塗布
後加熱して基板両面の回路層間の電気的接続を得てい
る。
2. Description of the Related Art In a printed wiring board in which circuit layers are connected by a conductive paste, a circuit is formed by etching a copper foil of a double-sided copper-clad laminate, a through hole is formed in the board, and copper or silver is formed in the through hole. A conductive paste composed of a metal powder such as and a thermosetting resin such as epoxy is applied and then heated to obtain electrical connection between the circuit layers on both surfaces of the substrate.

【0003】[0003]

【発明が解決しようとする課題】しかしながらこのよう
な従来の方法では、導電性ペーストを構成する熱硬化性
樹脂への吸湿及び塩素イオンなどの不純物により導電性
ペーストを構成する金属表面が腐食され回路層間の接続
抵抗が劣化する課題があった。
However, in such a conventional method, the metal surface constituting the conductive paste is corroded by the moisture absorption of the thermosetting resin constituting the conductive paste and the impurities such as chlorine ions corroding the metal surface. There is a problem that the connection resistance between layers deteriorates.

【0004】[0004]

【課題を解決するための手段】この問題を解決するため
に本発明のプリント配線板は、導電性ペーストを構成す
る金属に対し標準単極電位が卑な金属層を介して導電性
ペーストと回路銅はくを接続するものである。
In order to solve this problem, a printed wiring board according to the present invention uses a conductive paste and a circuit via a metal layer having a standard single-pole potential that is lower than that of the metal forming the conductive paste. It connects copper foil.

【0005】[0005]

【作用】上記の手段により、導電性ペーストを構成する
金属が水分及び塩素イオンなどの不純物により腐食電流
が流れ腐食が開始した場合、標準単極電位が卑な金属と
接触しているため防食電流に等しい犠牲アノード溶解電
流が流れ電位をカソード防食電位に保つため腐食は停止
する。このカソード防食の原理により導電性ペーストを
構成する金属の腐食は抑制される。
By the above means, when the metal forming the conductive paste causes a corrosion current due to impurities such as moisture and chlorine ions to start corrosion, the standard monopolar potential is in contact with the base metal, so that the corrosion prevention current Corrosion ceases because a sacrificial anodic dissolution current equal to flows current potential to cathodic protection potential. By this principle of cathodic protection, corrosion of the metal forming the conductive paste is suppressed.

【0006】[0006]

【実施例】以下に本発明の一実施例を図面に基づき説明
する。
An embodiment of the present invention will be described below with reference to the drawings.

【0007】(実施例1)図1から図9は本発明の一実
施例における両面及び多層プリント配線板の製造方法を
示す工程断面図である。
(Embodiment 1) FIGS. 1 to 9 are process sectional views showing a method of manufacturing a double-sided and multilayer printed wiring board in an embodiment of the present invention.

【0008】図において1はアラミド不織布エポキシ樹
脂プリプレグ、2は離型フィルム、3はスルーホール、
4は導電性ペーストを構成する金属粒子、5は導電性ペ
ーストを構成するエポキシ樹脂、6は電解銅箔、7は導
電性ペーストを構成する金属に対し標準単極電位が卑な
金属層である。
In the figure, 1 is an aramid nonwoven fabric epoxy resin prepreg, 2 is a release film, 3 is a through hole,
Reference numeral 4 denotes metal particles forming the conductive paste, 5 an epoxy resin forming the conductive paste, 6 an electrolytic copper foil, and 7 a metal layer having a standard monopolar potential lower than that of the metal forming the conductive paste. .

【0009】図1は厚み200μmのアラミド不織布エ
ポキシ樹脂プリプレグの両面に厚み12μmポリエチレ
ンテレフタレートフィルムからなる離型フィルム2を熱
プレスにより摂氏100度、30kg/cm2、5分の
条件で熱圧着により張り付けた状態を示している。
FIG. 1 shows that a release film 2 made of a polyethylene terephthalate film having a thickness of 12 μm is attached to both sides of an aramid non-woven epoxy resin prepreg having a thickness of 200 μm by thermocompression bonding at a temperature of 100 ° C., 30 kg / cm 2 , and 5 minutes. Shows the closed state.

【0010】次に図2は穿孔してスルーホール3を形成
した状態を示している。スルーホール3の形成はドリル
やレーザー加工により可能であるが今回は炭酸ガスレー
ザーを用いてφ0.2の穿孔を行った。
Next, FIG. 2 shows a state in which the through holes 3 are formed by punching. The through hole 3 can be formed by a drill or laser processing, but this time, a φ0.2 hole was formed using a carbon dioxide laser.

【0011】次に図3は離型フィルム2をマスクとして
印刷法によりスルーホール3内に金属粒子4とエポキシ
樹脂5からなる導電性ペーストを充填した状態を示して
いる。
Next, FIG. 3 shows a state in which the through hole 3 is filled with a conductive paste composed of the metal particles 4 and the epoxy resin 5 by a printing method using the release film 2 as a mask.

【0012】次に図4は離型フィルム2を剥離した後表
面に導電性ペーストを構成する金属粒子4に対し標準単
極電位が卑な金属層7を形成した電解銅はく6(35ミ
クロン厚)を両面に重ね合わせた状態、図5は積み重ね
た後、真空熱プレスにより摂氏200度、30kg/cm2、
1時間の条件で加熱加圧接着した状態を示している。
Next, FIG. 4 shows an electrolytic copper foil 6 (35 μm) in which a metal layer 7 having a standard monopolar potential is formed on the surface of the metal particles 4 constituting the conductive paste after the release film 2 is peeled off. (Thickness) on both sides, Fig. 5 shows that after stacking, it is vacuum heat pressed at 200 degrees Celsius, 30kg / cm2,
It shows a state in which heating and pressurizing are adhered under the condition of 1 hour.

【0013】図6は表面の銅箔をエッチング法をもちい
て回路銅箔を形成して本発明の両面プリント配線板を得
た状態を示している。また次の図7は図1から図6を用
いて説明した方法により得られた両面プリント配線板を
内層板としてその両面に、前記の導電性ペースト充填後
離型フィルム2を剥離したプリプレグを重ね合わせた状
態を示したものである。
FIG. 6 shows a state in which a double-sided printed wiring board of the present invention is obtained by forming a circuit copper foil by using an etching method on the surface copper foil. Next, FIG. 7 shows that the double-sided printed wiring board obtained by the method described with reference to FIGS. 1 to 6 is used as an inner layer board, and the prepreg from which the release film 2 has been peeled off after being filled with the conductive paste is superposed on both surfaces thereof. It shows the combined state.

【0014】図8は積み重ねた後、真空熱プレスにより
摂氏200度、30kg/cm2、1時間の条件で加熱加圧接
着した状態である。図9は表面の銅はくをエッチング法
を用いて回路銅はくを形成して本発明の多層プリント配
線板を得た状態を示している。
FIG. 8 shows a state in which, after stacking, they are heated and pressure-bonded by a vacuum heat press under the conditions of 200 ° C., 30 kg / cm 2, and 1 hour. FIG. 9 shows a state in which a copper foil on the surface is formed into a circuit copper foil by an etching method to obtain a multilayer printed wiring board of the present invention.

【0015】導電性ペーストを構成する金属4及び電解
銅はく表面に形成した金属層5を形成する金属は(表
1)に示したものについて前記製造方法にて両面及び多
層基板を作製し、プレッシヤークッカー法(摂氏121
度、2気圧、1時間)にて加速試験を行い回路層間の接
続抵抗変化により信頼性検討を行った。
For the metal 4 constituting the conductive paste and the metal forming the metal layer 5 formed on the surface of the electrolytic copper foil, double-sided and multi-layered substrates were prepared by the above-mentioned manufacturing method for those shown in (Table 1). Pressure cooker method (121 degrees Celsius
C., 2 atmospheres, 1 hour) to carry out an acceleration test to examine reliability by changing connection resistance between circuit layers.

【0016】[0016]

【表1】 [Table 1]

【0017】その結果両面及び多層プリント配線板共に
導電性ペーストを構成する金属に対し標準単極電位が卑
な金属層を介して導電性ペーストと回路銅箔を接続した
層間接続抵抗は変化が認められなかった。しかし導電性
ペーストを構成する金属と電解銅はく表面に形成した金
属層を形成する金属が同一金属の場合は層間接続抵抗が
劣化した。
As a result, a change in the inter-layer connection resistance between the conductive paste and the circuit copper foil was observed through the metal layer having a standard monopolar potential with respect to the metal constituting the conductive paste on both sides and the multilayer printed wiring board. I couldn't do it. However, when the metal forming the conductive paste and the metal forming the metal layer formed on the surface of the electrolytic copper foil are the same metal, the interlayer connection resistance deteriorates.

【0018】(実施例2)図10から図17は本発明の
一実施例における多層プリント配線板の製造方法を示す
工程断面図である。
(Embodiment 2) FIGS. 10 to 17 are process sectional views showing a method for manufacturing a multilayer printed wiring board according to an embodiment of the present invention.

【0019】図において11はアラミド不織布エポキシ
樹脂プリプレグ、12は離型フィルム、13はスルーホ
ール、14は導電性ペーストを構成する金属粒子、15
は導電性ペーストを構成するエポキシ樹脂、16は電解
銅箔、17は導電性ペーストを構成する金属に対し標準
単極電位が卑な金属層である。
In the figure, 11 is an aramid nonwoven fabric epoxy resin prepreg, 12 is a release film, 13 is a through hole, 14 is a metal particle which constitutes a conductive paste, and 15
Is an epoxy resin forming the conductive paste, 16 is an electrolytic copper foil, and 17 is a metal layer whose standard single-pole potential is base with respect to the metal forming the conductive paste.

【0020】図10は厚み200μmのアラミド不織布
エポキシ樹脂プリプレグの両面に厚み12μmポリエチ
レンテレフタレートフィルムからなる離型フィルム12
を熱プレスにより摂氏100度、30kg/cm2、5
分の条件で熱圧着により張り付けた状態を示している。
FIG. 10 shows a release film 12 made of a polyethylene terephthalate film having a thickness of 12 μm on both sides of an aramid nonwoven fabric epoxy resin prepreg having a thickness of 200 μm.
By hot press at 100 degrees Celsius, 30 kg / cm 2 , 5
It shows a state of being attached by thermocompression bonding under the condition of minutes.

【0021】図11は穿孔してスルーホール13を形成
した状態を示している。スルーホール13の形成はドリ
ルやレーザー加工により可能であるが今回は炭酸ガスレ
ーザーを用いてφ0.2の穿孔を行った。
FIG. 11 shows a state in which the through holes 13 are formed by punching. The through hole 13 can be formed by a drill or laser processing, but this time, a carbon dioxide laser was used to perforate φ0.2.

【0022】図12は離型フィルム12をマスクとして
印刷法によりスルーホール13内に金属粒子14とエポ
キシ樹脂15からなる導電性ペーストを充填した状態を
示している。。次に図13は離型フィルム12を剥離し
た後表面に導電性ペーストを構成する金属14に対し標
準単極電位が卑な金属層17を形成した電解銅はく16
(35ミクロン厚)を両面に重ね合わせた状態、図14
は積み重ねた後、真空熱プレスにより摂氏200度、3
0kg/cm2、1時間の条件で加熱加圧接着した状態を示し
ている。
FIG. 12 shows a state in which through holes 13 are filled with a conductive paste composed of metal particles 14 and an epoxy resin 15 by a printing method using the release film 12 as a mask. . Next, FIG. 13 shows an electrolytic copper foil 16 in which a metal layer 17 having a standard single-pole electric potential is formed on the surface of the metal 14 constituting the conductive paste after the release film 12 is peeled off.
(35 micron thick) on both sides, Fig. 14
After stacking, vacuum heat press at 200 degrees Celsius, 3
The figure shows the state of heating and pressurizing adhesion under the conditions of 0 kg / cm 2 and 1 hour.

【0023】図15は表面の銅箔をエッチング法をもち
いて回路銅箔を形成して両面プリント配線板を得た状態
を示している。図10から図15を用いて説明した方法
により2組の両面板を作製する。
FIG. 15 shows a state in which a double-sided printed wiring board is obtained by forming a circuit copper foil by using an etching method on the surface copper foil. Two sets of double-sided plates are manufactured by the method described with reference to FIGS.

【0024】次の図16は図10から図15を用いて説
明した方法により得られた両面プリント配線板を外層板
としてその間に、前記の導電性ペースト充填後離型フィ
ルム2を剥離したプリプレグを中間接続体として重ね合
わせた状態を示したものである。
Next, FIG. 16 shows a prepreg in which the double-sided printed wiring board obtained by the method described with reference to FIGS. 10 to 15 is used as an outer layer board and the release film 2 is peeled off after filling the conductive paste. It shows a state in which they are superposed as an intermediate connector.

【0025】図17は積み重ねた後、真空熱プレスによ
り摂氏200度、30kg/cm2、1時間の条件で加熱加圧
接着して本発明の多層プリント配線板を得た状態を示し
ている。前記製造方法にて導電性ペーストを構成する金
属14及び電解銅はく表面に形成した金属層15を形成
する金属は実施例1で示した表1に示したものについて
多層プリント配線板を作製し、プレッシヤークッカー法
(摂氏121度、2気圧、1時間)にて加速試験を行い
回路層間の接続抵抗変化により信頼性検討を行った。そ
の結果導電性ペーストを構成する金属に対し標準単極電
位が卑な金属層を介して導電性ペーストと回路銅箔を接
続した層間接続抵抗は変化が認められなかった。しかし
導電性ペーストを構成する金属と電解銅箔表面に形成し
た金属層を形成する金属が同一金属の場合は層間接続抵
抗が劣化した。
FIG. 17 shows a state in which, after stacking, the multilayer printed wiring board of the present invention is obtained by heating and pressurizing under a condition of 200 ° C., 30 kg / cm 2, and 1 hour by vacuum hot pressing. The metal 14 forming the conductive paste and the metal forming the metal layer 15 formed on the surface of the electro-deposited copper foil by the above-mentioned manufacturing method are the same as those shown in Table 1 shown in Example 1, and a multilayer printed wiring board is prepared. An acceleration test was performed by the pressure cooker method (121 degrees Celsius, 2 atmospheres, 1 hour), and reliability was examined by changing the connection resistance between circuit layers. As a result, no change was observed in the inter-layer connection resistance between the conductive paste and the circuit copper foil via the metal layer having a standard single-pole potential that is base with respect to the metal forming the conductive paste. However, when the metal forming the conductive paste and the metal forming the metal layer formed on the surface of the electrolytic copper foil are the same metal, the interlayer connection resistance deteriorates.

【0026】[0026]

【発明の効果】以上のように本発明は、導電性ペースト
で回路層間を接続したプリント配線板において導電性ペ
ーストと回路銅箔が導電性ペーストを構成する金属に対
し標準単極電位が卑な金属層を介して接続することによ
り導電性ペーストを構成する金属の腐食は抑制され回路
層間の接続抵抗劣化が防止できる。
As described above, according to the present invention, in a printed wiring board in which circuit layers are connected by a conductive paste, the conductive paste and the circuit copper foil have a standard monopolar potential that is base with respect to the metal forming the conductive paste. By connecting via the metal layer, corrosion of the metal forming the conductive paste is suppressed and deterioration of connection resistance between circuit layers can be prevented.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例1における印刷配線板の製造方
法の工程説明のための断面図
FIG. 1 is a sectional view for explaining a process of a method for manufacturing a printed wiring board according to a first embodiment of the present invention.

【図2】同実施例1における印刷配線板の製造方法の工
程説明のための断面図
FIG. 2 is a cross-sectional view for explaining steps of the method for manufacturing a printed wiring board according to the first embodiment.

【図3】同実施例1における印刷配線板の製造方法の工
程説明のための断面図
FIG. 3 is a cross-sectional view for explaining the steps of the method for manufacturing a printed wiring board according to the first embodiment.

【図4】同実施例1における印刷配線板の製造方法の工
程説明のための断面図
FIG. 4 is a cross-sectional view for explaining the steps of the method for manufacturing a printed wiring board according to the first embodiment.

【図5】同実施例1における印刷配線板の製造方法の工
程説明のための断面図
FIG. 5 is a cross-sectional view for explaining the steps of the method for manufacturing a printed wiring board according to the first embodiment.

【図6】同実施例1における印刷配線板の製造方法の工
程説明のための断面図
FIG. 6 is a cross-sectional view for explaining the steps of the method for manufacturing a printed wiring board according to the first embodiment.

【図7】同実施例1における印刷配線板の製造方法の工
程説明のための断面図
FIG. 7 is a cross-sectional view for explaining the steps of the method for manufacturing a printed wiring board according to the first embodiment.

【図8】同実施例1における印刷配線板の製造方法の工
程説明のための断面図
FIG. 8 is a cross-sectional view for explaining the steps of the method for manufacturing a printed wiring board according to the first embodiment.

【図9】同実施例1における印刷配線板の製造方法の工
程説明のための断面図
FIG. 9 is a sectional view for explaining a process of the method for manufacturing a printed wiring board according to the first embodiment.

【図10】本発明の実施例2における印刷配線板の製造
方法の工程説明のための断面図
FIG. 10 is a cross-sectional view for explaining the steps of the method for manufacturing a printed wiring board according to the second embodiment of the present invention.

【図11】同実施例2における印刷配線板の製造方法の
工程説明のための断面図
FIG. 11 is a cross-sectional view for explaining the steps of the method for manufacturing a printed wiring board according to the second embodiment.

【図12】同実施例2における印刷配線板の製造方法の
工程説明のための断面図
FIG. 12 is a cross-sectional view for explaining the steps of the method for manufacturing a printed wiring board according to the second embodiment.

【図13】同実施例2における印刷配線板の製造方法の
工程説明のための断面図
FIG. 13 is a cross-sectional view for explaining the steps of the method for manufacturing a printed wiring board according to the second embodiment.

【図14】同実施例2における印刷配線板の製造方法の
工程説明のための断面図
FIG. 14 is a cross-sectional view for explaining the steps of the method for manufacturing a printed wiring board according to the second embodiment.

【図15】同実施例2における印刷配線板の製造方法の
工程説明のための断面図
FIG. 15 is a cross-sectional view for explaining the steps of the method for manufacturing a printed wiring board according to the second embodiment.

【図16】同実施例2における印刷配線板の製造方法の
工程説明のための断面図
FIG. 16 is a cross-sectional view for explaining the steps of the method for manufacturing a printed wiring board according to the second embodiment.

【図17】同実施例2における印刷配線板の製造方法の
工程説明のための断面図
FIG. 17 is a cross-sectional view for explaining the steps of the method for manufacturing a printed wiring board according to the second embodiment.

【符号の説明】[Explanation of symbols]

1 アラミド不織布エホキシ樹脂プリプレグ 2 離型フィルム 3 スルーホール 4 導電性ペーストを構成する金属粒子 5 導電性ペーストを構成するエポキシ樹脂 6 電解銅箔 7 導電性ペーストを構成する金属に対し標準電極電位
が卑な金属層 11 アラミド不織布エホキシ樹脂プリプレグ 12 離型フィルム 13 スルーホール 14 導電性ペーストを構成する金属粒子 15 導電性ペーストを構成するエポキシ樹脂 16 電解銅箔 17 導電性ペーストを構成する金属に対し標準電極電
位が卑な金属層
1 Aramid Nonwoven Epoxy Resin Prepreg 2 Release Film 3 Through Hole 4 Metal Particles Constituting the Conductive Paste 5 Epoxy Resin Constituting the Conductive Paste 6 Electrolytic Copper Foil 7 Standard Electrode Potential for the Metal Constituting the Conductive Paste Metal layer 11 Aramid nonwoven fabric epoxy resin prepreg 12 Release film 13 Through hole 14 Metal particles constituting conductive paste 15 Epoxy resin constituting conductive paste 16 Electrolytic copper foil 17 Standard electrode for metal constituting conductive paste Metal layer with low base potential

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H05K 3/46 S 6921−4E (72)発明者 川北 晃司 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 (72)発明者 小川 立夫 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 (72)発明者 小島 環生 大阪府門真市大字門真1006番地 松下電器 産業株式会社内─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification number Internal reference number FI Technical indication location H05K 3/46 S 6921-4E (72) Inventor Koji Kawakita 1006 Kadoma, Kadoma-shi, Osaka Matsushita Electric Sangyo Co., Ltd. (72) Inventor Tatsuo Ogawa 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (72) Ino Tamao Kojima 1006 Kadoma, Kadoma City, Osaka Matsushita Electric Industrial Co., Ltd.

Claims (11)

【特許請求の範囲】[Claims] 【請求項1】導電性ペーストで回路層間を接続したプリ
ント配線板であって、導電性ペーストと回路銅箔が導電
性ペーストを構成する金属に対し標準単極電位が卑な金
属層を介して接続することを特徴とするプリント配線
板。
1. A printed wiring board in which circuit layers are connected by a conductive paste, wherein the conductive paste and the circuit copper foil form a conductive paste through a metal layer whose standard single-pole potential is base. A printed wiring board characterized by being connected.
【請求項2】導電性ペーストを構成する金属が銅である
ことを特徴とする請求項1記載のプリント配線板。
2. The printed wiring board according to claim 1, wherein the metal forming the conductive paste is copper.
【請求項3】金属層が亜鉛もしくは亜鉛合金であること
を特徴とする請求項1記載のプリント配線板。
3. The printed wiring board according to claim 1, wherein the metal layer is zinc or a zinc alloy.
【請求項4】導電性ペーストを構成する金属に対し標準
単極電位が卑な金属層が亜鉛もしくは亜鉛合金であっ
て、あらかじめ銅箔の表面に形成していることを特徴と
する請求項1記載のプリント配線板。
4. A metal layer whose standard single-pole potential is base with respect to the metal constituting the conductive paste is zinc or a zinc alloy, and is formed in advance on the surface of the copper foil. Printed wiring board described.
【請求項5】導電性ペーストを構成する金属に対し標準
単極電位が卑な金属層を表面に形成した銅箔と両面に離
型フィルムを熱圧着後スルーホールを形成し、前記スル
ーホール内に前記導電性ペーストを充填し、前記離型フ
ィルムを除去したプリプレグを加熱加圧により接着する
ことを特徴とする両面プリント配線板の製造方法。
5. A copper foil on the surface of which a metal layer having a standard single-pole potential is base with respect to the metal constituting the conductive paste and a release film are thermocompression-bonded on both sides to form through holes, and the inside of the through holes is formed. A method for producing a double-sided printed wiring board, which comprises filling the conductive paste with the conductive paste and bonding the prepreg from which the release film has been removed by heating and pressing.
【請求項6】導電性ペーストを構成する金属に対し標準
単極電位が卑な金属層を表面に形成した銅箔と両面に離
型フィルムを熱圧着後スルーホールを形成し、前記スル
ーホール内に導電性ペーストを充填し、前記離型フィル
ムを除去したプリプレグを加熱加圧により接着した両面
プリント基板の両面に前記プリプレクと同様に作製した
プリプレグ及び前記銅箔の順序で積み重ね、加熱加圧に
より積層する事を特徴とする多層プリント配線板の製造
方法。
6. A copper foil on the surface of which a metal layer having a standard single-pole potential is base with respect to the metal constituting the conductive paste and a release film are thermocompression-bonded on both surfaces to form a through hole, and the inside of the through hole is formed. Filled with a conductive paste, the prepreg from which the release film has been removed is laminated by heating and pressing on both surfaces of the double-sided printed circuit board in the same order as the prepreg and the copper foil prepared in the same manner as the prepreg, and by heat and pressure. A method for manufacturing a multilayer printed wiring board, which is characterized by stacking layers.
【請求項7】導電性ペーストを構成する金属が銅である
ことを特徴とする請求項6記載の多層プリント配線板の
製造方法。
7. The method for manufacturing a multilayer printed wiring board according to claim 6, wherein the metal forming the conductive paste is copper.
【請求項8】金属層が亜鉛もしくは亜鉛合金であること
を特徴とする請求項6記載の多層プリント配線板の製造
方法。
8. The method for manufacturing a multilayer printed wiring board according to claim 6, wherein the metal layer is zinc or a zinc alloy.
【請求項9】導電性ペーストを構成する金属に対し標準
単極電位が卑な金属層を表面に形成した銅箔と両面に離
型フィルムを熱圧着後スルーホールを形成し、前記スル
ーホール内に前記導電性ペーストを充填し、離型フィル
ムを除去したプリプレグを加熱加圧により接着した複数
の両面プリント基板の間に前記プリプレクと同様に作製
したプリプレグを中間接続体として挟持し積み重ねた
後、加熱加圧により積層する事を特徴とする多層プリン
ト配線板の製造方法。
9. A copper foil on the surface of which a metal layer having a standard single-pole potential is base with respect to the metal constituting the conductive paste and release films are thermocompression-bonded on both sides to form through holes, and the inside of the through holes is formed. After filling the conductive paste, sandwiching and stacking a prepreg prepared as in the prepreg as an intermediate connector between a plurality of double-sided printed circuit boards where the release film is removed and the prepreg is adhered by heating and pressing, A method for manufacturing a multilayer printed wiring board, which comprises laminating by heating and pressing.
【請求項10】導電性ペーストを構成する金属が銅であ
ることを特徴とする請求項9記載の多層プリント配線板
の製造方法。
10. The method for manufacturing a multilayer printed wiring board according to claim 9, wherein the metal forming the conductive paste is copper.
【請求項11】金属層が亜鉛もしくは亜鉛合金であるこ
とを特徴とする請求項9記載の多層プリント配線板の製
造方法。
11. The method for manufacturing a multilayer printed wiring board according to claim 9, wherein the metal layer is zinc or a zinc alloy.
JP26218393A 1993-10-20 1993-10-20 Printed wiring board and method of manufacturing the same Expired - Lifetime JP3094754B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26218393A JP3094754B2 (en) 1993-10-20 1993-10-20 Printed wiring board and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26218393A JP3094754B2 (en) 1993-10-20 1993-10-20 Printed wiring board and method of manufacturing the same

Publications (2)

Publication Number Publication Date
JPH07115255A true JPH07115255A (en) 1995-05-02
JP3094754B2 JP3094754B2 (en) 2000-10-03

Family

ID=17372225

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26218393A Expired - Lifetime JP3094754B2 (en) 1993-10-20 1993-10-20 Printed wiring board and method of manufacturing the same

Country Status (1)

Country Link
JP (1) JP3094754B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002056651A1 (en) * 2001-01-15 2002-07-18 Matsushita Electric Industrial Co., Ltd. Circuit board and production method thereof
JP2007103698A (en) * 2005-10-05 2007-04-19 Fujikura Ltd Wiring board
JP2011159966A (en) * 2010-01-07 2011-08-18 Hitachi Chem Co Ltd Surface processing method for wiring board, and wiring board processed by the surface processing method

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101782159B1 (en) * 2016-11-15 2017-09-26 김광희 Hypothetical Pipe Rack Structure

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002056651A1 (en) * 2001-01-15 2002-07-18 Matsushita Electric Industrial Co., Ltd. Circuit board and production method thereof
US7423222B2 (en) 2001-01-15 2008-09-09 Matsushita Electric Industrial Co., Ltd. Circuit board and method of manufacturing the same
JP2007103698A (en) * 2005-10-05 2007-04-19 Fujikura Ltd Wiring board
JP2011159966A (en) * 2010-01-07 2011-08-18 Hitachi Chem Co Ltd Surface processing method for wiring board, and wiring board processed by the surface processing method

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