JP2010028028A - Multilayer printed wiring board and its manufacturing method - Google Patents

Multilayer printed wiring board and its manufacturing method Download PDF

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Publication number
JP2010028028A
JP2010028028A JP2008190958A JP2008190958A JP2010028028A JP 2010028028 A JP2010028028 A JP 2010028028A JP 2008190958 A JP2008190958 A JP 2008190958A JP 2008190958 A JP2008190958 A JP 2008190958A JP 2010028028 A JP2010028028 A JP 2010028028A
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wiring board
printed wiring
multilayer printed
conductor
conductive paste
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Yoshito Hotta
良人 堀田
Yoshina Miyazaki
芳奈 宮崎
Masahiko Ishimaru
誠彦 石丸
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Dexerials Corp
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Sony Chemical and Information Device Corp
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<P>PROBLEM TO BE SOLVED: To provide a multilayer printed wiring board in which a conductor pattern layer is connected surely, a connecting part is low in electrical resistance and the surface of the connecting part is formed flat, and to provide its manufacturing method. <P>SOLUTION: The multilayer printed wiring board is provided with a plurality of conductor pattern layers 24 made of copper foil or the like with an insulating base material 22 made of a resin therebetween, and an interlayer connection part 38 such as a via hole or the like for conducting the conductor pattern layers 24 with each other. A counterbored part 30 made small in thickness is formed at the connecting part 26 of copper foil or the like of the conductor pattern layer 24 connected to the interlayer connecting part 38. The counterbored part 30 is filled with a conductor such as a metallic filler or the like, which is put into the interlayer connecting part 38. The counterbored part 30 is formed by half etching. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、両面プリント配線板を含む複数の導体パターン層を備えた多層プリント配線板であって、各導体パターン層間の導通を図るためのビアホール等の層間接続構造を備えた多層プリント配線板とその製造方法に関する。   The present invention is a multilayer printed wiring board provided with a plurality of conductor pattern layers including a double-sided printed wiring board, and includes a multilayer printed wiring board provided with an interlayer connection structure such as a via hole for conducting between the conductive pattern layers. It relates to the manufacturing method.

従来、多層プリント配線板の各導体パターン層間の導通を図る構造としては、ドリルやレーザにより絶縁層の基材にビアホールを形成し、その内面に銅メッキを施して、各層間の導通を図っていた。   Conventionally, as a structure for conducting conduction between each conductive pattern layer of a multilayer printed wiring board, via holes are formed in the base material of the insulating layer by a drill or a laser, and copper plating is applied to the inner surface thereof to achieve conduction between the respective layers. It was.

また近年、両面プリント配線板を含む多層プリント配線板の複数層の各導体パターン層間の導通を図るために、ビアホールに導電性ペーストを充填したものがある。このような多層プリント配線板の製造方法は、例えば図4のフローチャートのステップS1〜S8に示すような工程により製造される。先ず、絶縁層を形成するアラミドエポキシシートなどの絶縁性基材を構成するプリプレグに、ドリル加工やレーザ加工などの孔形成手段により貫通孔を設ける(S1)。このプリプレグの両面には保護フィルムが貼付されており、保護フィルムともに貫通孔を形成する。この後、基材のプリプレグの裏面であるB面にマスキングフィルムを貼付して(S2)、貫通孔内の滓等のスミアを除去する(S3)。そして、表面側から、貫通孔を介してスキージ操作などの充填手段により導電性ペーストを貫通孔に充填する(S4)。導電性ペーストは、エポキシ樹脂等の熱硬化性樹脂中にAgやCu等の金属粒子が分散したものである。次に、保護フィルム及びマスキングフィルムを剥離し(S5)、プリプレグ両面に銅箔を張り合わせて熱プレスし固定する(S6)。そして、所定のマスクにより銅箔のパターンニングを行い回路形成して(S7)、次工程の多層化工程へ移行する(S8)。   In recent years, in order to conduct electricity between a plurality of conductive pattern layers of a multilayer printed wiring board including a double-sided printed wiring board, there is one in which a via hole is filled with a conductive paste. Such a method for manufacturing a multilayer printed wiring board is manufactured, for example, by steps shown in steps S1 to S8 in the flowchart of FIG. First, a through hole is provided in a prepreg constituting an insulating base material such as an aramid epoxy sheet for forming an insulating layer by a hole forming means such as drilling or laser processing (S1). A protective film is affixed to both sides of the prepreg, and through holes are formed together with the protective film. Then, a masking film is stuck on the B surface which is the back surface of the prepreg of the substrate (S2), and smears such as wrinkles in the through holes are removed (S3). Then, the conductive paste is filled into the through hole from the surface side by a filling means such as a squeegee operation through the through hole (S4). The conductive paste is obtained by dispersing metal particles such as Ag and Cu in a thermosetting resin such as an epoxy resin. Next, the protective film and the masking film are peeled off (S5), and copper foil is laminated on both sides of the prepreg, and is hot-pressed and fixed (S6). Then, patterning of the copper foil is performed with a predetermined mask to form a circuit (S7), and the process proceeds to the next multilayering process (S8).

この製造工程により、導電性ペーストを介して各層の導体パターン間の導通を図った多層プリント配線板を形成している。   By this manufacturing process, a multilayer printed wiring board is formed in which conduction between the conductive patterns of the respective layers is achieved via a conductive paste.

また、特許文献1及び図5に示すように、両面銅張り板を用いて、熱硬化性樹脂をビアホールに充填して多層プリント配線板を形成するものもある。この多層プリント配線板の製造方法は、まず、図5(a)に示すように両面に銅箔2が張り付けられた絶縁性の基材1に対して、図5(b)に示すようにドリル加工やレーザ加工などの孔形成手段により貫通孔4を設ける。次に、図5(c)に示すように、この貫通孔4に対応した透孔3を有した金属や樹脂などのマスク6を基材1に密着させ、図5(d)に示すように、このマスク6の透孔3を介してスキージ操作などの充填手段により導電性ペースト5を貫通孔4に充填する。マスク6の透孔3の基材1に接する面の孔径は、基材1の貫通孔4の孔径より僅かに小さく設定されている。この時、導電性ペースト5の量が貫通孔4の容積より多くなるように、マスク6の厚みと導電性ペースト5の充填条件を設定する。   In addition, as shown in Patent Document 1 and FIG. 5, there is a type in which a multilayer printed wiring board is formed by filling a via hole with a thermosetting resin using a double-sided copper-clad board. In this multilayer printed wiring board manufacturing method, first, as shown in FIG. 5 (b), a drill is applied to an insulating base material 1 having copper foils 2 attached on both sides as shown in FIG. 5 (a). The through hole 4 is provided by hole forming means such as processing or laser processing. Next, as shown in FIG. 5C, a metal or resin mask 6 having a through hole 3 corresponding to the through hole 4 is brought into close contact with the base material 1, and as shown in FIG. Then, the conductive paste 5 is filled into the through hole 4 by filling means such as a squeegee operation through the through hole 3 of the mask 6. The hole diameter of the surface of the through hole 3 of the mask 6 in contact with the base material 1 is set slightly smaller than the hole diameter of the through hole 4 of the base material 1. At this time, the thickness of the mask 6 and the filling condition of the conductive paste 5 are set so that the amount of the conductive paste 5 is larger than the volume of the through hole 4.

次に、図5(e)に示すように、マスク6を除去する。その後、図5(f)に示すように、基材1の上下両面にポリイミド、ポリファニレンスルファイドあるいはポリエーテルエーテルケトンなどの弾性を有する耐熱性フィルム7を載置した状態で、図示しない加熱プレス装置等を用いて、160〜200℃で20〜60kg/cm2の条件下で30〜180分間加熱加圧す。これにより、導電性ペースト5を貫通孔4内に加圧されて硬化され、基材1の両面に設けられた銅箔2と導電性ペースト5が確実に電気的に接続する。このとき、マスク6の厚み分の導電性ペースト5が余計に充填されているが、これにより、加熱プレスにより確実に貫通孔4内に導電性ペースト5が充填され、抵抗値を安定化している。その後、耐熱性フィルム7を除去して、エッチングなどにより、外層の銅箔2を所定の導体パターン8に形成する。そして、図5(g)に示すように両面の導体パターン8がビアホール9により電気的に接続された両面プリント配線板10が形成される。 Next, as shown in FIG. 5E, the mask 6 is removed. Thereafter, as shown in FIG. 5 (f), heating (not shown) is performed in a state where the heat-resistant film 7 having elasticity such as polyimide, polyphenylene sulfide, or polyether ether ketone is placed on the upper and lower surfaces of the base material 1. Using a press device or the like, heating and pressurization is performed at 160 to 200 ° C. under a condition of 20 to 60 kg / cm 2 for 30 to 180 minutes. Thereby, the conductive paste 5 is pressed into the through-hole 4 and cured, and the copper foil 2 provided on both surfaces of the substrate 1 and the conductive paste 5 are reliably electrically connected. At this time, the conductive paste 5 corresponding to the thickness of the mask 6 is excessively filled, so that the conductive paste 5 is reliably filled into the through-holes 4 by the heating press, and the resistance value is stabilized. . Thereafter, the heat resistant film 7 is removed, and the outer layer copper foil 2 is formed on the predetermined conductor pattern 8 by etching or the like. Then, as shown in FIG. 5G, a double-sided printed wiring board 10 in which the conductive patterns 8 on both sides are electrically connected by via holes 9 is formed.

また、ビアホール内に充填する導電性材料として、より電気的抵抗の低い材料としてビアホール内で金属導体が金属結合して存在するものも提案されている。このような導電体ペーストを用いた多層プリント配線板の製造方法は、図6のフローチャートのステップS1〜S8に示すような工程により製造される。先ず、両面銅張り板を用いて、その表面であるA面にマスキングフィルムを貼付し(S1)、絶縁性の基材の所定位置にレーザ加工やドリル加工等により貫通孔を形成する(S2)。この後、加工によるスミアを除去し(S3)、マスキングフィルムを介して導電性ペーストを貫通孔内に充填する(S4)。ここで充填する導電性ペーストは、特許文献2に開示されているような、熱可塑性樹脂中に低融点金属等の金属粒子が混合され、後の加熱処理により貫通孔内で合金化するものである。この後、マスキングフィルムを剥離し(S5)、180〜300℃程度の温度に真空中で加熱し、プレスして貫通孔内の導電性ペーストを合金化し硬化させる(S6)。この後、絶縁層の基材表面の銅箔に所定のパターンニングを行い回路パターン形成し(S7)、さらに次工程の多層化工程へ移行する(S8)。
特開平9−232059号公報 特開2006−165508号公報
In addition, as a conductive material filled in the via hole, a material having a lower electrical resistance and a metal conductor present in the via hole by metal bonding has been proposed. The manufacturing method of the multilayer printed wiring board using such an electrically conductive paste is manufactured by the process as shown to step S1-S8 of the flowchart of FIG. First, using a double-sided copper-clad plate, a masking film is affixed to surface A, which is the surface (S1), and a through hole is formed at a predetermined position of the insulating base material by laser processing, drilling, or the like (S2). . Thereafter, smear due to processing is removed (S3), and the conductive paste is filled into the through-holes via the masking film (S4). The conductive paste to be filled here is one in which metal particles such as a low melting point metal are mixed in a thermoplastic resin as disclosed in Patent Document 2 and alloyed in the through-hole by a subsequent heat treatment. is there. Thereafter, the masking film is peeled off (S5), heated in a vacuum to a temperature of about 180 to 300 ° C., and pressed to alloy and harden the conductive paste in the through hole (S6). Thereafter, predetermined patterning is performed on the copper foil on the surface of the base material of the insulating layer to form a circuit pattern (S7), and the process proceeds to the next multilayering process (S8).
Japanese Patent Laid-Open No. 9-232059 JP 2006-165508 A

しかしながら、ビアホール内面にメッキを施した層間接続構造は、品質の安定化のためのメッキ液の管理が難しいものであった。さらに、装置が大型化し、きめ細かな対応ができないものであり、コストもかかるものであった。   However, the interlayer connection structure in which the inner surface of the via hole is plated is difficult to manage the plating solution for stabilizing the quality. In addition, the apparatus has become large in size and cannot cope with the details, and costs have been increased.

また、図4、図5及び特許文献1に示すような熱硬化性樹脂を用いた導電性ペーストによる層間接続構造の多層プリント配線板の場合、AgやCu微粒子を含む導電性ペーストのコストが高く、しかも各金属粒子は物理的に接触して導通しているだけであるので、ビアホールの電気抵抗が比較的大きいものであった。   In the case of a multilayer printed wiring board having an interlayer connection structure using a conductive paste using a thermosetting resin as shown in FIGS. 4 and 5 and Patent Document 1, the cost of the conductive paste containing Ag and Cu fine particles is high. Moreover, since each metal particle is only in physical contact and conduction, the electrical resistance of the via hole is relatively large.

さらに、図6に示す製造方法により形成したビアホールの構造は、図7に示すように、絶縁性の基材1の両面に銅箔2が張り付けられた両面銅張り板に、マスク16を介して貫通孔14に導電性ペースト15を充填するので、導電性ペースト15の体積は、マスク孔16aの空間分だけ、基材1の貫通孔14の体積よりも大きいものである。この状態で、加熱してプレスするとその余剰な導電性ペースト15aが銅箔2の接続部2aの周囲に広がるとともに接続部2aの表面よりも盛り上がって形成される。これにより、多層プリント配線板の平坦性を損ね、多層化の層数を多くすることの妨げともなっていた。   Furthermore, the structure of the via hole formed by the manufacturing method shown in FIG. 6 is such that, as shown in FIG. 7, a double-sided copper-clad plate in which copper foil 2 is attached to both sides of an insulating base material 1 is interposed via a mask 16. Since the through-hole 14 is filled with the conductive paste 15, the volume of the conductive paste 15 is larger than the volume of the through-hole 14 of the substrate 1 by the space of the mask hole 16 a. In this state, when heated and pressed, the excess conductive paste 15a spreads around the connection portion 2a of the copper foil 2 and rises above the surface of the connection portion 2a. This impairs the flatness of the multilayer printed wiring board and hinders the increase in the number of layers.

本発明は、上記背景技術に鑑みて成されたもので、導体パターン層との接続が確実であり接続部分の電気抵抗も小さく、接続部の表面が平坦に形成される多層プリント配線板とその製造方法を提供することを目的とする。   The present invention has been made in view of the above-mentioned background art, and is a multilayer printed wiring board in which the connection with the conductor pattern layer is reliable, the electric resistance of the connection portion is small, and the surface of the connection portion is formed flat. An object is to provide a manufacturing method.

この発明は、樹脂製の絶縁性基材を挟んで設けられた複数層の銅箔等の導体パターン層と、前記各導体パターン層間の導通を図るビアホール等の層間接続部とを備え、前記層間接続部に接続した前記導体パターン層の銅箔等の接続部には、厚みを薄くした座繰り部が形成され、前記層間接続部の導体が前記座繰り部に接している多層プリント配線板である。   The present invention includes a conductive pattern layer such as a plurality of layers of copper foil provided between resin-made insulating bases, and an interlayer connection portion such as a via hole for conducting between the conductive pattern layers. A multilayer printed wiring board in which a countersink portion with a reduced thickness is formed in a connection part such as a copper foil of the conductor pattern layer connected to the connection part, and a conductor of the interlayer connection part is in contact with the countersink part is there.

前記座繰り部には、前記層間接続部内に充填された金属充填材等の導体が充填されているものである。   The counterbored portion is filled with a conductor such as a metal filler filled in the interlayer connection portion.

またこの発明は、複数層の銅箔等の導体パターン層が樹脂製の絶縁性の基材を挟んで形成され、各導体パターン層間を接続する貫通孔を基材に形成して、この貫通孔に前記導体パターン層を接続する金属充填材等を充填して導体接続部を形成する多層プリント配線板の製造方法であって、前記各導体パターン層の接続部の厚みを部分的に薄くした座繰り部を形成した後、前記座繰り部に接続する導体接続部を形成する多層プリント配線板の製造方法である。   Further, according to the present invention, a conductive pattern layer such as a plurality of layers of copper foil is formed with a resin insulating base material sandwiched therebetween, and through holes connecting between the conductive pattern layers are formed in the base material. A method of manufacturing a multilayer printed wiring board in which a conductor connecting portion is formed by filling a metal filler or the like for connecting the conductor pattern layer, wherein the thickness of the connecting portion of each conductor pattern layer is partially reduced It is a manufacturing method of the multilayer printed wiring board which forms the conductor connection part connected to the said countersink part after forming a repeat part.

前記座繰り部の形成は、エッチング液による化学的なエッチングや、プラズマやレーザによる物理的なエッチングにより、前記接続部の厚みを部分的に薄くするハーフエッチングを行うものである。   The counterbored portion is formed by half etching in which the thickness of the connecting portion is partially reduced by chemical etching with an etching solution or physical etching with plasma or laser.

また、前記導体接続部の形成は、前記貫通孔の体積よりも多い導電性ペーストを前記貫通孔内に充填し、前記導電性ペーストを加圧して、前記座繰り部に前記導電性ペーストを収容するものである。   The conductor connection portion is formed by filling the through hole with a conductive paste larger than the volume of the through hole, pressurizing the conductive paste, and storing the conductive paste in the countersunk portion. To do.

前記導電性ペーストは、熱可塑性樹脂のバインダ中に金属粒子を含むもので、前記導電性ペーストを加圧して加熱することにより溶融し、冷却後に前記貫通孔内に金属材料による充填材が充填されて導体接続部が形成されるものである。   The conductive paste contains metal particles in a thermoplastic resin binder, melts by pressurizing and heating the conductive paste, and after cooling, the through hole is filled with a filler of a metal material. Thus, a conductor connecting portion is formed.

この発明の多層プリント配線板とその製造方法によれば、導体パターン層と導体接続部との接続が確実であり、接続部分の電気抵抗も小さく、導体接続部の表面が導体パターン層と同様の平坦な面に形成される。さらに、導体パターン層と導体接続部との接続強度も高く、信頼性の高い多層プリント配線板を形成することが出来る。   According to the multilayer printed wiring board and the manufacturing method thereof of the present invention, the connection between the conductor pattern layer and the conductor connection portion is reliable, the electrical resistance of the connection portion is small, and the surface of the conductor connection portion is the same as that of the conductor pattern layer. It is formed on a flat surface. Furthermore, the connection strength between the conductor pattern layer and the conductor connection portion is high, and a highly reliable multilayer printed wiring board can be formed.

以下、この発明の多層プリント配線板の一実施形態について、図1〜図3を基にして説明する。この実施形態の多層プリント配線板20は、図1、図3に示すように、絶縁層の基材22を挟んで複数の導体パターン層24が形成されたもので、導体パターン層24間には貫通孔23が形成され、金属充填材等による層間接続部38が設けられている。   Hereinafter, an embodiment of a multilayer printed wiring board according to the present invention will be described with reference to FIGS. As shown in FIGS. 1 and 3, the multilayer printed wiring board 20 of this embodiment has a plurality of conductor pattern layers 24 sandwiched between insulating base materials 22, and between the conductor pattern layers 24. A through hole 23 is formed, and an interlayer connection 38 made of a metal filler or the like is provided.

絶縁層の基材22は、ガラスエポキシ、ポリイミドあるいは紙フェノールなどよりなるプリント配線板を構成する絶縁性の基材から成り、両面に銅箔25が張り付けられたものである。その他、基材22は、ハンダ付け工程等における耐熱性を有するとともに、十分な機械強度を有する熱可塑性樹脂でも良い。例えば、全芳香族ポリエステル樹脂の液晶ポリマーを用いることも出来る。   The base material 22 of the insulating layer is made of an insulating base material that constitutes a printed wiring board made of glass epoxy, polyimide, paper phenol, or the like, and has a copper foil 25 attached to both surfaces. In addition, the base material 22 may be a thermoplastic resin having heat resistance in a soldering process or the like and sufficient mechanical strength. For example, a liquid crystal polymer of a wholly aromatic polyester resin can be used.

銅箔25は、所定の回路パターンに形成された導体パターン層24が設けられ、導体パターン層24は、回路パターンやそれに続く接続部26から構成されている。基材22を貫通した貫通孔23は、裏面の導体パターン層24の接続部26へは貫通されず、裏面側の接続部26の銅箔25に繋がっている。また、表面側の導体パターン層24にも接続部26が形成され、基材22の表裏の導体パターン層24間の導通が図られている。   The copper foil 25 is provided with a conductor pattern layer 24 formed in a predetermined circuit pattern, and the conductor pattern layer 24 includes a circuit pattern and a connecting portion 26 subsequent thereto. The through hole 23 penetrating the base material 22 is not penetrated into the connection portion 26 of the conductor pattern layer 24 on the back surface, and is connected to the copper foil 25 of the connection portion 26 on the back surface side. Moreover, the connection part 26 is formed also in the conductor pattern layer 24 of the surface side, and conduction | electrical_connection between the conductor pattern layers 24 of the front and back of the base material 22 is aimed at.

表面側の導体パターン層24の接続部26には、銅箔25の厚みの約半分までを化学エッチング等により除去した座繰り部30が、貫通孔23に連通して形成されている。   In the connection part 26 of the conductor pattern layer 24 on the surface side, a countersink part 30 is formed in communication with the through hole 23 by removing up to about half of the thickness of the copper foil 25 by chemical etching or the like.

次に、この実施形態の多層プリント配線板の製造方法について図1の工程図、及び図2のフローチャートのステップS1〜S9を基に説明する。   Next, the manufacturing method of the multilayer printed wiring board of this embodiment is demonstrated based on process drawing of FIG. 1, and step S1-S9 of the flowchart of FIG.

先ず、図1(a)に示すように、両面銅張り板21を用いて、その両面にエッチングレジストのドライフィルム32を貼り付ける(S1)。ドライフィルム32は、所定パターンに露光され、ハーフエッチングにより形成する座繰り部30を形成する箇所に、エッチング時に開口32aが形成されるように設けられている。この状態で、図1(b)に示すように、両面銅張り板21の表面側の銅箔25の所定位置をエッチングし、ドライフィルム32の開口32aが形成された箇所で、銅箔25の座繰り部30形成部分をハーフエッチングする(S2)。ハーフエッチングは、導体パターン層24の接続部26を形成する箇所の内側に同心状に座繰り部30が形成されるように、硫酸過水等のエッチング液によるエッチング時間を調整し、銅箔25の厚さの約1/2が溶解した状態でエッチングを止める。また、プラズマ照射やレーザによる物理エッチングにより座繰り部30を形成しても良い。   First, as shown in FIG. 1A, using a double-sided copper-clad plate 21, a dry film 32 of an etching resist is pasted on both sides (S1). The dry film 32 is exposed to a predetermined pattern, and is provided so that an opening 32a is formed at a location where the counterbore 30 formed by half etching is formed. In this state, as shown in FIG. 1 (b), a predetermined position of the copper foil 25 on the surface side of the double-sided copper-clad plate 21 is etched, and at the place where the opening 32a of the dry film 32 is formed, A portion where the counterbore 30 is formed is half-etched (S2). In the half etching, the etching time with an etching solution such as sulfuric acid / hydrogen peroxide is adjusted so that the countersink portion 30 is formed concentrically inside the portion where the connection portion 26 of the conductor pattern layer 24 is formed, and the copper foil 25 Etching is stopped in a state where about 1/2 of the thickness of the film is dissolved. Further, the countersunk portion 30 may be formed by plasma irradiation or physical etching with a laser.

次に、図1(c)に示すように、両面銅張り板21の表面側であるA面にマスキングフィルム34を貼る(S3)。そして、炭酸ガスレーザやYAGレーザ、エキシマレーザ等を用いたレーザ加工により、図1(d)に示すような貫通孔23を形成する(S4)。この後、加工によるスミアを除去し、マスキングフィルム34を介して、スキージ操作などの充填手段により導電性ペースト36を貫通孔23内に充填する(S5)。銅箔25の厚みが薄く形成された座繰り部30は、貫通孔23内に充填された導電性ペースト36が加圧により、側方に部分的に鍔状に一部広がり充填されている。   Next, as shown in FIG.1 (c), the masking film 34 is stuck on the A surface which is the surface side of the double-sided copper-clad board 21 (S3). And the through-hole 23 as shown in FIG.1 (d) is formed by laser processing using a carbon dioxide laser, a YAG laser, an excimer laser, etc. (S4). Thereafter, the smear due to the processing is removed, and the conductive paste 36 is filled into the through hole 23 through the masking film 34 by filling means such as a squeegee operation (S5). The countersink part 30 in which the thickness of the copper foil 25 is formed is filled with a conductive paste 36 filled in the through-hole 23 partially in a bowl shape on the side by pressure.

ここで充填する導電性ペーストは、特許文献2に開示されているような、熱可塑性樹脂中に高融点金属と低融点金属の金属粒子が混合され、後の加熱処理で合金化するもの等である。例えば、高融点金属は、少なくとも銅を含み、銅単体の粒子、又は銅と金、銀、亜鉛、及びニッケルの内1つ以上の金属とを含む合金の粒子である。また、これら金属粒子の表面は、金、銀、亜鉛、又はニッケル、又はそれらの合金がメッキ等により被覆されていてもよい。これらの金属粒子の平均粒径は、6〜10μm例えば8μmである。また、低融点金属は、Sn、又はSnを含む合金(例えば、ハンダ)の粒子である。ハンダとしては、Sn−Cu系ハンダ、Sn−Ag系ハンダ、Sn−Ag−Cu系ハンダ、これらにIn、Zn、Biのいずれか一つ以上を添加し、さらに適宜混合して用いても良い。導電性ペースト36のバインダ樹脂は、熱可塑性樹脂である。例えば、ポリエステル、ポリオレフィン、ポリアクリル、ポリアミド、ポリアミドイミド、ポリエーテルイミド、ポリフェニレンエーテル、ポリフェニレンスルフィド、ポリビニルブチラールなどの熱可塑性樹脂を用いることが出来る。   The conductive paste filled here is, for example, disclosed in Patent Document 2, in which metal particles of a high melting point metal and a low melting point metal are mixed in a thermoplastic resin and alloyed by a subsequent heat treatment. is there. For example, the refractory metal includes at least copper, and is a particle of copper alone or an alloy particle including copper and one or more metals of gold, silver, zinc, and nickel. The surfaces of these metal particles may be coated with gold, silver, zinc, nickel, or an alloy thereof by plating or the like. The average particle diameter of these metal particles is 6 to 10 μm, for example 8 μm. The low melting point metal is Sn or an alloy (for example, solder) particles containing Sn. As the solder, Sn-Cu solder, Sn-Ag solder, Sn-Ag-Cu solder, any one or more of In, Zn, and Bi may be added to these solders, and further mixed as appropriate. . The binder resin of the conductive paste 36 is a thermoplastic resin. For example, thermoplastic resins such as polyester, polyolefin, polyacryl, polyamide, polyamideimide, polyetherimide, polyphenylene ether, polyphenylene sulfide, and polyvinyl butyral can be used.

導電性ペースト36の充填後、図1(e)に示すように、ドライフィルム32、マスキングフィルム34を除去する(S6)。そして、導電性ペースト36を図示しないポリイミド、ポリファニレンスルファイドあるいはポリエーテルエーテルケトンなどの耐熱性フィルムを介して金属板により挟持して、例えば180〜300℃程度の温度の真空中で加熱し、20〜60kg/cm2の条件下で30〜180分間加熱加圧して、貫通孔23内の導電性ペーストを合金化し硬化させる(S7)。加熱温度は、例えば導電性ペースト内の低融点金属の融点以上で、且つ基材22が変質せず、また、バインダ樹脂が溶融する温度以上である。 After filling with the conductive paste 36, as shown in FIG. 1E, the dry film 32 and the masking film 34 are removed (S6). Then, the conductive paste 36 is sandwiched between metal plates through a heat-resistant film such as polyimide, polyphenylene sulfide or polyether ether ketone (not shown), and heated in a vacuum of about 180 to 300 ° C., for example. It heats and pressurizes for 30 to 180 minutes under the condition of 20 to 60 kg / cm 2 to alloy and harden the conductive paste in the through hole 23 (S7). The heating temperature is, for example, not less than the melting point of the low melting point metal in the conductive paste, and not less than the temperature at which the base material 22 does not change and the binder resin melts.

この状態で、図1(f)に示すように、導電性ペースト36は金属材料による充填材からなる柱状の層間接続部38となる。このとき、導電性ペースト36は、貫通孔23の体積より余剰な分の導電性ペースト36は、プレスによる圧力で変形して側方に押しやられ、座繰り部30の空間内に広がる。そして、導電性ペースト36の接続部26の表面と面一の平面に形成される。この後、絶縁層の基材表面の銅箔に所定のパターンニングを行い回路パターン形成し(S8)、さらに次工程の多層化工程へ移行する(S9)。   In this state, as shown in FIG. 1F, the conductive paste 36 becomes a columnar interlayer connection portion 38 made of a filler made of a metal material. At this time, the conductive paste 36 in excess of the volume of the through hole 23 is deformed by the pressure by the press and is pushed to the side, and spreads in the space of the countersink 30. Then, the conductive paste 36 is formed on the same plane as the surface of the connection portion 26. Thereafter, predetermined patterning is performed on the copper foil on the surface of the base material of the insulating layer to form a circuit pattern (S8), and the process proceeds to the next multilayering process (S9).

この実施形態の多層プリント配線板によれば、貫通孔23に形成された層間接続部38の表面は、平坦な面に形成され、余剰な導電性ペースト36の金属充填材による盛り上がりがなく、多層化した場合も、多層プリント配線板20の平面性を維持することが出来る。また、接続部26との接続が座繰り部30の段になった部分であり、導電性ペースト36との接触面積が大きくなり、導電性ペースト36と接続部26との電気的接続が確実になり抵抗値も低く、電気的信頼性も高いものとすることが出来る。さらに、座繰り部30が形成されていることにより、貫通孔23の形成が容易となり、レーザ等の加工時間や出力を抑えることができる。   According to the multilayer printed wiring board of this embodiment, the surface of the interlayer connection portion 38 formed in the through hole 23 is formed on a flat surface, and there is no swell due to the metal filler of the excess conductive paste 36. Even in this case, the flatness of the multilayer printed wiring board 20 can be maintained. Further, the connection with the connection portion 26 is a stepped portion of the countersunk portion 30, the contact area with the conductive paste 36 is increased, and the electrical connection between the conductive paste 36 and the connection portion 26 is ensured. Therefore, the resistance value is low and the electrical reliability can be high. Furthermore, since the counterbore 30 is formed, the formation of the through hole 23 is facilitated, and the processing time and output of a laser or the like can be suppressed.

なお、この発明の多層プリント配線板とその製造方法は、上記実施形態に限定されるものではなく、両面プリント配線板以外のプリント配線板でも良く、3層以上の導体パターン層を備えた多層プリント配線板でも良い。導電性ペースト中の金属材料は、適宜選択可能なものであり、熱硬化性樹脂中に金属粒子を備えたものでも良く、非金属微粒子にSn−Agやその他低融点金属のメッキが施されたものを熱可塑性樹脂中に設けたものでも良い。   The multilayer printed wiring board and the manufacturing method thereof according to the present invention are not limited to the above embodiment, and may be a printed wiring board other than the double-sided printed wiring board, and may be a multilayer printed circuit having three or more conductive pattern layers. A wiring board may be used. The metal material in the conductive paste can be selected as appropriate, and the metal material may be provided with metal particles in a thermosetting resin, and Sn-Ag or other low melting point metal is plated on the non-metallic fine particles. A thing provided in a thermoplastic resin may be used.

この発明の一実施形態の多層プリント配線板の製造工程を示す概略縦断面図である。It is a schematic longitudinal cross-sectional view which shows the manufacturing process of the multilayer printed wiring board of one Embodiment of this invention. この発明の一実施形態の多層プリント配線板の製造工程を示すフローチャートである。It is a flowchart which shows the manufacturing process of the multilayer printed wiring board of one Embodiment of this invention. この発明の一実施形態の多層プリント配線板の層間接続部の縦断面図である。It is a longitudinal cross-sectional view of the interlayer connection part of the multilayer printed wiring board of one Embodiment of this invention. 従来の多層プリント配線板の製造工程を示すフローチャートである。It is a flowchart which shows the manufacturing process of the conventional multilayer printed wiring board. 従来の多層プリント配線板の製造工程を示す縦断面図である。It is a longitudinal cross-sectional view which shows the manufacturing process of the conventional multilayer printed wiring board. 従来の多層プリント配線板の製造工程を示すフローチャートである。It is a flowchart which shows the manufacturing process of the conventional multilayer printed wiring board. 従来の多層プリント配線板の層間接続部を示す縦断面図である。It is a longitudinal cross-sectional view which shows the interlayer connection part of the conventional multilayer printed wiring board.

符号の説明Explanation of symbols

20 多層プリント配線板
21 両面銅張り板
22 基材
24 導体パターン層
23 貫通孔
25 銅箔
26 接続部
30 座繰り部
36 導電性ペースト
38 層間接続部
20 multilayer printed wiring board 21 double-sided copper-clad board 22 base material 24 conductor pattern layer 23 through-hole 25 copper foil 26 connection part 30 countersink part 36 conductive paste 38 interlayer connection part

Claims (6)

絶縁性の基材を挟んで設けられた複数層の導体パターン層と、前記各導体パターン層間の導通を図る層間接続部とを備え、前記層間接続部に接続した前記導体パターン層の接続部には、厚みを薄くした座繰り部が形成され、前記層間接続部の導体が前記座繰り部に接していることを特徴とする多層プリント配線板。   Provided with a plurality of conductor pattern layers provided across an insulating base material, and an interlayer connection portion for conducting electrical conduction between the respective conductor pattern layers, the connection portion of the conductor pattern layer connected to the interlayer connection portion The multilayer printed wiring board is characterized in that a countersink portion having a reduced thickness is formed, and a conductor of the interlayer connection portion is in contact with the countersink portion. 前記座繰り部には、前記層間接続部内に充填された導体が充填されていることを特徴とする請求項1記載の多層プリント配線板。   2. The multilayer printed wiring board according to claim 1, wherein the counterbored portion is filled with a conductor filled in the interlayer connection portion. 複数層の導体パターン層が絶縁性の基材を挟んで形成され、各導体パターン層間を接続する貫通孔を基材に形成して、この貫通孔に前記導体パターン層を接続する導体接続部を形成する多層プリント配線板の製造方法において、前記各導体パターン層の接続部の厚みを部分的に薄くした座繰り部を形成した後、前記座繰り部に接続する導体接続部を形成することを特徴とする多層プリント配線板の製造方法。   A plurality of conductive pattern layers are formed with an insulating base material interposed therebetween, and through holes connecting between the conductive pattern layers are formed in the base material, and a conductor connection portion for connecting the conductive pattern layers to the through holes is provided. In the manufacturing method of the multilayer printed wiring board to be formed, after forming the countersunk part in which the thickness of the connection part of each conductor pattern layer is partially reduced, forming the conductor connection part connected to the countersink part A method for producing a multilayer printed wiring board, which is characterized. 前記座繰り部の形成は、ハーフエッチングによることを特徴とする請求項3記載の多層プリント配線板の製造方法。   4. The method of manufacturing a multilayer printed wiring board according to claim 3, wherein the countersink portion is formed by half etching. 前記導体接続部の形成は、前記貫通孔の体積よりも多い導電性ペーストを前記貫通孔内に充填し、前記導電性ペーストを加圧して、前記座繰り部に前記導電性ペーストを収容することを特徴とする請求項3記載の多層プリント配線板の製造方法。   The conductive connection portion is formed by filling the through hole with a conductive paste larger than the volume of the through hole, pressurizing the conductive paste, and storing the conductive paste in the countersink portion. The method for producing a multilayer printed wiring board according to claim 3. 前記導電性ペーストは、熱可塑性樹脂のバインダ中に金属粒子を含むもので、前記導電性ペーストを加圧して加熱することにより溶融し、冷却後に前記貫通孔内に金属材料による充填材が充填されて導体接続部が形成されることを特徴とする請求項3記載の多層プリント配線板の製造方法。

The conductive paste contains metal particles in a thermoplastic resin binder, melts by pressurizing and heating the conductive paste, and after cooling, the through hole is filled with a filler of a metal material. 4. The method of manufacturing a multilayer printed wiring board according to claim 3, wherein a conductor connecting portion is formed.

JP2008190958A 2008-07-24 2008-07-24 Multilayer printed wiring board and its manufacturing method Pending JP2010028028A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101951736A (en) * 2010-09-17 2011-01-19 深圳市集锦线路板科技有限公司 Process for producing circuit board metallized semi-holes
US8970042B2 (en) 2012-02-02 2015-03-03 Samsung Electronics Co., Ltd. Circuit board, comprising a core insulation film
WO2015146476A1 (en) * 2014-03-27 2015-10-01 ソニー株式会社 Mounting board, method for producing same, and method for mounting component

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101951736A (en) * 2010-09-17 2011-01-19 深圳市集锦线路板科技有限公司 Process for producing circuit board metallized semi-holes
US8970042B2 (en) 2012-02-02 2015-03-03 Samsung Electronics Co., Ltd. Circuit board, comprising a core insulation film
WO2015146476A1 (en) * 2014-03-27 2015-10-01 ソニー株式会社 Mounting board, method for producing same, and method for mounting component
JP2015188037A (en) * 2014-03-27 2015-10-29 ソニー株式会社 Mounting board, manufacturing method and component mounting system
CN106105405A (en) * 2014-03-27 2016-11-09 索尼公司 The method of installing plate, its manufacture method and installation elements
US9814139B2 (en) 2014-03-27 2017-11-07 Sony Semiconductor Solutions Corporation Mounting substrate, manufacturing method for the same, and component mounting method

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