JP3080619B2 - Disc playback device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a disk reproducing apparatus, and more particularly, to a disk in which a subcode such as time information is recorded together with an audio signal as main information, such as a digital audio disk, at N times speed operation. The present invention relates to a disk reproducing device.

[0002]

2. Description of the Related Art Japanese Patent Application Laid-Open No. Sho 62-150560 discloses a reproduction process in which N-times speed reproduction is performed, and intermittent access is performed when an information reading means is accidentally moved by an external force or the like during reproduction of a disc. As disclosed in Japanese Patent Application Laid-Open No. H11-284, while digital audio data reproduced from a compact disk (CD) is written into a memory and the information reading means is moved to a position before the track jump from the time when the track jump occurs, the data is read from the disk by the memory. There is known a technique in which writing of reproduction data is stopped and reading is performed at a constant period of a sampling frequency. According to this, reproduction data to be converted from digital to analog is not discontinuous, and can be reproduced continuously.

[0003]

In the above-mentioned prior art, an abnormal reproduction state such as generation of noise or a temporary suspension of reproduction may occur during a period from when the information reading means is accidentally moved to when it returns to a normal position. However, no consideration was given to data management for accurately and continuously connecting reproduced data. That is, the sub-code of the time information is output at the read timing in order to correspond to the read position of the disk, but the reproduced audio data is once written to the memory to absorb the uneven rotation of the disk, and is read from the crystal oscillator. Since the sub-code and the audio data are read at the timing specified by the clock of the constant frequency, an accurate one-to-one correspondence cannot be provided.

[0004] An object of the present invention is to solve the above-mentioned problem and to make the reproduced time information correspond exactly to the information data one-to-one. As a result, even if data is intermittently read from the disc, It is another object of the present invention to provide a disk reproducing apparatus capable of obtaining the information data at different output rates by accurately and continuously connecting the data using the information data and control information such as time information. .

[0005]

To achieve the above object of the Invention The present invention is, from the rotating disk so that the speed faster than the standard speed information data and said information data
A reproduction processing means for reproducing the control information about a storage means for storing said information data and said control information reproduced by the reproducing processing means, regeneration processing means the information data and該制
While reproducing the control information, based on the control information, the output rate of the information data output from the storage unit is
Determination processing means for determining whether to use the first output rate corresponding to the standard speed or the second output rate higher than the first output rate; And outputting the information data at one of the first output rate and the second output rate.

Further, according to the present invention, there is provided a reproduction processing means for reproducing information data and control information relating to the information data from a disk rotating at a speed higher than the standard speed, and a reproduction processing means for reproducing the information data. storage means for storing the information data and the control information is stored in the storage means
Utilizing the control information, the information data is stored in the storage unit.
Control means for controlling the storage means so as to be outputted from
The reproduction processing means reproduces the information data and the control information.
While the data is being generated, the output rate of the information data output from the storage means is set to a first output rate corresponding to the standard speed based on the control information, or the first output rate Determination processing means for determining whether to use a second output rate faster than the first output rate or the second output rate based on the determination result of the determination processing means. It is configured to output at any output rate. Here, the control information, before
Time information of the information data or the order of the information data
Indicating the time information.
The information data will be output in the order of the time indicated by the information
Thus, the storage means is controlled.

Further, according to the present invention , the information data is stored at a predetermined cycle.
Data and the control information on the information data
Make the recorded disc speed higher than the standard speed.
Rotating means for rotating the so that the reproduction processing means for reproducing said information data and control information from a disk that is rotating <br/> rotation by said rotation means, said information data reproduced by the reproducing processing means and storage means for storing the control information, the
Based on the control information, the output rate of the information data output from the storage means may be set to a first output rate corresponding to the standard speed or a second output rate higher than the first output rate.
A judgment processing means for judging whether or not to set the output rate of the information data, based on a result of the judgment by the judgment processing means, the output rate of either the first output rate or the second output rate. Is output.

[0008] Further, the present invention provides a method for storing information data at a predetermined cycle.
Data and the control information on the information data
Make the recorded disc speed higher than the standard speed.
Rotating means for rotating the disk, a reproducing processing means for reproducing the information data and the control information from the disk rotated by the rotating means, and the information data reproduced by the reproducing processing means. a storage means for storing control information, 該記
Using the control information stored in the storage means,
So that the data is output from the storage means.
Controlling means for controlling, based on the control information, setting an output rate of the information data output from the storage means to a first output rate corresponding to the standard speed, or And a judgment processing means for judging whether or not to use the second output rate, which is faster, based on the judgment result of the judgment processing means. It is configured to output at such an output rate.

Here, the above-mentioned judgment processing means includes a reproducing process.
Means are reproducing said information data and said control information
In the meantime, the output of the information data output from the storage means is performed.
The power rate is the first output rate or the second
It is determined whether or not to set the output rate .

[0010] The control information includes the information data.
Data time information or information indicating the order of the information data
Is included, and the control unit performs the operation when the time information indicates.
The information in accordance with the order of
The storage means is controlled so as to output data .

[0011]

Thus, according to the present invention, the information data is reproduced together with the time information and the control information including the time information by making the rotation of the disk faster than the standard speed, and these are stored in the storage means. By making the reading speed from the storage means different, it is possible to obtain information data having different output rates.

If the input rate and the output rate of the information data in the storage means are different, an overflow or underflow will occur in the storage means, but the control circuit stores the time information and the like. By controlling the storage means using the information, information data can be obtained from the storage means at the selected output rate.

Further, the control information includes information data
The information indicating the type of the information data is included, and the above-described determination processing means can determine the output rate based on the information indicating the type of the information data .

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings, taking a compact disc (CD) reproducing apparatus as an example.

FIG. 1 is a block diagram showing an embodiment of a disk reproducing apparatus according to the present invention, wherein 1 is a disk, 2 is
Is a motor, 3 is a pickup servo circuit, 3 'is a motor servo circuit, 4 is a pickup, 5 is a preamplifier, 8 is a subcode including time information, 13 is access data,
4 is a CD signal processing circuit, 15 is a RAM, 16 is address information, 17 is output data, 18 is a time information detector, 19
Is an address control circuit, 20 is overflow / underflow information, 21 is a system control microcomputer, 22, 23
Is intermittent access information, 24 is read information, 42 is a read clock, 44 is a read clock generation circuit, 45 is a read clock generation circuit, 46 is a switching signal, and 61 is a write address generation clock.

Digital signals reproduced from a CD include:
A subcode 8 is included in addition to the audio digital data. In the subcode 8, as shown in FIG. 2, eight channels P to W are allocated to the area immediately after the frame synchronization signal, and the subcode 8 is completed in 98 frames including the subcode synchronization signals S0 and S1. In the Q channel of the subcode 8, time information and control signals are recorded, and an error detection code is added to enable high-reliability reproduction.

In FIG. 1, the disk 1 is rotated at a speed N times the normal speed (normal reproduction) by the motor 2, and data is read from the disk 1 by the pickup 4 controlled by the pickup servo circuit 3. The reproduced data is supplied to the CD signal processing circuit 14 via the preamplifier 5, and the processed audio data to which the sub-code 8 including the time information is added is used as the access data 13 as N times the output rate at the standard speed. Output at the output rate.

The CD signal processing circuit 14 outputs a write address generation clock 61 and a subcode 8 in synchronization with the reproduction data. The write address generation clock 61 is transmitted to the address control circuit 19 together with the access data 13 by the subaddress 8. The codes 8 are supplied to the system control microcomputer 21 respectively.

The access data 13 having the N-times output rate is supplied to the RA controlled by the address control circuit 19.
It is written to and read from M15. RAM at this time
15 as address information 16, an address control circuit 19
Thus, the write address is generated from the write address generation clock 61 from the CD signal processing circuit 14, and the read address is generated from the read clock 42 from the standard speed read clock generation circuit 44. Therefore, in the RAM 15, writing is performed at N times the standard speed and reading is performed at the standard (1 ×) output rate.

Here, the address control circuit 19 and its peripheral circuits will be described.

In the address control circuit 19, the address information 1 which is a write address / read address of the RAM 15
6 is generated. When the disk 1 is an audio disk, the system control microcomputer 21 determines from the subcode 8 that the reproduced signal is audio data, selects the standard speed read clock generation circuit 44 by the switching signal 46, and reads the standard speed read clock. The clock is supplied to the address control circuit 19. The address control circuit 19 generates a read address based on the standard speed read clock. Therefore, the access data 13 output from the CD signal processing circuit 14 at an N-fold output rate and written in the RAM 15 is read out from the RAM 15 at a standard rate.

By the way, the CD signal processing circuit 14 operates at N times speed, and the timing of writing to the RAM 15 is N speed of standard speed.
Although the speed is twice as fast, the timing for reading the audio data from the RAM 15 is the standard speed (1 × speed).
5 overflows. Therefore, the address control circuit 19 including the time information detecting section 18 and the system control microcomputer 21 perform write / read control for preventing such overflow.

That is, the time information detecting section 18 of the address control circuit 19 detects the time information at the time of writing based on the access data 13, and the time information is detected by the system control microcomputer 2.
RAM 1 using the disk read information 24 from
5, the time difference information between the time information at the time of writing and the time information at the time of reading is detected, and based on the detection result of the time difference information, it is monitored whether the RAM 15 overflows or underflows. And the address control circuit 1
9 detects that the RAM 15 has overflowed, outputs write information 41 for inhibiting writing to the RAM 15, stops writing to the RAM 15, and supplies overflow information 20 to the system control microcomputer 21. The system control microcomputer 21 uses the overflow information 20
And the intermittent access information 22 and 23 are generated using the time information at the time of the write prohibition and are supplied to the pickup servo circuit 3 and the motor servo circuit 3 ', respectively. As a result, the pickup servo circuit 3 moves the pickup 4 to the next data position on the disk 1 to be connected.

When detecting that the RAM 15 has underflowed, the address control circuit 19 outputs write information 41 for canceling the write-protection to the RAM 15, and
Underflow information 20 for re-accessing the system is output to the system control microcomputer 21. As a result, the pickup 4 reads data to be subsequently connected from the disk 1 and writes the data to the RAM 15 again via the CD signal processing circuit 14.

As described above, in this embodiment, the access data 13 output from the CD signal processing circuit 14 at an output rate N times the standard speed is temporarily stored in the RAM 15 and read out at the standard speed. By controlling the writing / reading, the time difference between the N-times operating speed of the system and the standard output speed of the output data can be absorbed,
Output data can be reproduced continuously.

Next, the CD signal processing circuit 14 in FIG. 1 will be described with reference to FIG. However, in FIG.
6 is a demodulation circuit, 7 is audio data, 9 is a data bus, 10
, Address control circuits 2 and 11 are RAMs, and 12 is an audio data processing circuit. The parts corresponding to those in FIG.

In FIG. 3, the reproduction data supplied from the preamplifier 5 is demodulated by a demodulation circuit 6 and separated into audio data 7 and a subcode 8. The subcode 8 is output from the CD signal processing circuit 14 as it is.

The audio data 7 passes through the data bus 9 under the control of the address control circuit 10 to absorb jitter due to uneven rotation of the disk 1 and to perform error correction processing and deinterleave processing by the audio data processing circuit 12. RAM
11 is written. At this time, the subcode 8 is also written to the RAM 11 through the data bus 9. RAM11
The audio data 7 and the sub-code 8 written in the sub-code 8 are read out from the RAM 11 under the control of the address control circuit 10, and the audio data 7 is interpolated by the audio data processing circuit 12, and then the sub-code 8 Are output from the CD signal processing circuit 14 as access data 13.

At this time, the address control circuit 10 in FIG.
Will be described with reference to FIG. However, in the figure,
25 is a write address generation circuit, 26 is a write address, 27 is a read address generation circuit, 28 is a read address, 29 is an address monitoring circuit, 30 is an address switching circuit, and portions corresponding to those in FIG. And a duplicate description will be omitted.

A write address 26 for writing to the RAM 11 is generated by a write address generation circuit 25 from a reproduction system clock synchronized with the reproduction data.
A read address 28 for reading from 1 is generated by a read address generation circuit 27 from a clock by a crystal oscillator (not shown). Conventionally, the subcode 8 is stored in the RAM 11 in order to correspond to the reading position on the disk 1.
Although the subcode 8 is not written to the RAM 1 and is output at the read timing of the disk 1, in this embodiment, the subcode 8 is also written to the RAM 11 from the data bus 9 and read like the audio data 7. At this time, the write address 2
6 and the read address 28 are switched by the address switching circuit 30. Further, the address monitoring circuit 29
The intervals between the frames are maintained to absorb uneven rotation of the disk 1.

The access data 13 thus obtained by the CD signal processing circuit 14 is supplied to an address control circuit 19 in FIG. 3, and the time information is detected by the time information detecting section 18 to write the data corresponding to the capacity of the RAM 15; , Stop the writing. The time information detecting section 18 detects each time difference information based on the access data 13 and the read information 24 of the disk, and monitors the overflow / underflow of the RAM 15 based on the detection result of the time difference information. While detecting the address of the data to be connected next, the overflow / underflow information 20 for re-accessing the disk 1 is output to the system control microcomputer 21.

The operation of the address control circuit 19 at this time will be described with reference to FIG. However, in the figure, 31 is a time information detection circuit, 32 is time information, 33 is a write address generation circuit, 34 is a time information detection circuit, 35 is time information, 36 is a read address generation circuit, 37 is a difference detection circuit, 38 is difference information, 39 is an overflow / underflow detection circuit, 40 is a write control circuit, and 41 is write information.

In the time information detecting section 18, the time information detecting circuit 31 detects time information from the access data 13 output from the CD signal processing circuit 14, and reads the disk read information 24 from the system control microcomputer 21.
Generated at the rate of read clock 42 based on
The read address of M15 is read address generation circuit 36.
The time information 35 at the time of audio output is detected by the time information detection circuit 34 from the read address. The time information 32 detected by the time information detection circuit 31 is supplied to the write address generation circuit 33, and the write address of the RAM 15 is generated at the rate of the write address generation clock 61. The write address and the read address are switched by the address switching circuit 30 ′, and are supplied to the RAM 15 as address information 16.

Further, a difference between the time information 32 detected by the time information detecting circuit 31 and the time information 35 generated by the time information detecting circuit 34 is detected by the difference detecting circuit 37, and R
Overflow / underflow detection circuit 3 as difference information 38 between write address and read address of AM 15
9. The overflow / underflow detection circuit 39 detects the overflow / underflow of the RAM 15 from the difference information 38 and generates the overflow / underflow information 20 of the RAM 15 as shown in FIG.
Is supplied to a write control circuit 40, and outputs write information 41 for prohibiting writing when the RAM 15 overflows.

The system control microcomputer 21 uses the overflow / underflow information 20 and the time information 32 at the time of write prohibition to make the intermittent access information 22, 23.
The pickup servo circuit 3 moves the pickup 4 to the next data position to be connected based on the intermittent access information 22.

When the overflow / underflow detection circuit 39 detects the underflow of the RAM 15 from the difference information 38, the write control circuit 40 outputs the write information 41 for canceling the write prohibition, and 4 reproduces the data to be subsequently connected from the disk 1 and causes the reproduced data to be written into the RAM 15 again as described above.

As described above, in this embodiment, since the time information is added to the audio data output from the CD signal processing circuit 14, the connection point of the data can be accurately detected. In order to perform the time difference absorption, the output data is continuously reproduced.

FIG. 6 is a block diagram showing another embodiment of the disk reproducing apparatus according to the present invention as a CD-ROM reproducing apparatus. Reference numeral 43 denotes a CD-ROM signal processing circuit. Corresponding parts are denoted by the same reference numerals, and redundant description is omitted.

This embodiment is configured to output data at a double speed when handling data, based on the utility of the CD-ROM as a database. On the other hand, when playing back a CD on which music data is recorded in this embodiment, the signal processing section performs a double speed operation so that output data can be obtained at a standard speed. Also, CD-
The ROM is a system for managing data in sector units, and one sector is composed of 98 frames. So, C
In order to perform standard reproduction of a CD with a D-ROM, it is necessary to add a signal similar to a sector number to reproduction data of the CD.

The operation of the embodiment shown in FIG. 6 will be described below with reference to FIG.

When the disk 1 is a data disk as a CD-ROM, the system control microcomputer 21
The sub-code 8 from the signal processing circuit 14 determines that the reproduced signal is data from the data disk 1, and the switching signal 46 causes the double-speed read clock generation circuit 4
5 is selected so that the output data 17 can be obtained from the RAM 15 at a double speed as shown in FIG. If the disk 1 is an audio disk as a CD, the system control microcomputer 2
1 determines that the reproduction signal is audio data by the subcode 8, selects the read clock 42 from the standard speed read clock generation circuit 44 by the switching signal 46, and as shown in FIG. , The output data 17 can be obtained from the RAM 15 at a standard speed. The signal processing system of the CD-ROM operates at double speed, and the RAM 15
The timing at which the access data 13 is written to is twice the standard speed. On the other hand, the timing at which data is read from the RAM 15 is the standard speed, and if the data is read as it is, the RAM 15 will overflow before all the data is read. With the subcode 8 of
Since the data is output from the D signal processing circuit 14, the data can be managed on a sector-by-sector basis, an accurate connection point is detected, a time difference is detected, and the RAM 15 operates at twice the normal operation speed of the system and the standard output speed of the output data 17. Absorb the time difference.

As described above, in this embodiment, since the access data 13 is added with the sub-code in units of 98 frames, the access data 13 is written into the RAM 15 and the address control circuit 19 of the CD-ROM signal processing circuit 43 is written. To detect the time difference between the output data 17 and the access data 13, measure the overflow / underflow of the RAM 15, send the intermittent access information 22, 23, detect the time again, and detect the correct connection point, so that the external RAM can be detected. Can be applied to a CD-ROM system in which the writing speed is set to N times the standard speed and the reading speed is set to the standard speed, and the circuit can be shared.

This embodiment is also applicable to a mini-disc (MD) system in which data is compressed to one-fifth and recorded.

FIG. 8 is a block diagram showing a specific example of the time information detecting circuit 18 shown in FIGS.
Is an address setting clock, 24 "is an address load signal, 47 is a shift register, 48 is an information data latch circuit, 49 is an error detection circuit, 50 is an error detection result, 51 is a Q code register, 52 is time information, and 53 is time information. A BCD counter, 54 is a counter value, 55 is a setting address register, 56 is a BCD counter, 57 is a counter value, 58 is a match detection circuit, 59 is a match detection result, and 60 is a needle jump detection circuit.

First, the operation of this specific example will be described with reference to FIG. 9 assuming that the operation is a quadruple speed operation and that there is no needle jump.

Set value n from system control microcomputer 21
Is loaded into the setting address register 55 and loaded into the BCD counter 56. At the same time, the write address counter 33 and the read address counter 36 are reset.

The access data 13 obtained by adding a signal similar to a sector number to the reproduction data of the CD using the subcode 8 is fetched into the shift register 47.
The information data is taken into the information data latch circuit 48, the Q code of the subcode 8 is taken into the Q code register 51, and the error detection code is taken into the error detection circuit 49, respectively. If the error detection result 50 from the error detection circuit 49 indicates “no error”, the time information 52 of the BCD code taken into the Q code register 51 is loaded into the BCD counter 53, and the error detection result 50 "Incorrect"
, The BCD counter 53 increments the current value by one.
Just count up.

The count value 54 of the BCD counter 53 and B
The coincidence detection circuit 58 compares the count value 57 of the set value n of the CD counter 56 with the count value 57.
When the count value 54 of the D counter 53 sequentially changes and finally coincides with the set value n, the coincidence detection result 59 of the coincidence detection circuit 58 indicates this, and the data reproduction position is the same as the set value n set by the system control microcomputer 21. The target position has been reached. Based on the coincidence detection result 59, the BCD counter 56 and the write address generation circuit 33 for generating a write address to the RAM 15 start operating, and count up by one at a timing synchronized with the acquisition of the Q code of the Q code register 51, respectively. I will do it. The read address counter 36 also starts operating at the same time, and generates a read address in synchronization with the write clock 42.

Since the write address and the read address to the RAM 15 are generated not by BCD but by binary numbers,
Even if it is generated based on the time information 52 which is a BCD code,
The address of the RAM 15 can be used effectively.

The write address from the write address generation circuit 33 and the read address from the read address counter 36 are supplied to a difference detector 37, and difference information 38 indicating the difference therebetween is obtained. This difference information 38 is supplied to an overflow / underflow detection circuit 39,
Whether the data stored in the AM 15 overflows or underflows is detected. In the case of overflow, a pause start signal is output from the overflow / underflow detection circuit 39 to stop writing to the RAM 15, and when an underflow is detected thereafter, a pause release signal is output and writing to the RAM 15 is performed again. Let it start.

Here, in FIG. 9, for simplicity of explanation, the capacity of the RAM 15 is set to a capacity of 5 addresses.
Therefore, the write address counter 33 also repeats the count from 0 to 4 of the read address counter 36.

Therefore, in the RAM 15, one piece of information data is read while four pieces of information data are written, so that the n-th to (n + 3) -th input information data are sequentially written to addresses 0 to 3. During the period, the n-th information data of address 1 is read, and then (n +
When the 1) th information data is read, first,
The (n + 4) th input information data is written to address 4, and then the (n + 5) th input information data is written to address 0. However, here, the difference (WR) between the write address and the read address indicates that the RAM 1
If the number of addresses is smaller than the number of addresses (capacity) by one by one or more, and if an overflow occurs, the writing of the (n + 5) th input information data will overflow. Therefore, a pause start signal is output from the overflow / underflow detection circuit 39 and the RAM 1
5 is stopped, and at the same time, the counting operation of the BCD counter 56 and the write address counter 33 is stopped, and the count value at that time is held as it is. Thus, the BCD counter 56 holds the count value 57 of the value (n + 5) as it is, and the write address counter 33 holds the address value of the value 0 as it is. However, reading from the RAM 15 is continued as it is.

The system control microcomputer 21 captures this pause start signal as overflow information 20, and
As described above, the intermittent access information 22 and 23 are generated by using this and the time information at the time of write prohibition, and these are supplied to the pickup servo circuit 3 and the motor servo circuit 3 ', respectively. As a result, the pickup servo circuit 3 moves the pickup 4 to the next data position on the disk 1 to be connected.

During the reading of the RAM 15 during this time, when the RAM 15 underflows, a pause release signal is output from the overflow / underflow detection circuit 39, and the stop of writing to the RAM 15 is released. Here, it is assumed that an underflow occurs when the difference (WR) between the write address and the read address becomes equal to or less than the number of sectors for one round of the disk 1, and that two sectors are recorded in one round of the disk 1. Then, (W-
When R) is 2 or less, underflow has occurred.

Therefore, as described above, the write address W from the write address counter 33 is fixed at 0, so that when the read address R from the read address counter 36 becomes 3, the write address is advanced by 5 The overflow / underflow detection circuit 39 determines that the RAM 15 has underflowed, generates a pause release signal, and starts writing to the RAM 15. Even when the writing is started, the write address W from the write address counter 33 is fixed at 0, and the count value of the BCD counter 56 is fixed at (N + 5). When the (n + 5) th data is reproduced from the disc 1, the count values of the BCD counters 53 and 56 match (n + 1), and a match detection result 59 is output from the match detection circuit 58 to output the BCD
The counter 56 and the write address counter 33 resume operation. Therefore, the RAM 15 stores addresses 0 to (n
Data is written in the order of (+5) th, (n + 6),... Until the next overflow occurs.

In this way, the write operation is surely restarted from the data following the stop of the write operation.

Next, the operation of this specific example will be described with reference to FIG. 10 assuming that the operation is quadruple-speed operation and there is a needle jump due to vibration. Here, (n + 9)
It is assumed that the needle jump occurs after the data of the (m) th is reproduced, and then the data of the (m) th is reproduced.

The needle jump detection circuit 60 calculates the error detection result 50
No error is found in the reproduction data and the time information 52, 54
If there is no predetermined difference (e.g., 1) between them, it is determined that discontinuity has occurred in the reproduced data due to a stitch, etc., and the operations of the BCD counter 56 and the write address counter 33 are stopped as in the case of the overflow described above. And (n + 1
And 0) -th data is accessed. And
When the (n + 10) th data is reproduced, the writing to the RAM 15 is restarted by the match detection result 59 of the match detection circuit 58.

As described above, in this embodiment, even if the Q code of the subcode, which is the time information of the BCD code, is used, the address of the RAM 15 is generated in a binary number.
It is possible to cope with standard speed reproduction at the time of quadruple speed operation by effectively using M15. Also, even if the needle jumps due to vibration etc.,
It is possible to perform continuous reproduction by accurately connecting data.

Further, if the CD signal processing circuit 14 in which the processing of the audio data and the subcode shown in FIGS. 1 and 3 are made to correspond one-to-one is one integrated circuit,
The address control circuit 19 shown in FIG. 1 and FIG. 3 is combined as another integrated circuit.
When processing data and audio data, the CD-
By combining and configuring the ROM signal processing circuit 43 as another integrated circuit, it can be applied to each system.

As described above, in this embodiment, an integrated circuit that associates audio data with time information on a one-to-one basis and an integrated circuit that stores audio data and time information using the corresponding data are separated. The present invention is not limited to the embodiment of reproduction.

It should be noted that the numerical values shown in the above embodiment are merely examples, and the present invention is not limited to this.

[0064]

As described above, according to the present invention,
Since the disk is rotated at a speed higher than the standard and the information data reproduced from the disk is stored in the storage means so that the reading speed is variable, the output rates corresponding to the first and second output rates are different. Information data can be obtained at a rate.

[0065] Further, according to the present invention, by using the control information such as time information to be reproduced together with the information data, it is possible to set the output rate of the information <br/> report data.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a disk reproducing apparatus according to the present invention.

FIG. 2 is a diagram showing a subcode format of a CD.

FIG. 3 is a block diagram showing an internal configuration of a CD signal processing circuit in FIG. 1;

FIG. 4 is a block diagram showing an address control circuit of the CD signal processing circuit in FIG. 3;

FIG. 5 is a block diagram showing an address control circuit in FIG. 1;

FIG. 6 is a block diagram showing another embodiment of a CD-ROM compatible disk reproducing apparatus according to the present invention.

FIG. 7 is a timing chart showing the operation of the embodiment shown in FIG.

FIG. 8 is a block diagram showing a specific example of a time information detection circuit in FIGS. 1, 3, 5, and 6;

9 is a timing chart showing the standard reproduction timing at the time of the quadruple speed operation in the specific example shown in FIG. 8 without the needle jump.

FIG. 10 is a timing chart showing the standard reproduction timing at the time of the quadruple speed operation when the specific example shown in FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Disc 4 Pickup 6 Demodulation circuit 8 Subcode 10 Address control circuit 11 RAM 13 Access data 14 CD signal processing circuit 15 RAM 16 Address information 17 Output data 18 Time information detection unit 19 Control circuit 20 Overflow / underflow information 21 System control microcomputer 22, 23 Intermittent access information 24 Disk read information 39 Overflow / underflow detection circuit 40 Write control circuit 41 Write information 42 Read clock 44 Standard speed read clock generation circuit 45 Double speed read clock generation circuit 53, 56 BCD counter 61 Write address Generation clock

Continued on the front page (72) Inventor Toshifumi Takeuchi 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Inside the Visual Media Research Laboratory, Hitachi, Ltd. Hitachi Semiconductor Co., Ltd. Semiconductor Design and Development Center (56) References JP-A-4-360067 (JP, A) JP-A-3-207056 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB Name) G11B 20/10 321

Claims (9)

(57) [Claims] From 1. A disc is rotating such that the speed faster than the standard speed information data and said information data
Reproduction processing means and storage means for storing the information data and the control information <br/> paper reproduced by the regeneration processing means, regeneration processing means the information data and the control information for reproducing the control information about Play
The output rate of the information data output from the storage means is set to a first output rate corresponding to the standard speed, or the output rate is set higher than the first output rate based on the control information . Judgment processing means for judging whether or not to use a fast second output rate, based on a judgment result of the judgment processing means, the information data is converted into one of the first output rate and the second output rate. A disc reproducing apparatus characterized by being configured to output at an output rate of: From wherein the rotating disk so that the speed faster than the standard speed information data and said information data
Using a reproduction processing means for reproducing the control information about a storage means for storing the information data and the control information reproduced by the reproducing processing means, the control information stored in the storage means, the information de
So that data is output from the storage means.
Control means for controlling, and the reproduction processing means reproduces the information data and the control information.
The output rate of the information data output from the storage means is set to a first output rate corresponding to the standard speed, or the output rate is set higher than the first output rate based on the control information . Judgment processing means for judging whether or not to use a fast second output rate, based on a judgment result of the judgment processing means, the information data is converted into one of the first output rate and the second output rate. A disc reproducing apparatus characterized by being configured to output at an output rate of: 3. The control information includes the information data
Information is included, and the control means performs the preceding operation in accordance with the time indicated by the time information.
Controlling the storage means so as to output the information data.
3. The disk reproducing apparatus according to claim 2, wherein: 4. The control information includes an order of the information data.
And the control means controls the information in accordance with the order of the information indicating the order.
Controlling the storage means so as to output report data.
3. The disk reproducing apparatus according to claim 2, wherein: 5. The information data and said information data at a predetermined cycle.
And control information about the
Rotate the disk so that it is faster than the standard speed
That the rotating means and, said after rotated by the rotation means are the disc and reproduction processing means for reproducing the information data and the control information, the information data and the control information reproduced by the reproducing processing means
Storage means for storing distribution, based on the control information, the output rate of the information data outputted from said memory means, either the first output rate corresponding to the standard speed, said first output Judgment processing means for judging whether or not the second output rate is higher than the rate, wherein the information data is converted to the first output rate or the second output rate based on the judgment result of the judgment processing means. A disc reproducing device configured to output at any one of the output rates. 6. Information data and said information data at a predetermined cycle
And control information about the
Rotate the disk so that it is faster than the standard speed
Rotating means; reproducing processing means for reproducing information data and the control information from a disk rotated by the rotating means ; storage means for storing the information data and the control information reproduced by the reproducing processing means; Using the control information stored in the storage means,
The storage means so that data is output from the storage means.
Control means for controlling a stage; and setting the output rate of the information data output from the storage means to a first output rate corresponding to the standard speed, based on the control information, or Judgment processing means for judging whether or not the second output rate is higher than the rate, wherein the information data is converted to the first output rate or the second output rate based on the judgment result of the judgment processing means. A disc reproducing device configured to output at any one of the output rates. 7. The reproduction processing means, wherein:
While reproducing the information data and the control information
Outputting the information data output from the storage means.
The rate is the first output rate or the second output rate
Determining whether to set an output rate
7. The disc reproducing apparatus according to 6 . 8. The control information includes the information data
Information is included, and the control means performs the preceding operation in accordance with the time indicated by the time information.
Controlling the storage means so as to output the information data.
8. The disc reproducing apparatus according to claim 6, wherein 9. The control information includes an order of the information data.
Information indicating an order is included, and the control means controls the information in accordance with the order of the information indicating the order.
Controlling the storage means so as to output report data.
The disk reproducing device according to claim 6, wherein: