JP2640059B2 - Disc player - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of reading out a digital signal recorded on a disk at a higher speed than the rated speed while repeating the same part while storing reproduced data in a memory once and then reading the same portion. The present invention relates to a disc player capable of re-reading and reproducing erroneous reproduction data.

[0002]

2. Description of the Related Art First, the applicant of the present invention rotates a disk at a speed higher than a rated speed, traces the disk at a high speed by a pickup, reads a digital signal recorded on the disk, and demodulates the digital signal. After writing main data such as music information to the memory at high speed in accordance with the high-speed rotation of the disc, the main data is read from the memory in accordance with the rated speed, and the amount of data in the memory is read. While managing
In order to repeatedly read the same portion of the disc, a disc player has been proposed in which the trace position of the pickup is sequentially advanced to perform reproduction (see Japanese Patent Application No. 2-319998). In this disc player, since the disc is traced at a high speed, a time for repeatedly tracing the same part while reading the main data from the memory at a rated speed is created, and errors in the reproduced main data cannot be corrected. When the reproduction of the main data is interrupted due to an external impact or swing, the digital signal including the main data that could not be read correctly can be read again. Therefore, by providing such a function, it is possible to provide a disc player excellent in anti-vibration measures, and it is suitable for a portable CD player such as a headphone stereo type or a portable type which can be carried around.

[0003] By the way, a disc (C) for a CD player is used.
In D), as is well known, there is a so-called CD single having a diameter of 8 cm in addition to a standard CD having a diameter of 12 cm. Because there is a weight difference between the standard CD and the CD single,
There is a gap in the inertial mass when each disk is rotated.
For this reason, most of the CD players capable of reproducing each of the above-mentioned discs have a motor servo for controlling a spindle motor for driving the disc rotation between an inertial mass of a standard CD and an inertial mass of a single CD. Circuit servo constants are set.

As described above, in a disk player that reads a disk at a high speed, the rotational speed of the disk is high, so that the difference in inertial mass due to the difference in the weight of the disk increases. Therefore, in such a disk player, if the disk is compatible with disks having different diameters, each disk must be stabilized unless the servo constants of the motor servo circuit are switched according to the inertial mass of each disk. The rotation cannot be controlled.

[0005]

By the way, in a normal disk player for reading a disk at a rated speed, for example, as disclosed in Japanese Patent Application Laid-Open No. 2-44566, the diameter of the disk to be reproduced is determined, and It is known that a servo constant of a motor servo circuit is switched according to a diameter so that stable rotation control can be performed on each disk having a different diameter.

However, the disk player disclosed in the above publication requires a sensor to detect the diameter of the disk, which leads to an increase in the number of components and a problem in that the structure is restricted.

[0007]

SUMMARY OF THE INVENTION According to the present invention, there is provided a disk player for reading a disk at a high speed for selectively switching the disk reading speed between a rated speed and a high speed in order to solve the above-mentioned problems. A switching signal generating means for generating a switching signal, a motor servo circuit for controlling a spindle motor for rotating the disk, and capable of switching servo constants according to each of the large-diameter and small-diameter disks; A rotation control means for controlling the motor servo circuit to switch the rotation of the disk from a rated speed to a high speed in response to a switching signal from the means; and starting a timing when switching the reading speed of the disk from the rated speed to the high speed. Measure the preset time according to the time required to start the small-diameter disc from the rated speed to the high speed. Timer means, and high-speed detection means for detecting that the disk is being read at a high speed, and the high-speed detection means performs high-speed reading before the measurement of the set time by the timer means ends. When it is detected that the high-speed reading is performed, the servo constant of the motor servo circuit is set in correspondence with the small-diameter disk. When the measurement of the set time by the timer means is completed, the servo constants of the motor servo circuit are set corresponding to the large-diameter disk.

[0008]

According to the present invention, in a disk player for reading a disk at a high speed, the disk can be driven to rotate by switching between a rated speed and a high speed. A correspondingly preset time is measured by the timer means, and when switching the speed of the disk from the rated speed to the high speed, the time measurement by the timer means is started and the time measurement by the timer means ends. Discriminating the set disc diameter based on whether the timing or the timing at which the disc has become faster is detected,
According to the determination, the servo constants of the motor servo circuit are set corresponding to each disk.

[0009]

1 shows an embodiment of the present invention and is a portable CD.
FIG. 2 is a circuit block diagram of a player. In the illustrated CD player, the spindle motor 2 rotates at a rated speed and at a high speed in order to rotate the CD-type disc 1 at a speed higher than the rated linear speed (for example, twice as fast) in addition to the rated linear speed. The motor servo circuit 3 that controls the spindle motor 2 can selectively set the servo constants corresponding to the two types of speeds by switching the servo constant setting means 4. It has been made to.

The CD player shown has a diameter of 12c.
A large-diameter disc (standard CD) and a small-diameter disc (CD single) having a diameter of 8 cm can be reproduced, and the motor servo circuit 3 switches the servo constant setting means 4 to the servo constants corresponding to the discs having different diameters. It can be set selectively by using.

In FIG. 1, reference numeral 5 denotes a pickup for optically tracing the disk 1 by an emitted light beam;
Is an RF amplifier for amplifying and shaping an RF signal (high-frequency signal) of a digital signal recorded on the disk 1 obtained by being traced by the pickup 5, and 7 is a pickup using an RF signal obtained via the RF amplifier 6. 5 is driven to perform focusing control for focusing a light beam tracing the disk 1 on a signal surface of the disk 1 and tracking control for following the light beam to a signal track of the disk 1, and perform the pickup 5
Is a pickup servo circuit for performing control to feed the disk in the radial direction of the disk 1.

Reference numeral 8 denotes a synchronization detection / E for detecting a frame synchronization signal indicating the beginning of a frame from the EFM-modulated recording signal of the disk 1 which is shaped as a digital signal and output as a digital signal, and performs EFM demodulation.
The FM demodulation circuit 9 separates subcode data indicating the beginning of the music, the music number, the elapsed playing time, etc. (P and Q codes) from the various demodulated data EFM demodulated by the synchronization detection / EFM demodulation circuit 8. A sub-code separation / Q-code demodulation circuit for demodulating a Q code included in the sub-code data has a parity for performing error detection and error correction of main data which is music information extracted from a digital signal after EFM demodulation. An error detection / correction circuit for performing error detection / correction of the main data by using a first RAM for rearranging demodulated data and a first RAM for temporarily storing demodulated data as an error correction buffer for the main data; Write addresses for controlling the timing of writing demodulated data to the first RAM 11 and the timing of reading demodulated data, respectively. The first to generate a fine read address
An address generation circuit 13 is provided for the error detection / correction circuit 10.
Is an interpolation circuit for interpolating main data for which error correction is impossible according to main data obtained before and after the main data.

In the figure, a synchronization detection / EFM demodulation circuit 8, a subcode separation / Q code demodulation circuit 9, an error detection / correction circuit 10, a first address generation circuit 12, and an interpolation circuit 13, which are surrounded by a chain line, A signal processing circuit 14 for digital signal processing of a digital signal read from the disk 1 to obtain information data is configured.

Reference numeral 15 denotes a clock reproducing circuit which is constituted by a PLL circuit and reproduces a clock synchronized with the bits of the digital signal output from the RF amplifier 6.

Here, each circuit constituting the signal processing circuit 14 performs each signal processing by the reproduced clock reproduced by the clock reproducing circuit 15. Since the write address and the read address generated from the first address generating circuit 12 are generated according to the timing of the reproduction clock, jitter cannot be absorbed when the rotation speed of the disk 1 changes. But the first R
AM 11 is prevented from overflowing. Further, since the reproduced clock obtained from the clock reproducing circuit 15 is generated in accordance with the rotation speed of the disk 1, each of the circuits constituting the signal processing circuit 14 is configured to output the signal from the disk 1 when the disk 1 is rotated at a high speed. , Each signal processing is performed at a higher speed than a general CD player.

Reference numeral 16 stores basic programs such as a method of reproducing a disk, various search methods, and a method of introducing focusing of the pickup 5, and performs various basic operation controls and a display (not shown). This is a system control circuit composed of a microcomputer that performs control for displaying an image and input control for operation keys (not shown).

The system control circuit 16 is provided with a Q code monitoring means 17 for monitoring the Q code demodulated by the sub code separation / Q code demodulation circuit 9 and determines the trace position of the pickup 5 by the diameter of the disk. Track jump control means 1 for supplying a track jump signal for displacing in the direction to pickup servo circuit 7
8 are provided.

The system control circuit 16 writes TOC data (table of contents information used for signal search such as music selection and display on a display) read when the lead-in area of the disk 1 is traced. A TOC memory 19, a TOC reading detecting means 20 for detecting that the reading of the TOC data is completed by detecting the TOC data written in the TOC memory 19, and a reading of the TOC data by the TOC reading detecting means 20; Switching signal generating means 21 for generating a high-speed switching signal for switching the reading speed of the disk from rated to high speed (double the rated speed) when the completion is detected;
When the data reading is completed, a timer is started, and a timer means 22 for measuring a preset time set in accordance with a time required for starting the small-diameter disk from the rated speed to a high speed, and the switching signal generating means 21 After the high-speed switching signal is generated, the Q code is demodulated again by the subcode separation / Q code demodulation circuit 9 to detect high speed detection, and the timer means 22 The diameter of the disk 1 to be reproduced is determined based on which of the completion of the measurement of the set time and the detection of the arrival of the high speed by the high-speed detecting means 23 is earlier, and the servo constant setting means 4 is set in accordance with the determination. And disk discriminating means 24 for switching to a servo constant corresponding to the diameter of 1.

Reference numeral 25 denotes a serial / parallel conversion circuit for converting the main data of the serial digital signal demodulated by the signal processing circuit 14 into a parallel digital signal. Reference numeral 26 temporarily stores the main data output from the serial / parallel conversion circuit 25. The second RAM 27 that is
A second address generation circuit for generating a write address for controlling the writing of main data to the AM 26 and generating a read address for the main data from the second RAM 26. A reference oscillator for generating a clock, 30 is a frequency dividing circuit that divides the reference clock generated from the reference oscillator 28 by 、, and 31 is a selector that selectively receives the reference clock from the reference oscillator 28 via the frequency dividing circuit 30. And a switching circuit for supplying to the motor servo circuit 3.

Here, the write address generated from the second address generation circuit 27 is generated in synchronization with the reproduction clock from the clock reproduction circuit 15, while the second address generation circuit 27 generates the write address.
The read address generated by the address generation circuit 27 is generated in synchronization with the reference clock from the reference oscillator 28 and at the same time as the sampling frequency when recording the main data on the disk 1. Therefore, the timing of writing the main data to the second RAM 26 is faster than the timing of reading the main data from the second RAM 26, and the second RA 26
The jitter component at the output timing of the main data is absorbed by M26.

Reference numeral 32 monitors a write address and a read address of the second address generating circuit 27, and a second RAM
Monitoring the overflow of the 26
An occurrence state of a non-correctable signal indicating that the information data cannot be corrected from the correction circuit 10 is detected, and the occurrence state of the interpolating circuit 1 is determined based on the occurrence state.
3 is determined to exceed the interpolation capability of the second R
The RAM control circuit detects the timing of stopping and restarting the writing of the main data to the AM 26, controls the second address generation circuit 27 according to the detected output, and controls the writing of the main data to the second RAM 26. Further, the RAM control circuit 32 generates an overflow signal indicating that the overflow of the second RAM 26 is detected when the overflow is detected, and generates an interpolation impossible signal indicating that when the overflow of the interpolation circuit 13 is exceeded, The track jump control means 18 generates a track jump signal for returning the reading position (trace position) of the disk by the pickup 5 by one track.

Reference numeral 33 denotes a WOK signal generating means provided in the system control circuit 16 for generating a writable signal (WOK signal) indicating that main data can be written to the second RAM 26. The WOK signal generation means 33 responds to the occurrence of an overflow signal and an interpolation impossible signal from the RAM control circuit 32, and to the WOK signal generation state according to the Q code monitoring state of the Q code monitoring section 17 and the operation state of the track jump control section 18. When a signal is generated, specifically, when an overflow signal or an interpolation impossible signal is generated, the WOK signal is not generated,
Further, the WOK signal is not generated at the same time as the generation of the track jump signal from the track jump control means 18, and the track jump is completed, and the disk is within the target range (within three frames before and after the target frame). When a Q code indicating the above is detected, a WOK signal is generated.

Reference numeral 34 denotes a shift register (not shown) in which the main data output from the serial / parallel conversion circuit 25 is written in synchronization with the timing of writing the main data to the second RAM 26, and an overflow of the second RAM 26 is detected. A latch circuit (not shown) for latching the main data written in the shift register, wherein the main data written in the shift register matches the main data latched in the latch circuit. To determine whether the second RAM
26 is a data coincidence determination circuit for setting the timing for restarting the writing of the main data to 26.

A parallel-to-serial conversion circuit 35 converts main data of a parallel digital signal read from the second RAM 26 into a serial digital signal, and a converter 36 converts main data output from the parallel-to-serial conversion circuit 35 to an analog signal. It is a D / A converter.

Next, the operation will be described.

The motor servo circuit 3 is supplied with a digital signal obtained through the RF amplifier 6, a reproduced clock obtained from the clock reproducing circuit 15, and a reference clock obtained from the reference oscillator 28.
Detects the pulse width of the shortest pulse in the digital signal,
The speed of the spindle motor 2 is controlled so that the pulse width becomes a predetermined length, and then the phases of signals obtained by dividing the reproduction clock and the reference clock are compared, and phase servo is applied to the spindle motor 2. The disk 1 is rotated at a predetermined linear velocity by such a PLL operation. However, the CD player shown in FIG. 1 sets the servo constant of the motor servo circuit 3 in accordance with a switching signal generated from the disk determination means 24 in an initial state. Means 4 is set to the servo constant for the small diameter disk. The switching signal from the switching signal generating means 21 sets the clock reproducing circuit 15 to the characteristic for the rated speed, while the switching circuit 31 selects the reference clock from the reference oscillator 28 obtained through the frequency dividing circuit 30. The servo constant setting means 4 is set to a servo constant for a rated speed by these operations. Therefore, at the start of reproduction, the disk 1 is driven by the motor servo circuit 3 according to the servo constant for the small-diameter disk and for the rated speed.

Here, the initial setting of the servo constants of the servo constant setting means 4 for a small-diameter disk is only in the case where the servo constants are used for a small-diameter disk and a large-diameter disk is rotationally driven, only the start-up becomes slow. On the other hand, when the servo constant is used for a large-diameter disk and a small-diameter disk is rotationally driven, the servo gain becomes excessive with respect to the inertial mass of the disk, the PLL operation becomes unstable, and the small-diameter disk runs away. This is because they may be rotated.

As described above, when the disk 1 is rotated at the rated linear velocity according to the servo constant for the small diameter disk,
The disc 1 is traced from the lead-in area, and the TOC data recorded in the lead-in area is read. The TOC data is read and stored in the TOC memory 19.
Is stored by the TOC reading detecting means 19
Since it is detected that the OC data has been read, a switching signal is generated from the switching signal generating means 21 in accordance with the detected output, and the servo constant setting means 4 is set to a high-speed servo constant. In addition, the clock recovery circuit 15 is set to high speed (double speed) characteristics by the switching signal from the switching signal generating means 21, while the switching circuit 31 selects a reference clock that does not pass through the frequency dividing circuit 30. Is switched in the following manner. Therefore, the disk 1 is rotated so as to have a high linear velocity with a servo constant for a small-diameter disk. Then, a program area in which main data such as music information is recorded is traced.

On the other hand, when a detection output indicating that the TOC data has been read is generated by the TOC reading detecting means 19, the timer means 22 starts counting time. The time measured by the timer means 22 is set in accordance with the time required to start the small-diameter disc from the rated speed to the high speed, and is set by the timer means 22 when the small-diameter disc is rotating. When the time reaches a high speed before the time is measured and the large-diameter disk is rotated, the timer means 2
2 is designed to reach a high speed after the measurement of the set time is completed. When the rotation of the disk 1 reaches a high speed, the recording signal can be read from the disk 1 again, so that the subcode separation / Q code demodulation circuit 9
The code is demodulated, whereby the high speed detecting means 23 detects that the high speed has been reached.

When the measurement of the set time is completed by the timer means 22, a clock completion signal indicating the completion is supplied to the disk discriminating means 24, and when the high speed detecting means 23 detects that the high speed has been reached. A high-speed detection signal indicating this is supplied to the disk discriminating means 24.
Then, the disk discriminating means 24 detects which of the clocking completion signal and the high-speed detection signal occurs first. Discrimination is made, and the servo constant setting means 4 is switched to a servo constant corresponding to the large-diameter disk,
On the other hand, when it is detected that the high-speed detection signal is generated first, it is determined that the disk is a small-diameter disk, and the servo constant setting means 4 keeps the servo constant corresponding to the small-diameter disk.

By the way, as described above, when the reproduction of the large-diameter disk is performed, the rotation of the disk is not increased from the rated linear velocity to the high linear velocity due to the servo constant of the motor servo circuit 3 in the initial state. Since the measurement of the set time is completed by the timer means 22 and the time-measurement completion signal is detected first by the disc discriminating means 24, the servo constant is switched to the servo constant corresponding to the large-diameter disc, and the servo constant is changed to the diameter of the reproduced disc. Be matched. On the other hand, when the reproduction of the small-diameter disc is performed, the timer means 2 is used after the rotation of the disc reaches the high-speed linear velocity from the rated linear velocity.
2, the measurement of the set time is completed, and the high-speed detection signal is detected first by the disk discriminating means 24. Therefore, the servo constant is switched to the servo constant corresponding to the small-diameter disk, and the servo constant matches the diameter of the reproduction disk. .

Therefore, when a large-diameter disk and a small-diameter disk are reproduced, both disks are rotated at a constant high linear velocity with correctly set servo constants. Is traced by the pickup 5.

As described above, each disk is rotated.
When the lead-in area and the program area of each disc are traced by the pickup 5, the signal recorded on the disc is supplied to the RF amplifier 6 as an RF signal (high-frequency signal) via the pickup 5. The RF signal is amplified by the RF amplifier 6, waveform-shaped, and supplied to the signal processing circuit 14 as a digital signal. The digital signal is demodulated by the signal processing circuit 14, and various data included in the digital signal are extracted.

Here, when the lead-in area is traced, the subcode separation / Q code demodulation circuit 9
The demodulation of the OC data is performed, and the demodulated TOC data is stored in the TOC memory 19. The TOC memory 19
When the TOC data is stored in the ROM, as described above, the fact is detected by the TOC reading detecting means 20, the high-speed switching signal is generated from the switching signal generating means 21, and the servo constant setting means 4 sets the high-speed servo constants. The motor servo circuit 3 is switched by the switching of the switching circuit 31 while being switched.
The reference clock from the reference oscillator 28 is supplied without passing through the frequency dividing circuit 30, and the characteristics of the clock recovery circuit 15 are switched to those for high speed. Therefore, the motor servo circuit 3
As a result, the driving speed of the spindle motor 2 is switched, and the disk 1 is driven at a predetermined high linear speed.
When the program area is traced due to the speed, the main data (audio data) is demodulated by the signal processing circuit 14, error detection and error correction of the main data are performed, and the lost main data is processed. Data interpolation is performed. The main data output from the signal processing circuit 14 is converted from a serial digital signal to a parallel digital signal by a serial / parallel conversion circuit 25, and then converted according to a write address from a second address generation circuit 27. 2nd RAM2
6 is written. The main data written in the second RAM 26 is stored in the second address generating circuit 27.
The main data is read in accordance with the read address from, and the parallel / serial conversion circuit 35 converts the main data from a parallel digital signal into a serial digital signal. And the parallel / serial conversion circuit 3
The main data output from the D / A converter 3
The signal is converted into an analog signal by 6 and separated into stereo left and right channel components, which are supplied to a subsequent audio circuit (not shown).

The timing of writing the main data to the second RAM 26 is set at a high speed in accordance with the output timing of the main data from the signal processing circuit 14, but the timing of reading the main data from the second RAM 26 is The second RAM 2 is adapted to the sampling frequency when storing the main data.
6 is slower than the timing of writing to the data. Therefore, as the reproduction proceeds, the second RAM 26 will eventually overflow.

Here, the overflow of the second RAM 26 is detected by the RAM control circuit 32 by monitoring the write address and the read address of the second address generation circuit 27, and an overflow signal indicating the overflow is sent from the RAM control circuit 32. Is supplied to the system control circuit 16. Therefore, a track jump signal is generated from the track jump control means 18 to return the reading position of the disk by the pickup 5 by one track, and the same position on the disk is repeated by returning the tracing position of the disk by the pickup 5 by one track. Be traced. In this case, the second R
Since the main data written so far is sequentially read from the AM 26, the main data is not interrupted,
Plays continuously.

When the overflow of the second RAM 26 is detected, a stop signal for stopping the writing to the second RAM 26 is output from the RAM control circuit 32 at that point, and the writing of the main data to the second RAM 26 is stopped. Therefore, only the reading of the main data is performed, and the amount of the main data written in the second RAM 26 decreases.

On the other hand, when the digital signal read by the pickup 5 is processed by the signal processing circuit 14, the Q code included in the digital signal is monitored by the Q code monitoring means 17 as needed, and the Q code is monitored. The code is stored in a RAM (not shown) in the system control circuit 16. Therefore, since the Q code at the time when the second RAM 26 overflows is stored in the RAM in the system control circuit 16, when the overflow of the second RAM 26 occurs, the track jump control means 1
8 is activated, the access operation starts, and the pickup 5
Is returned by one track of the disk, and a search is performed with the Q code stored in the RAM in the system control circuit 16 as a target. And
The trace position by the pickup 5 approaches the digital signal portion including the Q code at the time of overflow,
The Q code within the target range will be demodulated,
When the Q code is detected by the Q code monitoring means 17, the main data output from the serial / parallel conversion circuit 25 is taken into the data coincidence determination circuit.

Here, the data coincidence determination circuit 34 stores main data of a predetermined number of samples until the overflow of the second RAM 26 occurs, and the main data from the serial / parallel conversion circuit 25 is taken in. The main data is compared with the main data stored in the data match determination circuit 34.
When a match between the main data is detected,
A coincidence signal indicating this is supplied to the RAM control circuit 32, and writing of the main data to the second RAM 26 is restarted.

When the writing of the main data to the second RAM 26 is resumed, the resumed main data is stored in the second RAM 26 next to the address where the last main data at the time when the writing was stopped due to the overflow was stored. The data is sequentially written from the address, and is written following the last main data. And the second
The main data whose writing to the RAM 26 has been resumed is
Since the last main data is continuous on the disk, correct reproduction is continuously performed.

On the other hand, if a match signal cannot be obtained from the data match determination circuit 34 for some reason, the RAM control circuit 32 determines whether the write address and the read address from the second address generation circuit 27 match and the timing in the second RAM 26. Detecting that the main data becomes empty, the writing to the second RAM 26 is restarted. In this case, the read main data is not connected correctly, but the main data is stored in the second RAM so that the reproduction is not interrupted.
Data is written following the last main data in 26, and the newly written main data is read continuously to the last main data.

By the way, if the signal of the disk is not correctly read by the pickup 5 due to an external shock or swing, or a scratch or dirt on the disk, the error detection / correction circuit 10 cannot correct the error of the main data. , A non-correctable signal is generated from the error detection / correction circuit 10. Then, when the RAM control circuit 32 detects that the non-correctable signal has continuously occurred beyond the interpolation capability of the interpolation circuit 13, the RAM control circuit 32 generates an interpolation impossible signal, and the WOK signal generation means 33 WO
The generation of the K signal is stopped. Therefore, the second address generation circuit 27 is controlled via the RAM control circuit 32,
The writing of the main data to the second RAM 26 is stopped, and a track jump signal is generated by the track jump control means 18 to cause the pickup 5 to jump the track so as to return the trace position of the disk. The trace position of the disk by the pickup 5 is returned to search for the Q code of the digital signal block read immediately before reading of the digital signal block including the disk.

If erroneous main data is generated due to an external impact or swing, the erroneous main data can be read again by tracing the same portion of the disk again by the pickup 5, and the correct main data can be read. Can be obtained, the data match determination circuit 3
4 is input with the same main data as the main data immediately before the error, and the data match determination circuit 34 generates a match signal. The comparison of the main data by the data match determination circuit 34 is not performed immediately after the track jump of the trace position is completed, but is performed from the vicinity of the frame including the final main data written in the second RAM 26. At this time, the detection of the Q code is performed targeting the frame including the Q code corresponding to the final main data. In this case, even if the Q code is not detected in consideration of the failure of the Q code capture, A target frame is detected by adding one frame to the time information of the Q code stored at each timing when the frame is reproduced. Then, when the trace position reaches the vicinity of the target frame, the main data for comparison is taken into the data match determination circuit 34,
The data match determination circuit 34 compares the captured main data.

When a match signal is generated by the data match determination circuit 34, a start signal is generated from the RAM control circuit 32, and the correct main data read continuously from the main data immediately before the incorrect main data is read. Will be written.

Therefore, in this case, continuous reproduction can be performed without interrupting the main data.

On the other hand, if erroneous main data is generated due to scratches or dirt on the disk, the erroneous main data cannot be read again even if the same portion of the disk is traced again by the pickup 5, and the correct main data cannot be read. I can't get it. Therefore, the data match determination circuit 34
Does not obtain a coincidence signal, the main data in the second RAM 26 is only consumed, and the RAM control circuit 3
2, it is detected that the main data in the second RAM 26 becomes empty in due course. When the detection is performed, tracing of the same portion of the disk is stopped again, the track jump control means 18 is operated to trace the next portion, and a start signal is generated from the RAM control circuit 32. Writing of the main data to the 2RAM 26 is restarted. In this case, the read main data is not correctly connected to the main data written in the second RAM 26, but the main data is written continuously to the last main data in the second RAM 26 so that reproduction is not interrupted. The main data newly written is read continuously to the last main data.

[0047]

As described above, according to the present invention, in a disk player configured to read a disk at a high speed, the time required for the rotation of the disk to switch from a rated speed to a predetermined high speed is determined. Since the diameter of the playback disk is detected, there is no influence of temporal variation due to uneven rotation at the time of starting rotation of the disk, compared to measuring the time required for the disk to rise to a predetermined speed from the stop. Further, the disk diameter can be reliably detected without providing a detection element such as a photo sensor. Also,
According to the present invention, since the lead-in area in which the index data serving as the index information of the disk is recorded is read at a rated speed in a state corresponding to a small-diameter disk, reading of the index data is ensured. Can prevent runaway of small-diameter discs, and
The main data is read at a high speed after reading the table of contents data at the rated speed.The disk diameter can be detected during a series of playback operations, so there is no need to perform extra operations to detect the disk diameter. There is an advantage that there is no waste of time.

[Brief description of the drawings]

FIG. 1 is a circuit block diagram showing one embodiment of the present invention.

[Explanation of symbols]

 2 Spindle motor 3 Motor servo circuit 4 Servo constant setting means 9 Subcode separation / Q code demodulation circuit 14 Signal processing circuit 15 Clock recovery circuit 16 System control circuit 18 Track jump control means 19 TOC memory 20 TOC reading detection means 21 Switching signal generation Means 22 Timer means 23 High speed detecting means 24 Disk discriminating means

Claims (1)

(57) [Claims] A disk is read by a pickup by rotating a large-diameter disk and a small-diameter disk having different diameters, and each disk is rotated at a predetermined high speed which is higher than the rated speed. A switching signal generating means for generating a switching signal for selectively switching a reading speed of a disk between a rated speed and a high speed in a disk player capable of high-speed reading in addition to reading, and a spindle for rotating the disk A motor servo circuit that controls a motor and is capable of switching servo constants according to large-diameter and small-diameter disks, and increases the rotation of the disk from a rated speed in response to a switching signal from the switching signal generating means. A rotation control means for controlling the motor servo circuit for switching to a speed, and a disk reading speed; Timer means to start timekeeping when switching from rated speed to high speed, measure the preset time according to the time required to start the small diameter disk from rated speed to high speed, and read the disk High-speed detecting means for detecting that the high-speed reading is being performed, and that the high-speed detecting means is performing high-speed reading before the measurement of the set time by the timer means ends. When it is detected, the servo constant of the motor servo circuit is set corresponding to the small-diameter disk, and on the other hand, before the high-speed detecting means detects that high-speed reading has been performed, the set time by the timer means is set. When the measurement is completed, set the servo constants of the motor servo circuit to correspond to the large-diameter disk.
In the initial state, the switching signal generating means
Switch signal to switch the disk reading speed to the rated speed.
Occurs and the motor servo circuit is
Is set to the servo constant according to the
Rated lead-in area where table of contents data is recorded
Read at the speed corresponding to the small diameter disc
A disc player, characterized in that: