JP3057641B2 - Wind clipping method and apparatus - Google Patents

Description

Description: FIELD OF THE INVENTION The present invention relates to a method and an apparatus for clipping display data for enabling data to be displayed on one or more clipping windows.

(Prior art and its problems) A rectangular window has been used as a clipping technique for clipping points, lines and character strings. Points, lines and text are displayed inside the window, but not of course outside. The prior art is, for example, U.S. Pat.
No. 4,623,880 and Addison Wesley Publishing Company, 1982, published by Foley and Vuan Dam, "Basics of Interactive Computer Graphics," pages 145 to 153.

According to these disclosures, points are displayed only when the following equation is satisfied.

X _min XX _max Y _min Y Y _max where (X, Y) are the coordinates of the point, X _min and X _max are the boundaries of the X coordinate of the window, and Y _min and Y _max are the Y of the window.
This is the coordinate boundary.

Also, according to these disclosures, when displaying a line, it is always necessary to calculate the intersection of the line with all the boundaries of the clipping window. According to the "Coen Southland Land Clipping" algorithm, the bounding area of the clipping window is divided into eight sections, and area inspection is used to identify whether these lines are allowed or rejected. The calculation of the crossing point can be omitted for a line satisfying a specific condition, but the calculation of the crossing point must still be performed for other lines. U.S. Patent 4,
No. 623,880 discloses a technique in which a line having one end point inside a window and another end point outside the window does not need to calculate some intersections. However, if the line crosses the window and the endpoints are outside the window, the technique must also calculate the intersection. In particular, when the figure is very complicated, it is necessary to calculate the intersection. Calculating in this way and drawing a line is very time-consuming. Also, this algorithm cannot be used unless the clipping window is rectangular.

Further, according to these disclosures, when displaying a character string,
If a string consists of many lines, the characters must be treated as if they were a series of lines. If the string is composed of bitmap data, a box may be created to contain each word or the entire string. In this case, during clipping it is only necessary to determine the relationship between this box and the window. However, if the entire box is not included in the clipping window, the complete box (ie, word or string) will not appear. Although this technique speeds up execution, it will not be displayed if only part of the string is in the window, resulting in incomplete results.

SUMMARY OF THE INVENTION The present invention is directed to overcoming the aforementioned problems in the prior art, and has as its object to provide a fast and efficient method for arranging data in a clipping window of any shape. A method and apparatus are provided. It is also an object of the present invention to provide a method and apparatus which overcomes the disadvantages of the conventional methods, data imperfection and the use of complex algorithms.

To summarize the basic features of the present invention, one of any shape
A bit map memory for storing one or a plurality of windows is employed, and all the bits representing the inside of the window are written to distinguish between the inside and the outside of the window. Draw points, lines and strings using the read-modify-write instructions and store them in the second bitmap memory. During drawing, a bitmap map including a clipping window and information on drawing is used by using a clipping controller.
Perform logical operation on data. As a result, in the present invention, it is not necessary to calculate the intersection between the drawing and the clipping window boundary in order to select and exclude a section outside the clipping window from the drawing.

Yet another object of the present invention is to overcome the disadvantage that the prior art can only handle square windows. SUMMARY OF THE INVENTION It is an object of the present invention to provide a window clipping method and apparatus for arranging graphic data in one or more clipping windows of any shape.

The present invention adopts and combines the following as technical means for achieving the above-mentioned object. That is, first, in the present invention, it is preferable to employ a graphics processor. The graphics processor stores the window data in the first bit map memory, writes "1" or "0" in all the bits corresponding to the inside of the window, and distinguishes between the inner region and the outer region of the window. The graphics processor then performs a write operation to store the graphics data in the second bitmap memory. The graphics processor then performs a read operation on both bit map memories using the floating data bus, and places all data bits at a high logic level (whether a pull-up resistor is connected to the data bus or not). Read in (either through a pull-down resistor or at a low logic level). The actual data output from both bit map memories is stored in registers.

The graphics processor supplements the data to be drawn and does not change the data that is not drawn. The graphics processor then performs a write operation to both bitmap memories.

The clipping controller used in the present invention includes a logic circuit and receives data output from the glyph processor and stored in a register. Then, modify each data bit. Then the figure is drawn only inside the clipping window. The pattern in the clipping window can be mixed with the drawing. According to the present invention, there is no need to calculate the intersection point between the boundary between the drawing and the clipping window, and the speed of drawing by clipping data in the clipping window of an arbitrary shape can be increased.

 Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram of a system according to a preferred embodiment of the present invention. This circuit includes a graphics processor 1, which can be a commercially available integrated circuit, but which includes a bit map memory 9, 10, a latch 8, a register 11, 12 via a bidirectional transceiver 3. It controls the read-modify-write action and data transfer of the clipping controller 13. The graphics processor in this embodiment is TM3401 manufactured by Texas Instruments.
0GSP may be used. It has a 32-bit internal structure and a 16-bit external data bus, and each pixel is composed of two bits. This integrated circuit is described in the 1986 edition of the TMS34010 User Guide, published by Texas Instruments.

For simplicity of illustration, the lines connected to the graphics processor 1 have been shown only slightly. The connection includes a 16-bit multiple address / data bus (LADO-LAD15).
This system uses an address bus (SA0-SA25) and a data bus (SD0-SD) using a latch 2 and a bidirectional transceiver 3.
15) Select. The row address strobe (/ RAS) is used to drive the (/ RAS) input of the memory. The column address strobe (/ CAS) is used to drive the (/ CAS) input of the memory. The local address latch signal (/ LAL) is used to read the column address from the (LAD0-LAD15) pins when the (/ LAL) signal of the memory changes from high level to low level. The write strobe (/ W) is
W) Used to drive inputs. The shift register transfer or output enable signal (/ TR / QE) is
Used to drive the E) input or the DMAM (/ QE) input. The de-enable signal (/ DEN) is used to control the low and valid output enable input of the bidirectional transceiver 3. The data direction output signal (/ DDUOT) is used to control the transfer direction of the bidirectional transceiver 3.

The bus controller 4 controls an output enable pin of the bidirectional controller 3. When CLPEN is invalid (low), the output enable pin of the bidirectional transceiver 3 is controlled by (/ DEN) from the graphics processor.
When CLPEN is valid (high), bidirectional transceiver 3
Output enable pin is disabled. At this time (LAD
0,2,4... 14) are added to the clipping controller 13 so that the data processed by the clipping controller 13 when the graphics processor 1 is executing a write operation. It is stored in the bitmap memory 9. This is because the pull-up resistor 14 is connected to each line of the data bus, so that the graphics processor 1 reads all data bits at a high level during the read operation. Referring to the memory controller 5, the signals (/ RAS), (/ CAS), (/ TR / QE), and (/ W) output from the graphics processor 1 are classified into two groups. . One group is used to control the read / write operation of the bit map memory 9 (/ RAS
A), (/ CASA), (/ OEA), and (/ WA), and the other group controls the read / write operation of the bit map memory 10 (/ RASB), (/ CASB), (/ / OEB), (/ W
B). Thus, bit map memories 9 and 10 can be independently controlled during read / write operations.

The address decoder 6 generates a bit map memory selection signal (/ BMMSEL). This signal indicates that the graphics processor 1 is accessing the bitmap memories 9 and 10. The address decoder 6 also generates a clipping function setting signal (/ CFSET). This signal is the data (SD) output from the bidirectional transceiver 3.
(0) and (SD1) are latched on a latch 8, and a clipping enable signal (CLPEN) and a clipping state signal (CLPST) are provided.
Can be made. These signals can be used to control the operation of clipping controller 13.

The data bus (SA0-SA17) is an input of the multiplexer 7. When (/ LAL) is at the high logic level, (SA
9-SA17) is selected as an output and applied to the address inputs of bitmap memories 9 and 10. This signal is low.
When at logic level, (SA0-SA8) is selected as an output and applied to the address inputs of bitmap memories 9 and 10.

The graphic processor 1 has a bit map memory 9
When a read operation is performed on the register 10, the register 11 stores the data bits (SD0, SD2,... SD14) from the bit map memory 9.
The register 12 stores the bit map memory 10
, And receive and store the data bits SD1, SD3,... SD15). The outputs of these registers are (XD0, XD2, ... XD
14) and (XD1, XD3, ... XD15).

Clipping controller 13 is a programmable array logic (PAL). The circuit of this embodiment employs a PAL20L8 programmable array logic chip developed by MMI. After the clipping enable signal (CLPEN) is validated, when the graphics processor 1 executes a write operation, the clipping control is performed.
The latch 13 controls the bitmap memory 9 to be in a negative logic state (i.e., valid at low), and controls the bitmap memory 10 to be in a positive logic state (i.e., valid at high).

(IF): If the data bit on the data bus is 0 (1 when the bit map memory 9 is in a positive logic state), (THEN): (IF): If the clipping state signal CLST is 0, (THEN) ): SDi = XDiOR (XDi + 1); i = 0,2, ..., 14 (1) (ELSE): Otherwise SDi = XDiAND (NOT XDi + 1); i = 0,2, ..., 14 ... ( 2) (ELSE): Otherwise SDi = XDi; i = 0, 2,..., 14 (3) where OR, AND, NOT are logical operators.

When bit map memory 10 is in a negative logic state,
Equation (1) is as follows.

 SDi = XDiAND XDi + 1, i = 0, 2,..., 14 Further, the expression (2) is as follows.

SDi = XDiOR (NOT XDi + 1), i = 0, 2,..., 14. The embodiment of the present invention operates as follows, as shown in the flowchart of FIG.

1. Graphic processor 1 is bitmap memory 10
Is cleared, and the logical values of all the bits are set to 0 (block 200).

2. Graphic processor 1 is bitmap memory 10
Draw a clipping window inside and write 1 to all bits corresponding to the inside of the clipping window (block
210).

3. If there is no pattern inside the clipping window, the program jumps to step 9 (block 220).

4. By using the bit block transfer function of the graphic processor 1, the entire bit map memory 10 is patterned.
Scan with In the meantime, an AND logic operation is performed on the pattern data and the bit map memory 10 to write the pattern data only inside the clipping window (block 23).
0).

5. Graphics processor 1 validates the CLPEN signal and sets signal CLPST to zero.

6. The graphics processor 1 writes graphic data to the bit map memory 9 by performing a read-modify-write operation (block 240). When performing a read operation,
Since the bus controller 4 disables the bidirectional transceiver 3, the data in the bit map memories 9 and 10 cannot be sent to the graphics processor 1. Since the pull-up resistor 14 is connected to the data bus, the graphics processor 1 reads all data as 1. The outputs of bitmap memories 9 and 10 are stored in registers 11 and 12
Are stored separately. The graphics processor then modifies the data to be drawn to zero (block 25).
0), the data not to be drawn is held as it is, and then the write operation is executed. When performing a write operation, all data bits output from the graphics processor 1 are processed by the clipping controller 13 and written to the bit map memory 9. At this time, no data is written to the bit map memory 10 (block 26).
0).

7. Graphics processor 1 disables signal CLPEN.

8. Graphic processor 1 is bitmap memory 10
The logic level of all the data inside the clipping window is inverted, but the data outside the window is not changed (block 270).

9. Graphics processor 1 validates the CLPEN signal and sets signal CLPST to one.

10. The graphic processor 1 writes the graphic into the bit map memory 9 (book 280). The procedure is the same as step 6.

11. Disable the clipping enable signal, CLPEN.

12. End clipping. As a result, the expected graphic pattern is obtained in the bit map memory 9.

FIG. 2 shows the contents of the memory so that the above description can be easily understood. To simplify the explanation, 1
Only the addresses X will be described. FIG. 2 (a) and (b)
Indicates the result of executing steps 1 to 4. The content of the address X initially stored in the bitmap memory 9 is 01100011 as shown in FIG. A rectangular pattern surrounded by a dotted line represents a drawing boundary. FIG. 2 (b) shows the contents of the bitmap memory 10. The triangle surrounded by the dotted line represents the shape of the clipping window,
A pattern is included inside the window. Some have the value 1 and some have the value 0. All 0s are written in the memory outside the window. Address X
Is inside the clipping window and part is outside the window, and its value is 01010000. After step 5 is performed, CLPEN is enabled and CLPST is set to zero. Then step 6 is executed. When the graphics processor 1 executes a read operation on the address X, the value 01100011 is output from the bit map memory 9 and stored in the register 11, and the value 01010000 is output from the bit map memory 10 and stored in the register 12. Since the bidirectional transceiver 3 is disabled, a pull-up resistor is used, so that the graphic processor 1 is not used.
Is 1111111111111111. This value is immediately
Corrected to 1100000000000000. When graphics processor 1 performs a write operation, the value 1100000000000000 also appears on the address / data bus. At this time, since the bit map memory 10 is not controlled by the write operation, odd bits are not considered. Therefore, the clipping controller 13 has an odd bit value of 1000 for placement.
Just enter 0000. This arrangement yields the following results.

As a result, as shown in FIG. 2 (c), SD0,2,.
1110011.

FIG. 2 (d) shows the results of performing steps 7 and 8. Here, the data inside the clipping window is inverted, and the content of the address X is corrected to 10101000. Executing step 9, the signal CLPEN is activated, and CLPST
Is set to 1 and then step 10 is executed.
When the graphics processor 1 executes a read operation on the address X, the value 01 output from the bit map memory 9 is read.
110011 is stored in the register 11 and the bit map memory 10
The value 10101000 output from is stored in the register 12.
At the same time, the value read by the graphics processor is still 1111111111111111, which is modified to 1100000000000000 and then the write operation is performed. The arrangement method of the clipping controller 13 is as follows.

The result is SD0,2, ..., 14 = 001010 as shown in FIG.
011. This means that the drawing is performed only inside the clipping window and can be mixed with the pattern inside the window, but the data outside the window keeps its original value. Finally, steps 11 and 12 are executed to end the processing of the wind clipping arrangement.

3 and 4 show the end result of the present invention. In FIG. 3 (a), the outline of the four characters "ERSO" is used as an arbitrary clipping window, and there is no inner pattern. FIG. 3B shows a figure to be drawn inside “ERSO”. FIG. 3 (c) shows the final result according to the present invention.

Fig. 4 (a) also shows that the contour of "ERSO" is used as a clipping window of any shape,
, Some of which are light and some of which are dark. FIG. 4 (b) shows the figure to be drawn, and FIG. 4 (c) shows the final result. The final figure inside the clipping window is a combination of the pattern inside the clipping window and the figure to be drawn. The data outside the clipping window remains unchanged.

In another embodiment of the present invention, as shown in FIG. 6, the aforementioned step 4 is omitted and the aforementioned step 8 is modified as follows (since step 4 is omitted, step 7 is now performed). become).

7. Using the bit block transfer function of the graphics processor 1, the entire bit map memory 10 is scanned by the transferred pattern data. Meanwhile, the inverted pattern
An AND logic operation is performed on the data and the bit map memory 10, and the inverted pattern data is written only inside the clipping window.

 The remaining steps remain as before.

FIG. 6 shows the contents of the memory in this embodiment. FIGS. 6A and 6B show the results of executing steps 1 to 3. FIG. FIG. 6C shows SD0, 2,..., 14 = 01111011 as a result after performing the following logical operation.

FIG. 6 (d) shows the results of steps 6 and 7 (corresponding to steps 7 and 8 of the previous embodiment). Here, the data inside the window includes an inverted pattern, that is, a logic level opposite to the original pattern. FIG. 6 (e) shows the final result, where SD0,2,..., 14 = 01010011. It is created by the following logical operation:

The result is the same as the previous one, but the new one is simpler and faster.

As described above, the present invention provides an effective window clipping method and apparatus for solving problems relating to clipping windows, patterns, gradations, and the like of arbitrary shapes. There is no need to draw the clipping window and calculate the intersection of the boundaries, and the calculation speed is increased.

Although the invention has been described with reference to an embodiment, it will be apparent that variations and modifications may be made. It is, therefore, intended that the appended claims cover any such modifications or changes as fall within the true spirit of the invention.

[Brief description of the drawings]

FIG. 1 is a block diagram of hardware of a system according to an embodiment of the present invention. FIG. 2 shows the data in the memory at different times during the implementation of the method of the invention. Third
The figure shows an example of data and windows, and the results when using the method of the present invention. Figure 4 shows the data and window,
FIG. 7 is a diagram showing another example of a result when the method of the present invention is used. FIG. 5 shows a flow chart of the method according to the invention. FIG. 6 is a diagram showing data in a memory at different times according to another embodiment of the method of the present invention.

 ──────────────────────────────────────────────────の Continuing on the front page (72) Inventor Chi Yuan Lui Taiwan, Husin-chu, Chu Pei-Shing, Chung-Shang Road, Number 529 (72) Inventor Ting-Si-Wei Taiwan, Husin-chu, Hang- Singh, Fusin Fussing Zen Number 167-10 (72) Inventor Wei-Fusin Zuang Taiwan, Taipei, Fussin Tien, St. Techang, Lane 27, Array 29, Number 15, 2F (56) References 63-271672 (JP, A)

Claims (1)

(57) [Claims] 1. A window clipping method used in a graphic processing system for clipping points, lines and character strings of a graphic pattern, wherein initial data representing an arbitrary-shaped clipping window is written into a first bitmap memory. By satisfying the bit of the data inside the clipping window, the inside and the outside of the clipping window are distinguished, and the initial data and the internal pattern of the filled data bit inside the clipping window are satisfied. Performing an AND operation on the internal pattern data to determine clipping window data representing a clipping window having an arbitrary shape and an internal pattern on the inside; and determining the clipping window data in the first bit. Writing to the map memory; and Writing initial graphic data representing a turn into a second bit map memory; latching the clipping window data and the initial graphic data into first and second registers, respectively; ORing the clipping window data and the initial graphic data from the second register and the initial graphic data to determine corrected graphic data, and writing the corrected graphic data to the second bit map memory; Obtaining the clipping window data in which only the inner data is inverted from the clipping window data written in the one-bit map memory; and obtaining the inner and outer clipping window data in which only the inner data is inverted. The data including the whole is further inverted and the corrected graphic data Determining the result graphic data indicating the result of the graphic pattern clipped by the clipping window having the internal pattern by performing an AND operation by the clipping controller; Writing to a bitmap memory.