JP2626894B2 - Straight line drawing circuit of bitmap type display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] Regarding a straight line drawing method of a bit map type display device in which a DDA circuit for drawing a straight line at high speed is arranged on each of a plurality of planes formed in a frame memory, A mode register for designating one-color drawing or two-color drawing, for the purpose of drawing a straight line formed of two colors such as a broken line composed of a background color between lines at high speed, and a mode register and a line style register. A gate circuit that controls an input signal to the arithmetic unit according to the output signal is provided in the line type control unit of the DDA circuit, and the register of each of the line type control units is set in accordance with a display color, and a line and a line are set. The drawing data between is set to each plane at the same time,
Draws a straight line of two colors.

[Industrial applications]

The present invention provides a so-called DDA (Digital Differential Analyzer) circuit that draws straight lines at high speed.
The present invention relates to a straight line drawing circuit of a bit map type display device provided on each of a plurality of planes formed in a frame memory.

2. Description of the Related Art In recent years, as a method of displaying information of characters, figures, and images on a CRT screen, a bitmap display device has been widely used. As shown in FIG. 3, as an example, this has a bit-mapped frame memory (FM), which expands and writes the display contents such as characters in bit (point) units, reads out from the frame memory sequentially, and displays it on the CRT screen. It is a device for displaying. In this device, one dot on the screen corresponds to one bit of the memory, and in the case of color display, a plurality of planes (surfaces) corresponding to the one bit are formed in the frame memory. 1
The three planes have bits corresponding to the dots on the CRT screen, and are displayed by referring to a table (LUT) from data read from each plane and obtaining the intensities of the three primary colors R, G, and B. For example, when the display color is determined by four planes, 4-bit data is given to one dot on the screen. Therefore, 16 colors can be displayed.

This bitmap display device is capable of displaying arbitrary information at an arbitrary position, and thus is suitable for displaying information of characters, figures, and images. On the other hand, since the unit of writing to the frame memory is a dot unit, it takes time to rewrite the frame memory over the entire screen, so that improvement of the display speed is a future subject.

[Conventional technology]

Conventionally, in the case of drawing a straight line in a bitmap display device capable of color display, as shown in FIG.
A DDA circuit 3 is provided for each plane configured in the frame memory (FM) 4, and the linear data is developed and drawn by the DDA circuit 3 of each plane according to the linear pattern and line display color set by the CPU 1. Has been made.

FIG. 4 is an explanatory diagram of the DDA circuit 3, in which (a) shows a schematic configuration diagram, and (b) shows an example in which a drawing pattern is developed on a dot matrix. As shown in (a),
The DDA circuit 3 includes a direction control unit 31, a line type control unit 32, and a destination register (hereinafter, referred to as ddr) 33. The contents of the corresponding drawing position of the corresponding plane are read into the ddr 33, for example, in units of 4 × 4 dots. this
The direction control unit 31 calculates the drawing position and specifies the address for the ddr 33 based on the angle information from the CPU 1. For example,
To explain with the dot matrix 42 of (b), the position is advanced one dot at a time in the X direction, and it is calculated and designated whether one dot is raised or not raised in the Y direction at each dot position.

In the line type control unit 32, according to a straight line pattern designated by the CPU 1 such as 41 shown in FIG. Outputs “0” and writes.

If the reading into the ddr 33 is 4 × 4 dots, the writing into the above-mentioned ddr 33 ends with 4 dots, the writing back to the frame memory 4, the next is read, and the drawing data is written sequentially.

FIG. 5 shows a circuit diagram of a conventional line type control unit 32. In the figure, reference numeral 321 denotes a source data register (hereinafter, referred to as sdr) holding “0” or “1” corresponding to the display color of a line, and 322 denotes a line style register (hereinafter, lsr) holding linear pattern data. 323, an operation unit (hereinafter, referred to as ALU) for inputting data of sdr321 and lsr322, and outputting drawing data to ddr33, and 324, an operation register (hereinafter, op) for holding an operation command to ALU321.
r).

The sdr 321 has, for example, four planes 0 to 3. If the display color of a line is created by writing data of “1” to the planes 1 and 3 and “0” to the planes 0 and 2,
"1" is set to each sdr321 corresponding to 1,3,
“0” is set to the sdr 321 of the other plane. For example, in the case of the linear pattern 41 in FIG.
1000 "data is held, and the direction control unit 31
Are repeatedly output in order of one bit at a time designated by the dot. The ALU 323 performs various operations according to operation commands set to the opr 324.

In the setting “sdr → ddr”, the data set in sdr321 is output to ddr33, and in “▲ ▼ → ddr”, sdr3
21 inverted data is output. In the case of “0 → ddr”, data of “0” is output to all dot positions specified by the direction control unit 31, and in the case of “1 → ddr”, data of “1” is output to all.

[Problems to be solved by the invention]

Since the above-mentioned conventional DDA circuit draws a straight line in one color, for example, when changing a solid line to a broken line, a solid line is drawn with a background color on the displayed solid line, and is erased once. It was necessary to perform a process of overwriting the broken line with the display color of the line. Therefore, it takes twice as much time as drawing a solid line. Particularly, in the case of a thick line, one line drawing of one dot width is performed a plurality of times while being shifted by one dot, which is extremely slow. there were.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has been made in consideration of the above problem, and has been made in consideration of a straight line formed by two colors such as a dashed line including a display color of a line and a background color between the lines. It is an object to provide a drawing circuit.

[Means for solving the problem]

In the present invention, means for solving the above problems include a source data register for holding data specifying a display color or a background color, a line style register for holding pattern data to be drawn, and a source data register. An arithmetic unit for inputting data, performing an operation, inputting data from the line style register to form a result of the operation into drawing data, and sending the drawing data to a frame memory; A DDA circuit having a line type control unit consisting of an operation register for setting and sending the data is displayed in a linear drawing circuit of a bit map type display device arranged in each of a plurality of planes formed in a frame memory. One-color drawing consisting of any of the background colors, or two-color drawing consisting of the display color of lines and the background color between lines And a mode register that specifies,
When one-color drawing is designated in the mode register, the data from the line style register is sent to the computing unit as it is. When two-color drawing is designated in the mode register, the data from the line style register and the source data The line type control unit is provided with a gate circuit that gates data from a register or partial data from an operation register by exclusive OR and sends the gate to an arithmetic unit.

[Action]

In a configuration composed of a plurality of planes, 1
In drawing a straight line composed of colors, drawing data must be set in each plane according to the display color of the line and the space between the lines (background). For example, in the configuration of four planes 0 to 3,
“1” is displayed on planes 2 and 3 to display lines, “0” is displayed for planes 0 and 1, “1” is displayed on planes 1 and 3 for display between lines, and planes 0 and 2 are displayed. The drawing data of “0” is set, and the display color of the broken line is created and drawn on the CRT. That is, the operation of “0 → ddr” is performed on the plane 0 that always outputs “0” by opr.
And “1 → dd” is assigned to plane 3 which always outputs “1”.
Set "r" action to opr. Also, depending on the line and the distance between the lines, the planes 1 and 2 that output “0” or “1” have “sdr → dd”
Set the operation of “r” or “▲ ▼ → ddr” to opr.
In this way, by switching the output data to the plane between the lines, a desired two-color display can be obtained.

According to the present invention, in the line type control unit of the DDA circuit, the mode register is set to two-color display, the source data register and the operation register are set according to the conditions of each plane, and the gate circuit is set to the linear pattern of the line style register. Input signal to the computing unit,
For example, by controlling an input signal from a source data register or an operation register, the output of drawing data to each plane is controlled, and lines and drawing data between lines are simultaneously set on each plane.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a circuit diagram showing one embodiment of a line type control unit of a DDA circuit according to the present invention. The line type controller 32 of the present embodiment shown in FIG.
(Source data register) 321, lsr (line style register) 322, ALU (arithmetic unit) 323 and opr (operation register) 324, with a mode register (hereinafter referred to as mdr) 325 and a gate circuit 326 added. Is done.

An mdr 325 is a register for setting whether to perform one-color drawing or two-color simultaneous drawing in the straight line drawing according to the present invention. If one color is drawn by setting, the output indicating “0” is set to 2
In the case of color drawing, an output indicating "1" is issued. Gate circuit 32
6 is an AND gate G1 and an OR gate G2 which receive the output of mdr325 and the output of lsr322, and the output of AND gate G1 and sdr321
An EOR (Exclusive OR) gate G3 that takes the output of the OR as an input. The output of the OR gate G2 is used as an input to the ALU323 instead of the output from the conventional lsr322, and the output of the EOR gate G3 is also used as the output from the conventional sdr321. It is configured to be input to ALU323 instead of output.

The operation of the above configuration will be described with reference to an example of drawing a broken line under the conditions shown in Table 1. The dashed line is represented by the display color of the line and the background color representing the space between the lines, and the conditions shown in Table 1 indicate that the display color of the line and the background color are the dots corresponding to the display positions in each of the four planes. This indicates that the data is displayed by setting the data to “0” or “1” shown in Table 1.

First, the case of two-color simultaneous drawing will be described. In the line type control unit 32 of the DDA circuit corresponding to each plane, mdr32
The output is set to “1” at 5 and each l
In sr322, the pattern data of a broken line is set as data indicating a line display such as "111000" and "0" as data indicating a background, and is synchronized with the timing of drawing dot designation by a direction control unit (not shown). Then, the set data is sequentially output one bit at a time.

In plane 0 and plane 3 under the conditions in Table 1, the data required for the line and the background are the same.
Set opr324 to “0” → ddr for plane 0
As a result, data of “0” is output from the ALU 323 to all the display positions of the lines on the plane 0. Similarly, in the plane 3, by setting the setting of the opr 324 to “1” → ddr, “1” data is output from the ALU 323 to all the display positions of the lines in the plane 3.

The data required for the line and the background position differs between plane 1 and plane 2. In this case, paying attention to line data, the same data is set in each lsr322. Also,
“1” is set to the sdr 321 corresponding to the plane 1 and “0” is set to the sdr 321 corresponding to the plane 2. Also, “sdr → ddr” is set in each opr324. In addition, OR gate
The ALU input to which G2 is connected is an enable terminal for outputting an ALU output to ddr, and the ALU input to which the output of opr is connected is an ALU operation designation (eg, output = S eor D).
The ALU input to which the output of sdr is connected via the EOR gate G3 is the S input terminal of the operation, and the ALU input to which the output of ddr is connected is the D input terminal of the operation. .

That is, the ALU inputs a control code of an operation command to an input terminal for operation designation, designates an arbitrary operation, sets a dot position to be operated to an enable input terminal, and inputs S to an output of ddr at the dot position. Terminal data is calculated and output, and this control code can specify various calculations by, for example, a combination of signals on four control lines.

Table 2 shows each register, gate, and output of the ALU 323 in the above setting of the line type control unit 32 corresponding to the plane 1. Similarly, Table 3 shows the output corresponding to plane 2.

In the line type controller 32 of the present embodiment shown in FIG. 1, when the output of the mdr 325 is set to "1", the output of the OR gate G2 is always "1", and the output of the EOR gate G3 is output by the output of the lsr322. Since the output is controlled, the output of ALU323 changes depending on the setting of sdr321.

That is, as shown in Table 2, for plane 1,
By setting “1” to sdr321, the output of ALU323 becomes “0” when “1” indicating line display is output in the output of lsr322, and the output of ALU323 becomes “0” when outputting “0” indicating background. “1”
Becomes On the other hand, as shown in Table 3, by setting "0" to sdr321 for plane 2, the output of ALU323 becomes "1" when the output of lsr322 is "1" indicating a line display. When the output is "0" indicating the background, the output of the ALU 323 is "0". A display color and a background color of a broken line are created and displayed by the planes 0 and 3 described above.

As described above, in the present embodiment, when a straight line composed of two colors such as a broken line is drawn, “1” is set in the mdr 325, and the condition of the data of each plane for creating a color is
By simply setting each register, it is possible to draw a straight line composed of two colors at a time.

Also, when drawing in one color as in the conventional case, if “0” is set to mdr325, the output of the OR gate G2 becomes the same as the output of the lsr322, and the output of the AND gate G1 is always “0”. Therefore, the output of the EOR gate G3 is the same as the output of the sdr321. Therefore, the operation is the same as the conventional one, and it is possible to draw only one color.

FIG. 2 shows another embodiment of the gate circuit 326 in the line type control unit 32 of FIG. 1 according to the present invention. The gate circuit 326 'in FIG. 2 comprises an AND gate G1', an OR gate G2 'which receives the outputs of mdr325 and lsr322, and an OR gate G2'.
1 is the same as that of FIG. 1 except that an EOR gate G3 'is arranged on one of four control lines for transmitting a control code from the opr 324 to the ALU 323. The AN
In this configuration, the output of the D gate G1 'is used as one input. The control line on which the EOR gate G3 'is disposed, when the command "▲ ▼ → ddr" is set in the opr324, the control code to the ALU323 is changed to "sdr" by inverting the signal of the control line.
→ ddr ”.

The operation of the above configuration will be described for the plane 1 and the plane 2 under the conditions of Table 1, as in the embodiment shown in FIG. In the present embodiment, the opr324 has "▲
▼ → ddr ”command is set, and sdr321 setting is shown in Table 1.
Pay attention to the display color of the line indicated by sdr321 for plane 1
Is set to “0”, and “1” is set to sdr 321 for plane 2.

Table 4 shows the output of each unit and the operation of the ALU for the above setting of the line type control unit 32 corresponding to the plane 1. Table 5
Shows the output and operation corresponding to plane 2.

In the present embodiment, ALU33 is output from opr324 by the output of lsr322.
Control the operation of ALU323 by changing the control code to ALU3
It changes the output of 23. That is, as shown in Table 4, when the output from the lsr322 is "1" indicating a line display, the output of the AND gate G1 'becomes "1".
3 ′ changes the control code to ALU323, and changes to “sdr → dd
r ”, and“ 0 ”which is the setting data of the sdr 321 is output from the ALU 323. On the other hand, when the output of lsr322 is “0” indicating the background, the output of the AND gate G1 ′ is “0”.
The control code remains "▲ ▼ → ddr" and the sdr
“1” which is the inverted data of the setting of 321 is output. Table 5
In the case of, since the setting to the sdr 321 is "1", the output of the ALU 323 is opposite to the case of Table 4.

As described above, in this embodiment, the same result as that of the embodiment shown in FIG. 1 can be obtained.
Is set only once, it is possible to draw a straight line composed of two colors. Also, in the case of drawing with one color as in the conventional case, if "0" is set to mdr325, the output of the OR gate G2 'becomes
The output becomes the same as the output of lsr322, and the output of the AND gate G1 'is always "0", and the control code to the ALU322 is not changed.

〔The invention's effect〕

As described above, according to the present invention, in drawing a straight line composed of two colors, such as a broken line composed of a display color of a line and a background color between the lines, the two colors are switched by a single operation command. Since drawing can be performed, it is possible to provide a linear drawing circuit of a bitmap type display device which is twice as fast as the conventional one which requires two processes by different operation commands.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of one embodiment of the present invention, FIG. 2 is a circuit diagram of another embodiment of the present invention, FIG. 3 is a configuration diagram of a bitmap display device, and FIG. FIG. 5 is a circuit diagram of a conventional line type control unit. 3; DDA circuit, 4; frame memory (FM), 31; direction control unit,
32; line type control unit, 321; source data register (sdr), 32
2; line style register (lsr), 323; arithmetic unit (AL
U), 324; operation register (opr), 325; mode register (mdr), 326, 326 '; gate circuit, G1, G1'; AN
D gate, G2, G2 '; OR gate, G3, G3'; EOR gate.

Claims (1)

(57) [Claims] A line style register for holding linear pattern data comprising first pattern data and second pattern data; a source data register for holding color data for specifying a color of the first pattern data; A two-color drawing consisting of one of the colors of the first pattern data and the second pattern data, and two colors of the first pattern data and the second pattern data A mode register for designating drawing, and, when one-color drawing is designated for the mode register, one of the first pattern data and the second pattern data input from the line style register. Validate the data and store 2 in the mode register.
A first means for validating the first pattern data and the second pattern data input from the line style register when the color drawing is designated; and a validity made effective by the first means. When the effective pattern data is the first pattern data with respect to the pattern data, the color data specifying the color of the first pattern data held in the source data register is sent to the frame memory as it is, and If the effective pattern data is the second pattern data, the second pattern data is calculated based on the color data held in the source data register, and the color data for specifying the color of the valid pattern data is formed and sent to the frame memory. 2 means, color data specifying the color of the first pattern data and color specifying the color of the second pattern data Line drawing circuit that sets the calculation operation of the second means in accordance with the color data, bit-mapped display device, characterized in that it comprises a operation register to be sent.