JPH02195484A - Wind clipping method and apparatus - Google Patents

Abstract

PURPOSE: To accelerate a plotting speed by storing window data in a first bit map memory by using a graphic processor, discriminating the internal and outernal areas of a window by writing '1' or '0' in all bits inside the window, executing a write operation and storing graphics in a second bit memory. CONSTITUTION: As to the graphic processor 1, the bits of a bit map memory 10 are cleared, the logical values of all the bits are turned to '0', a clipping window is plotted in the memory 10 and '1' is written in all the bits corresponding to the inner side of the window. Then, the bit block transfer function of the processor 1 is used, the pattern data of the entire memory 10 are scanned, clipping enable signals are validated and clipping state signals are set to '0'. Thereafter, the processor 1 is made to perform read-correction-write operations, graphic data are written in the bit map memory 9 and enable signals are inactivated after write. In such a manner, the need of calculating cross points between the boundary of the window and plotting is eliminated and the data of an optional shape are clipped.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method and apparatus for clipping display data to enable data display in one or more clipping windows.

(Prior art and its problems) Until now, a rectangular window has been used in clipping technology □ that clips points, lines, and character strings. The dot, S and string are displayed inside the window, but of course they are not displayed outside. Examples of the prior art include U.S. Pat. No. 4,623,880 and Addison Unizuri Publishers, 1
It is disclosed in ``Fundamentals of Interactive Computer Graphics'' by Fouri and Van Dam, published in 1982, pages 145 to 153.

According to these disclosures, points are displayed only when the following equation holds.

x1n≦x′=xsax Ygain　””wax Here (X, Y) are the coordinates of the point, and X□8 is the boundary of the window's X coordinate, Y,.

and Y are the Y coordinate boundaries of the window.

aX Also according to these disclosures, when displaying a line, it is always necessary to calculate the intersection points of the line and all boundaries of the clipping window. According to the "Cohen-Zerland Kritbing" algorithm, the area enclosed by the clipping window is divided into eight sections, and a region test is used to identify whether to accept or reject these lines. For lines that satisfy the condition, the intersection point 4 calculation can be omitted, but for other lines, the intersection point 4 calculation must still be performed.U.S. Pat.
．． No. 623.880 discloses a technique that eliminates some intersection point calculations for lines that have one endpoint within the window and the other endpoint outside the window. However, if the line crosses the window and the endpoints are outside the window, this technique still requires quadrupling the intersection points. Especially when the figure is very complex, it is necessary to calculate the intersection point. It takes a lot of time to calculate and draw lines like this. Moreover, this algorithm cannot be used unless the clipping window is rectangular.

Furthermore, according to these disclosures, when displaying a character string, if the character string is composed of many lines, the characters must be treated as if they were a series of lines. However, if the string consists of bitmap data, a box containing the entire string is created.

During clipping, you only need to determine the relationship between boxes and windows. If there are no boxes in the clipping window, no complete box (ie, word or string) will appear. Although this technique speeds up execution, it produces incomplete results in that some parts of the string are not displayed even if they are present in the window.

SUMMARY OF THE INVENTION The present invention is directed to solving the aforementioned problems in the prior art, and its purpose is to provide a fast and efficient method for placing data in an arbitrarily shaped clipping window. The goal is to provide the following. It is also an object of the present invention to provide a method and apparatus that overcomes the drawbacks of conventional methods: incomplete data placement and the use of complex algorithms.

To summarize the basic features of the present invention, a bitmap memory is used to store one or more windows of arbitrary shape, and all bits representing the inside of the window are written to. Distinguish between inside and outside. Reading and Modifying Pressure - Draw points, lines and strings using contingency commands,
They are stored in a second bitmap memory. During drawing, a clipping controller is used to perform logical operations on bitmap data containing information about the clipping window and drawing. As a result, the present invention does not require screening of intersection points between the drawing and clipping window boundaries in order to select sections of the drawing that are outside the clipping window.

Yet another object of the invention is to overcome the drawback that the prior art can only handle square windows. SUMMARY OF THE INVENTION The present invention provides a method and apparatus for window clipping that arranges graphic data in one or more arbitrarily shaped clipping windows.

The present invention adopts and combines the following technical means to achieve the above object. That is, first, in the present invention, it is preferable to employ a graphics processor. The graphics processor stores the window data in the first pit map memory and writes 1 or 0 to all bits corresponding to the interior of the window to distinguish between the interior region and the exterior region of the window. The graphics processor then performs a self-contained operation to store the graphics data in the second pit map memory. The graphics processor then uses the floating data bus to perform read operations on both bitmap memories, setting all data bits at a high logic level (whether a pull-up or pull-down resistor is connected to the data bus). or at low logic level). The actual data output from both bitmaps is stored in registers.

The graphics processor supplements the data to be drawn,
The graphics processor then performs a write operation on both bitmap memories since data that is not being drawn is not changed.

The clipping controller used in the present invention includes logic circuitry that receives and converts data bits output from the graphics processor and stored in registers. Then modify each data bit. The shape is then drawn only inside the clipping window. Patterns in the clipping window can be mixed with drawing. According to the present invention, there is no need to calculate the intersection point between the drawing and clipping window boundaries, and data can be clipped within an arbitrary shaped clipping window to increase the drawing speed.

Embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

(Embodiment) FIG. 1 is a block diagram of a system that is a preferred embodiment of the present invention. This circuit is graphics processor 1
The processor includes a pit map memory 9.10° latch 8, registers 11.12,
#IJID the read-modify-write operations and data transfers of clipping controls 0-513. The graphics processor C in this embodiment may be a TM834010GSP manufactured by Texas Instruments. It has a 32-bit internal structure and a 16-bit external data bus, with each pixel consisting of 2 bits. This integrated circuit is rTM published by Texas Instruments.
s34010 User Guide, 1986 edition.

To simplify the illustration, only a few lines connected to the graphics processor 1 are shown. The connection line is a 16-bit multiple address/data bus (LADO-LADI 5
)including. This system uses a latch 2 and a bidirectional transceiver 3 to select the address bus (SAO-8A25) and data bus (SDO-8D15). Row address strobe (/RAS) G;&me EIJ (7) (/RA
S) used to drive the input. The column address strobe (/CAS) is used to drive the (/cAs) input of the Get memory. Local address latch signal (/LA
L) is used to read the column address from the (LADO-LΔD15) bin when the memory's (/LAL) signal changes from high to low. Write]・
Rob (/W) is used to drive the (/W) input of the memory.

Shift register transfer or output enable signal (/TR
/QE) lj Used to drive the VRAM (7) (/TR/QE) input or the DMAM (/QE) input.

The data enable signal @(/DEN) is used to ann the low and valid output enable input of bidirectional transceiver 3. The data direction output signal (/DDUOT) is used to control the transfer direction of the bidirectional transceiver 3.

The bus controller 4 sets the output enable bin of the bidirectional controller 3 to 1. lJ First. When CLPEN is disabled (low), the output enable bin of bidirectional transceiver 3 is controlled by (/DEN) from the graphics processor. When CLPEN is enabled (high), the output enable bin of bidirectional transceiver 3 is disabled. At this time, (LADo, 2.4...14) is added to the clipping controller 13, and the graphic screen [II? When Tsusa1 is performing a write operation,
The data processed by the clipping controller 13 is stored in the bitmap memory 9. This is because a pull-up resistor 14 is connected to each line of the data bus so that the graphics processor 1 reads all data bits as high while performing a read operation. Regarding the memory controller 5, the signal output from the graphic processor 1 (/RAS
>, (/CΔS), (/TR/QE), and (/W) are classified into two groups. One group is for controlling the read/write operations of the bitmap memory 9 (
/1(ΔSA>, (/CASA), (10EA), (/
WA), and the other group controls read/write operations of the map memory 10 (/RAsB).
), (/CASB), (10EB), (/WB). Bitmap memories 9 and 10 can therefore be independently read/written during read/write operations.

The address decoder 6 receives a pit map memory selection signal (/
BMMSEL). This signal indicates that the graphics card Dt7 data 1 is accessing the bit map data 9 and 10. The address decoder 6 also generates a clipping al setting signal (/CFSET). This signal latches the data bits (SDO) and (SDI) output from the bidirectional transceiver 3 into the latch 8,
A clipping enable signal j4 (CLPEN) and a clipping status signal (CLPST) can be generated. These signals can be used to control the operation of clipping controller 13.

The data bus (SAO-8AI 7) is the input of the multiplexer 7. When (/LAL) is at a high logic level, (9-8A17 to S) is selected as the output,
Bitmap signals are applied to address inputs 9 and 10. When this signal is at a low logic level, (SAO-
8A8) is selected as an output and applied to the address inputs of bitmap memories 9 and 10.

Graphics processor 1 uses bitmap memories 9 and 1
When performing a read operation on 0, register 11 retrieves data bits (SDO, SC2) from bitmap memory 9.
,...5D14) and stores the data bits SDI, SD from the bitmap memory 10.
3. ...5D15) is received and stored. The outputs of these registers are respectively (XDO, XD2.-XDl4
),! :(XDl, XD3. ・XDl 5) De 6
The clipping controller 13 is programmable array logic (PAL). The circuit of this embodiment employs a PAL20L8 programmable array logic chip developed by MMI. After the clipping enable signal (CL P [EN) is enabled, when the graphics processor 1 performs a write operation, the clipping controller 13 sets the hitmap memory 9 to a negative logic state (i.e., low and enabled) with υIt[L. , bitmap memory 10 is set to a positive logic state (ie, high and valid).

<IF): If the data hit on the data bus is O (1 when the bitmap memory 9 is in a positive logic state), (-rHEN): (IF): If the clipping status signal CLST is 0 (THEN): SDi -XDi OR (XDi +1) knee 0.2.
..., 14 ...... (1) (ELSE): Otherwise SDi = XDi AND (NOT XDi +1
): to, 2. ...,14 ......(2
)(ELSE): Otherwise SDI -XDi: i-0, 2,..., 14-
(3) Here, OR, AND, and NOT are logical operators.

When bitmap memory 10 is in a negative logic state, (
1) The formula is as follows.

SDi −XDi AND XDi +1. i=0°2, . . . , 14 Formula 121 becomes as follows.

SDi - XDi OR (NOI - XDi +1).

i-0, 2, . . . 14° An embodiment of the present invention operates as follows, as shown in the flowchart of FIG.

1. The graphics processor 1 clears the bits of the bitmap memory 10 and sets the logical value of all bits to O (block 200).

2. Graphics processor 1 draws a clipping window in hitmap memory 10 and writes 1 to all bits corresponding to the inside of the clipping window (block 210).

3. If there is no pattern inside the clipping window, the program jumps to step 9 (block 220).

4. Using the bit block transfer function of Graphic Pro Pituna 1, scan the entire bitmap screen 1 with pattern data. In the darkness, an AND-JII operation is performed on the pattern data and the bitmap memory 10 to insert the pattern data only inside the clipping window (block 230).

5. Graphic Pro 1? Tusa 1 enables the CLPEN signal and sets the signal CLPST to zero.

6. Graphics processor 1 loads graphics data into bitmap memory 9 by performing a read-modify-south operation (block 240); upon performing a read operation, bus controller 4 disables bidirectional transceiver 3; Therefore, the data in bitmap memories 9 and 10 cannot be sent to Graphics Pro 2j1.

Since the pull-up resistor 14 is connected to the data bus, the graphics processor 1 pulls all data to 1
Read as. The outputs of bitmap memories 9 and 10 are stored separately in registers 11 and 12.

The graphics processor then modifies the data bits to be drawn to zero (block 250), retains the data not to be drawn, and then performs the implicit operation. When performing a write operation, all data bits output from the graphics processor 1 are processed by the clipping controller 13 and written to the bitmap memory 9. At this time, no data is added to the bitmap memory 10 (block 260).

1. Graphics processor 1 disables signal CLPEN.

8. The graphics processor 1 inverts the logic level of all the data inside the clipping window in the bitmap memory 10, but leaves the data outside the window unchanged (block 270).

9. The graphics processor 1 enables the CLPEN signal and sets the signal CLPST to 1.

10. Graphics processor 1 writes the graphic to bitmap memory 9 (block 280).

The method is the same as step 6.

11. Disable the clipping enable signal, CLPEN.

12. Finish clipping. These results, 1
One graphic pattern is stored in bitmap memory 9.
It is obtained in the.

To facilitate understanding of the above description, FIG. 2 illustrates the contents of the memory. To simplify the explanation, only one address, X, will be explained. FIG. 2(2) and 0 show the results of performing steps 1 to 4. The contents of the address X initially stored in the bitmap memory 9 are 01100011 as shown in FIG. A rectangular pattern surrounded by dotted lines represents the boundary of m-pictures. FIG. 20 shows the contents of bitmap memory 10. The triangle surrounded by the dotted line represents the shape of the clipping window, and the pattern is included inside the window. Some things are Jtll
and some have the value 0. All 0s are written to memory outside the window.

Part of address X is inside the clipping window, part is outside the window, and its value is oioiooo
It is oo. After step 5 is executed, CLPEN is enabled and set to CLPSTSO. Step 6 is then executed. When graphics processor 1 performs a read operation on 7 address
1, and from bitmap memory 10 ill 0
1010000 is output and stored in register 12. Bidirectional (・Since transceiver 3 is disabled,
Since a pull-up resistor is used, the value read by graphics processor 1 is 111111111111111
1'C-There is. This value is immediately 11000000000
Corrected to 00000. When graphics processor 1 performs a write operation, 1i11000000000
00000 cuff t'less/te"-taha': 1. Upper d also appears. At this time, the bitmap memory 10 is not controlled by write operations, so odd bits are not considered. Therefore, the clipping controller 13 is used for placement. All you need to do is input the odd bit value 10000000. This arrangement method yields the following result.

1ifi 01110011 is stored in the register 11, and the value 10 output from the bitmap memory 10
101000 is stored in register 12. At the same time, the value read by GraphicP0Setuna is still 1111.
111111111111, which is 110000
It is modified to 0000000000 and then the praise operation is performed. The method of arranging the clipping controller 13 is as follows.

As a result, as shown in FIG. 2(f), SDo, 2.・・・
・It becomes 14-01110011.

The second diagram shows the results of steps 7 and 8.

Here, the data inside the clipping window is inverted, and the contents of address X are corrected to 1010100G. Upon execution of step 9, signal CLPEN is enabled, CLPST is set to 1, and step 10 is then executed. When the graphics processor 1 performs a read operation on address X, the output result from the bitmap memory 9 is 800. as shown in FIG. 2(e).
2. ...14-01010011. This means that drawing will only take place inside the clipping window, and may be mixed with patterns inside the window.
This means that data outside the window retains its original value. Steps 11 and 12 are executed in Im to finish the process of window clipping placement.

Figures 3 and 4 show the final results of the invention. Figure 3 (2
), the outline of the four letters rER8OJ is used as an arbitrarily shaped clipping window, and there is no inner pattern. FIG. 30 shows the figure to be drawn inside the l-E RS OJ. Figure 3 @ is the final result according to the present invention.

In FIG. 4(2), the outline of rER8OJ is also used as a clipping window of arbitrary shape, but it includes a pattern inside, part of which is thin and part of which is dark. Fourth
Figure 0 is the figure to be drawn, and Figure 4 @ is the final result. The final figure inside the clipping window is a combination of the pattern inside the clipping window and the figure to be drawn. Data outside the clipping window remains unchanged.

In another embodiment of the present invention, as shown in FIG. become).

7. Using the bit block transfer function of the graphics processor 1, scan the entire bitmap memory 10 with the inverted pattern data.

In the meantime, the inverted pattern data and the bitmap memory 10 are ANDi! The inverted pattern data is written only inside the clipping window by performing a physical operation.

The remaining steps remain as before.

FIG. 6 shows the contents of the memory in this embodiment. 16
The numbers in the figure show the results of executing steps 1 to 3. Figure 6 (to) shows the result S after performing the following logical operation.
Do, 2. ... 14-01111011 is shown.

FIG. 6 shows the results of steps 6 and 7 (corresponding to steps 7 and 8 of the previous embodiment). Here, the data inside the window contains an inverted pattern, ie, a logic level opposite to the original pattern. Figure 6 0 is the final result, 80
0,2. ..., 14=01010011. This is created by the following logical operation.

The result is the same as the previously described method, but the new method is easier and faster.

Thus, the present invention provides an effective window clipping method and apparatus for solving problems related to clipping windows of arbitrary shapes, patterns, N11, etc. There is no need to draw the clipping window and calculate the intersection point of the boundary, and the calculation speed becomes faster.

Although the invention has been described in terms of one embodiment, it will be obvious that variations and modifications may be made thereto. Therefore, the scope of the claims is intended to include such variations and modifications that fall within the spirit of the invention.

[Brief explanation of the drawing]

FIG. 1 is a 70 block diagram of the hardware of a system according to one embodiment of the present invention. FIG. 2 shows data in memory at different times during implementation of the method of the invention. FIG. 3 is a diagram showing an example of data, windows, and results obtained when using the method of the present invention. FIG. 4 is a diagram showing data, windows, and other examples of results when using the method of the present invention. FIG. 5 shows a flowchart of the method according to the invention. FIG. 6 is a diagram illustrating data in one memory at different times in another embodiment of the method of the invention.

Claims (7)

[Claims] (1) A window clipping method for clipping points, lines, and character strings of graphic data using one or more clipping windows of any shape in a graphic processing system, including: 1) First bit writing a clipping window to a map memory and writing bits therein to distinguish between the inside and outside of the window; and 2) writing graphic data to a second bitmap memory;
Do I then need to read the data from the second bitmap memory and compare it with the data read from the first bitmap memory and modify the drawing data bits read from the second bitmap memory? The method of window clipping comprises: determining whether to leave it as is, and writing the result to a second bitmap memory. (2) The method according to claim (1), further comprising:
2) It is necessary to modify the drawing data bits read from the second bitmap memory according to the data read from the first bitmap memory. 3) supplementing the data bits stored in the first bitmap memory; and 4) Examine the output data of the first bitmap memory to determine whether the drawing output data bits read from the second bitmap memory need to be modified or left as is, and then examine the results. The window clipping method characterized in that it includes: performing a write operation of writing graphical data same as the data of step 2) to the second bitmap memory by writing to the second bitmap memory. . (3) a graphics processor that performs read-modify-write operations; and a first processor that stores information originating from the clipping window.
a second bitmap memory for storing graphical data drawn by the graphics processor; and a row bidirectional transceiver for controlling data communication between the bitmap memory and the graphics processor. a bus controller that controls a valid output enable pin; first and second registers that store data output from the first and second bitmap memories, respectively; and a drawing that writes to the second bitmap memory. 1. A system for controlling a clipping window of an arbitrary shape, comprising: a clipping controller that processes data bits for use in the clipping controller; and an address decoder that generates a clipping status signal and a clipping enable signal that control the operation of the clipping controller. 4. The apparatus of claim 3, further comprising: means for disabling the bidirectional transceiver using the bus controller when a read operation is performed by the graphics processor; a plurality of pull-up resistors connected to the data bus such that all data bits read by the graphics processor are 1 when the graphics data in the graphics processor has a negative logic mode;
a graphics processor including means for changing data bits to be drawn to 0 and leaving data bits not to be drawn to 1; and means for storing data output from the first and second bitmap memories in the register; , a control system for processing a clipping window of arbitrary shape. 5. The apparatus of claim 3, further comprising: means for controlling a bus controller to disable a bidirectional transceiver when a read operation is performed by the graphics processor; a plurality of pull-down resistors connected to the data bus such that all data bits read by the graphics processor are 0 when the graphical data being drawn has a positive logic mode; means for changing the data bits that are not drawn to 1 and leaving the data bits that are not drawn at a 0 logic level; and further means for storing data output from the first and second bitmap memories in the first and second registers. A control system for processing a clipping window of arbitrary shape, comprising: (6) Condition that the clipping controller includes means for processing data bits to be drawn when the bitmap memory that stores clipping window information uses positive logic, and the bitmap memory that stores graphic data has negative logic. Below, when the graphics processor controlling the clipping controller performs a write operation, the data bits being drawn are either represented on the data bus with a logic level 0, or the bitmap memory storing the graphical information has a positive logic level. Under the condition that it has
In a method for processing windows of arbitrary shape such that when a graphics processor performs a write operation, the data bits to be drawn are represented as logic level 1 on the data bus: performing an OR operation on corresponding data bits stored in the first register and the second register, and when the clipping status signal is 1;
The window processing method, characterized in that, when , all data bits in the first register are inverted and an AND operation is performed with the corresponding data bits in the second register. (7) Condition that the clipping controller includes means for processing data bits to be drawn when the bitmap memory that stores clipping window information uses positive logic, and the bitmap memory that stores graphic information has negative logic. Below, when the graphics processor controlling the clipping controller performs a write operation, the data bits being drawn are either represented on the data bus with a logic level 0, or the bitmap memory storing the graphical information has a negative logic level. A method of processing an arbitrarily shaped window in which the data bits drawn when a graphics processor performs a write operation are represented at logic level 1 on a data bus, provided that : performing an AND operation on the corresponding data bits stored in the first and second registers when the clipping status signal is 0; and performing an AND operation on the corresponding data bits stored in the first and second registers when the clipping status signal is 1; 1. A window processing method, comprising: inverting all data bits and performing an OR operation with corresponding data bits in a second register.