JPS642953B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a graphic generator for a raster scan type CRT, and more particularly to a microprogram-controlled graphic generator suitable for processing graphics at high speed.

The graphic display that displays figures is a random scan type CRT or a raster scan type.
Various types of CRT, storage type CRT, etc.
Although CRTs are currently used, graphic displays using raster scan type CRTs have become more popular in recent years, as they are capable of displaying colored figures, planes, and arbitrary images.

As shown in Figure 1, raster scan type CRT
3 and has a screen memory 2 that stores color information corresponding to the point coordinates of each dot.The graphic display 4 interprets graphic commands given from a calculator 5 and stores the coordinates of each dot.
A graphic generator 1 that writes Xi and Yi into the screen memory 2 is required. This figure generator 1 processes a figure command such as a straight line to obtain the coordinates Xi, Yi of a sequence of dots that correspond to the figure. Figures include straight lines, circles, curved lines, etc., but in many cases they are broken down into minute straight lines and displayed. In other words, any figure can be displayed by combining straight lines. Therefore, the following explanation will be limited to straight lines as figures.

The algorithm for dot expansion of a straight line into point coordinates Xi, Yi columns is JEBresenham: Algorithm for
computer control of a digital plotter：IBM
SYSTEM JOURNAL, vol.4, No.1 (1965)
Y. Suenaga, et.al.: High Speed Algorithm
for the Generation of Straight Lines and
Circular Arcs: IE ₃ Computer, Vol.C−28, No.
10 (1979), etc. For example, when the straight line AB (direction ranges from 0° to 45°) is expanded into dots as shown in Figure 2 A, the next point after point A is either the upper right or the right side. can be determined by comparing the gradient ΔY/ΔX and the midpoint (1/2) of the grid. That is, by introducing the discriminant D, D ₁ =ΔY/ΔX−1/2 . . . If D ₁ ≧0, select the upper right point. If D ₁ <0, select the right horizontal point. Applying this from the i-1st point to the i-th point, when D _i-1 ≧0, Di=D _i-1 +ΔY/ΔX-1 (See Figure 2B.) D _i-1 < 0, D _i = D _i-1 + ΔY/ΔX (see Figure 2 C) is the discriminant D of the i-th point, and according to this sign, if D ₁ ≧ 0, then upper right, if D ₁ < 0, then Select the point on the right side.

This straight line dot expansion algorithm is
There is an example of execution using a microcomputer (that is, the figure generator 1 is controlled by a microcomputer), but in this case, the processing time is approximately 100 times longer than the known linear generation hardware disclosed in, for example, JP-A No. 51-25934. do. However, on the other hand, straight line generation hardware has the problem that its functions are limited, so in order to have functional flexibility and speed up, it is necessary to use formware (i.e., microprogram control) between hardware and software to generate straight lines. Coordinates Xi,
There is also an example of expanding into the Yi column.

However, even with microprogram control, as with the above-mentioned algorithm, many steps are required for determining the discriminant and repeating loop processing for each dot. FIG. 3 shows a flowchart of the loop processing section for linear dot expansion (preprocessing etc. are omitted).
As shown in this figure, in normal microprogram control, (1) the sign of the discriminant Di is determined, and if it is positive, it branches to (2); if it is negative, it branches to (7).

(2) Update the x-coordinate value when the discriminant Di≧0 is performed (if 0° to 45°, δx1=1).

(3) Update the y-coordinate value when the discriminant Di≧0 is performed (if 0° to 45°, δy1=1).

(4) Calculate the discriminant D i+ ₁ for the next i+1 point when the discriminant Di≧0 (if 0° to 45°, D1
=ΔY−ΔX).

(5) Since the process of displaying one point of the straight line has been completed, if the length of the straight line is 0° to 45°, process to subtract 1 from LC=ΔX).

(6) This is to judge whether the dot has been expanded by the length of the straight line. If LC≠0, return to (1) and LC=0
If so, exit from the loop processing.

(7) Update the x-coordinate value when the discriminant Di<0 (if 0° to 45°, δx=1).

(8) Perform update calculation of the y coordinate value when the discriminant Di<0 (if 0° to 45°, δy1=0).

(9) Calculate the discriminant Di + 1 for the next i+1 point when the discriminant Di _< ⁰ (if it is 0° to 45°, D2
=ΔY). After this, jump to (5).

One loop, that is, one dot development process requires at least six steps. Note that the discriminant D in the above explanation is replaced by the discriminant D in FIG. 2 multiplied by ΔX. Even if the straight line dot expansion algorithm is executed as a microprogram in this way, the result is still 6
This requires a number of steps, and since this loop portion is the core of the graphic display's display speed, processing performance may become a problem.

SUMMARY OF THE INVENTION An object of the present invention is to provide a microprogram-controlled graphic generator that has a high-speed straight line generation capability by adding a simple circuit for generating straight lines to the microprogram-controlled graphic generator.

The present invention provides an address modification flag that modifies an address specifying a data register of an arithmetic unit, and controls whether a positive or negative status of an operation result by the arithmetic unit is set in the address modification flag.

In this way, the straight line dot expansion processing is accelerated by microprogram control.

An embodiment of the graphic generator according to the present invention will be described with reference to FIGS. 4 to 6.

FIG. 4 shows the circuit configuration of the graphic generator 1. The data processing unit includes: (1) Computer adapter: FIFO buffer 11 that receives graphic commands from the computer 5 and inputs response information from the graphic generator 1 to the computer 5.
It consists of 12 FIFO buffers.

(2) Data memory unit 20: includes a RAM/ROM 21 inside the graphic generator 1 for storing graphic control information, character fonts, surface patterns, etc. For access, the selector 22 can select between direct access from the microprogram and access using the address counter 23.

(3) Logic operation unit 30...small capacity 2-port register file 31, Q register 32, shifter 33,
34, a logic operation circuit 35, and input selectors 36 and 37 for the logic operation circuit 35. As the output, either the calculation result or the register file 31 can be selected by the selector 38. This arithmetic unit 30 performs data processing using the linear dot expansion algorithm shown in FIG.

(4) Screen memory adapter 40...has a write color information register 41 and write X and Y coordinate registers 42, 43 for the screen memory 2, and is capable of processing the graphic generator 1 and writing to the screen memory 2. It has a register 44 to enable execution in a pipeline.

It consists of

On the other hand, the control unit includes a microprogram sequencer 50 that controls the execution order of the microprograms;
and a microprogram ROM 51 that receives address information from the sequencer 50 and outputs microprogram data, and a microprogram register 52 that stores microprogram instructions to be executed.
It consists of

The graphic command is taken in from the FIFO buffer 11 and set in the function register 60, and the mapping jump ROM 61 gives the microprogram sequencer 50 the starting address of the microprogram that executes the graphic command, thereby processing the graphic command.

Now, the microprogram sequencer 50 has
A sequence control instruction 92 from the microprogram register 52 is given, and this instruction is (a) Jump by map ROM (MAPJ) (b) Unconditional Jump (JUMP) (c) Conditional Jump (CJUMP) (d) SubroutineCall ( CALL) (e) Retnrn (RTN) (f) Repeat (RPT) (g) Continue (CNT). Positive/negative, zero, odd/even, carry, overflow, shift-out information 90, etc. from the logic operation unit 30 are given as conditional Jump conditions. Furthermore, "0" information 91 is given from the counter 23 for repeat control. That is, the counter 23 is used as a loop count in addition to the address of the data RAM/ROM 21. If the counter 23 is “0” at the time of the Repeat command,
If so, proceed to the next microprogram, and if it is not "0", control is performed by the sequencer 50 to jump to the pre-registered loop start address.
When registering the loop start address, the Jump destination address 93 is stored when a Jump instruction is issued.

The microprogram instructions include a command 94 for the logical operation unit 30, two addresses A96 and B97 for the two-port register file 31, and other counters 23, selectors 22, RAM/ROM 21, FIFOs 11 and 12, screen memory registers 41 to Directive 97 for 43 etc.
is included.

Also, address A96 of register file 31
is modified by the address modification circuit 70 according to the contents of the condition flag 80. In this circuit 70, when the flag 80 is off, the address A96 becomes the A address 98 of the register file 31, and when the flag 80 is on, the address A96 becomes the address A96.
The value of is incremented by 1 and output to A address 98. That is, the flag 80 is normally reset, and the sign of the discriminant D is set to the flag 8 during the linear dot expansion process.
It is set to 0 and address A96 is modified.

Now, condition flag 80 and address modification circuit 70
Since the circuit configuration can be easily realized through the above explanation, the description thereof will be omitted. FIG. 5 shows the circuit configuration of the microprogram sequencer 50. Microprogram address counter 5 that updates addresses sequentially
7. It consists of a stack 58 for storing a return address during subroutine Cali, and a loop start address register 55, and upon receiving a sequence instruction 92 and condition information 90, 91, a control circuit 54 executes the operations described above. As an address for the microprogram ROM 51, one of the address counter 57, stack 58, loop start address register 55, and jump address 93 is selected and given via the selector 56.

Now, the straight line dot development process under microprogram control with the above configuration will be explained with reference to FIG. In the linear command processing, as preprocessing, (1) the writing color specified by the command is set in the color register 41;

(2) From the coordinates of points A and B on the straight line, the discriminant D,
Addition value D ₁ when discriminant D≧0, addition value D ₂ when D<0, similarly x, δx1, δx2, y,
Set δy1 and δx2. and the first point A
is written to the screen memory 2 via the x, y registers 42 and 43 of the adapter, and the discriminant for the first point is
D ₁ (ΔY-1/2X in the case of a direction of 0° to 45°) is calculated, and this sign is set in the condition flag 80. That is, if the discriminant _D1 is positive, the condition flag is reset, and if it is negative, the condition flag is set.

(3) Set the length of the straight line (ΔX=X _B −X _A in the case of a direction of 0° to 45°) in the loop counter 23.

(4) Jump to (5) to register the loop start address for linear dot expansion processing.

(5) The x-coordinate value of the i-th dot is updated as a direct image dot expansion processing loop. In the microprogram, x _i-1 and δx1 are added, but if D≧0, the condition flag is not set, so x _i ←x _i-1 + δx1 is calculated, and if D<0, the condition flag is not set. Since it is set, δx
The register address of 1 is incremented by 1 to point to δx2, and x _i ←x _i-1 + δx2 is calculated. The result is then set in the x-coordinate register 42.

(6) Update the y-coordinate value of the i-th dot. The process is similar to (4) above, if D≧0, y _i ←y _i-1 + δy1, D
If <0, y _i ←y _i-1 + δy2 is calculated.

(7) Here, the following processes are performed simultaneously.

Loop counter countdown and repeat processing based on the result. This allows (4) to (6)
Loops the process for the specified length.

The next discriminant for the i+1th dot is calculated. Here too, if the original D _i ≧0, then D _i+1 ←D _i +
If D ₁ , D _i <0, D _i+1 ←D _i +D ₂ is calculated. The sign of D _i+1 is then set in the condition flag 80.

A write command is issued to the screen memory 2 using the values of the x and y coordinate registers 42 and 43 set in (4) and (5) as addresses.

will be held. As described above, according to this embodiment, the straight line dot expansion processing loop, which used to take 6 steps under conventional microprogram control, is shortened to 3 steps, and the display speed of straight lines can be increased.

In this embodiment, a method of adding +1 to the address modification was used, but another method, such as inverting the lowest order of the address, may be used. Furthermore, the method of registering the loop start address and the method of holding the loop counter are not limited to this embodiment.

As described above in detail, according to the present invention, by adding a simple circuit, a straight line can be generated at high speed, and an arbitrary figure can be displayed at high speed.

[Brief explanation of the drawing]

Figure 1 is a system configuration diagram of a graphic display using a raster scan type CRT, Figures 2 A to C are diagrams explaining the straight line dot expansion algorithm, and Figure 3 shows how it is used in conventional microprogram-controlled graphic generation. A flowchart diagram executed by the device, FIG. 4 is a block diagram of the figure generator according to the present invention, FIG. 5 is an internal circuit diagram of the microprogram sequencer of the figure generator shown in the previous figure, and FIG. 6 is a diagram according to the present invention. FIG. 7, which is a flowchart of the linear dot expansion process performed by the graphic generator, is a table showing an example of variable assignment to the register file. 1... Graphic generator, 2... Screen memory, 3...
... Raster scan type CRT, 4 ... Graphic display, 5 ... Computer, 23 ... Loop counter, 70 ... Address modification circuit, 80 ... Condition flag.

Claims (1)

[Scope of Claims] 1. In a microprogram-controlled figure generator that generates figures by interpreting figure commands given from a data source such as a computer and writing them into a drawing memory, the address specifying the data register of an arithmetic unit is modified. A microprogram-controlled graphic generation device, characterized in that an address modification flag is provided to control whether or not a positive or negative status of a calculation result by the arithmetic unit is set in the address modification flag.