JPS6097442A - Write control system of image memory - Google Patents

Write control system of image memory

Info

Publication number
JPS6097442A
JPS6097442A JP58204251A JP20425183A JPS6097442A JP S6097442 A JPS6097442 A JP S6097442A JP 58204251 A JP58204251 A JP 58204251A JP 20425183 A JP20425183 A JP 20425183A JP S6097442 A JPS6097442 A JP S6097442A
Authority
JP
Japan
Prior art keywords
column
row
image memory
dots
substituted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58204251A
Other languages
Japanese (ja)
Other versions
JPH0560131B2 (en
Inventor
Yoshinori Sugawara
菅原 芳典
Shigenori Koyata
小谷田 重則
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58204251A priority Critical patent/JPS6097442A/en
Publication of JPS6097442A publication Critical patent/JPS6097442A/en
Publication of JPH0560131B2 publication Critical patent/JPH0560131B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Image Generation (AREA)

Abstract

PURPOSE:To speed up vector writing operation by calculating previously the number of dots in a row (column) direction, and repeating bit access function in a column (row) direction and varying the number of bits by a specific value corresponding to each access operation in the row (column) direction at a time or continuously. CONSTITUTION:When a vector between a point r, e.g. (3, 3) and a point S, e.g. (6, 8) is re-stored in a memory, the X-directional difference DX between the coordinates and Y-directional difference DX are 3 and 5, and the number of times of loop operation in a flow chart is five. The number of a set of dots arrayed in the Y-direction is determined by DY-2DXi+2SYj shown by an equation A. A downward coordinate (i) and the value of A are varied and i+1 and A-2DX are substituted in (i) and A to move a pen by one dot slantingly to right unless the value is smaller or zero. A leftward coordinate j+1 is substituted in (j) and A+2DY is substituted to move the pen by a unit number in the Y-direction when the loop frequency is zero or plus.

Description

【発明の詳細な説明】 (1)発明の技術分野 本発明は急傾斜のP1線をドツト1の集合で、早急に書
き込むようにしたイメージメモリの書込み制御方式に関
する。
DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a write control system for an image memory in which a steeply sloped P1 line is quickly written as a set of dots 1.

本発明は、本出願人が先に出願した発明(特願昭56−
10149E(J−J−)のイメージメモリを用いると
、特に効果のあがるものである。
The present invention is an invention previously filed by the present applicant (Japanese Patent Application No.
The use of a 10149E (JJ-) image memory is particularly effective.

(2)従来技術と問題点 レーザプリンタが単一紙葉に印字し、或いはグラフを印
刷するとき、予め棒グラフのデータをメモリに格納した
後、電子計算機により折線グラフを得てそのデータをメ
モリに記1aさせておくことが、好都合である。第1図
に示すように1月〜4月の各棒グラフデータがアナログ
的に示されているとき、実線で示すベクトルVTをめる
ことを考える。例えば1月の棒グラフデータの最上位を
示す点P (a、b)と2月の最」二値を示す点Q(c
、d)の間を多数のドツトで結ふことで直線類似のベク
トルを得る。第2図はそのドツト配列を示すもので、列
方向、行方向の何れも1ドツトずつ処理してメモリに格
納し、その後火の方向への1ドツト処理を続けて行くか
ら、隣接Fノ1−を得るための処理時間はたとえ短くと
も、例えば0゜5ミリ秒程度であっても、20〜30回
と/JfW処理を続ける必要があり、その所要時間は長
大となった。
(2) Prior art and problems When a laser printer prints a single sheet of paper or a graph, it first stores bar graph data in memory, then obtains a line graph using a computer and stores the data in memory. It is convenient to have the following. As shown in FIG. 1, when each bar graph data from January to April is shown in analog form, let us consider the vector VT shown by the solid line. For example, point P (a, b) indicating the highest level of bar graph data in January and point Q (c) indicating the highest binary value in February.
, d) are connected with a large number of dots to obtain a vector similar to a straight line. Figure 2 shows the dot arrangement.One dot in both the column and row directions is processed and stored in memory, and then one dot is processed in the direction of the fire, so the adjacent F no.1 Even if the processing time to obtain - is short, for example about 0.degree. 5 milliseconds, it is necessary to continue the /JfW processing 20 to 30 times, resulting in a long time.

(3)発明の目的 本発明の目的は前述の欠点を改善し、急傾斜の斜線をド
ソ1−の集合で早急に書き込むようにしたイメージメモ
リの書込み制御方式を提供することにある。
(3) Object of the Invention An object of the present invention is to improve the above-mentioned drawbacks and to provide a write control system for an image memory in which steeply sloped diagonal lines can be quickly written as a set of dots 1-.

(4)発明の構成 前述の目的を達成するための本発明の構成は、イメージ
メモリをアクセスするときビットアクセス機能を有する
メモリの書込み方式であって、行(または列)方向のド
ツト数を予めめておき、列(または行)方向では書込み
のために前記ビットアクセス機OF=を繰り返し行い、
行(または列)方向に該各アクセスに対応した所定数だ
け同時又は連続して変化することである。
(4) Structure of the Invention The structure of the present invention to achieve the above-mentioned object is a memory writing method having a bit access function when accessing an image memory, in which the number of dots in the row (or column) direction is predefined. Note that in the column (or row) direction, the bit access machine OF= is repeatedly used for writing,
It means to change in the row (or column) direction by a predetermined number corresponding to each access simultaneously or continuously.

(5)発明の実施例 第3図は本発明の一実施例の動作を示す図、第4図は第
3図により電子計算機が動作するときの動作フローチャ
ートを示す。第3図はイメージメそりにに遍データを格
納した状態を示し、R−5点間のベクトルを得て、該メ
モリに再格納する場合である。第3図においてR点の座
標を(3,3)、8点の座標を(6,8)、原点を左上
端にとり、右方向をj (x)の正方向、下方向をi 
(y)の正方向とする。ΔX=正、Δy−正のときば右
斜下方向の線分と判る。X方向の座標の差DXは3、Y
方向の座標の差DYは5となり、フローチャートにおけ
るループ動作の回数はDYに等しく5回である。また DY−20X−i+2DY−j の式(A式と定義する)を計算する。得られた値はY方
向に揃っているドツトの集合体の数である。
(5) Embodiment of the Invention FIG. 3 is a diagram showing the operation of an embodiment of the invention, and FIG. 4 is an operation flowchart when the computer operates according to FIG. FIG. 3 shows a state in which data is stored in the image memory, and a vector between R-5 points is obtained and stored in the memory again. In Figure 3, the coordinates of point R are (3, 3), the coordinates of point 8 are (6, 8), the origin is at the upper left corner, the right direction is the positive direction of j (x), and the downward direction is i.
(y) positive direction. When ΔX=positive and Δy−positive, it can be seen that the line segment is diagonally downward to the right. The difference in coordinates in the X direction DX is 3, Y
The difference DY in the coordinates in the direction is 5, and the number of loop operations in the flowchart is equal to DY, which is 5 times. Also, calculate the formula DY-20X-i+2DY-j (defined as formula A). The obtained value is the number of clusters of dots aligned in the Y direction.

まず第4図のフローチャートのようにDYの値を5、斜
め方向は右下、2DX/2DYI;!6/10を得て、
電子計算機の動作を開始させiとへの値を変化させ、i
+lをiに代入、A−2DXをAに代入し、値の小また
は零であるかどうかを判断する。結果が否であれば、右
斜め方向へ(1ドツト)ペン移動させ、j+lをjに代
入、A+2DYを八に代入し、ループ回数が零でないと
きは、iを八と変化させる前に戻る。零か正であるとき
はY方向に(1ドツト)ペン移動する。この場合の(1
ドツト)とは、複数のドツトが縦方向に並んでいるとき
1回の操作で行うことをいう。
First, as shown in the flowchart in Figure 4, set the value of DY to 5, diagonally to the lower right, 2DX/2DYI;! Got 6/10,
Start the operation of the electronic computer, change the value of i,
Assign +l to i, assign A-2DX to A, and determine whether the value is small or zero. If the result is negative, move the pen diagonally to the right (one dot), substitute j+l for j, substitute A+2DY for 8, and if the loop count is not zero, return to before changing i to 8. If it is zero or positive, move the pen (one dot) in the Y direction. In this case (1
Dot) refers to a single operation when multiple dots are lined up in the vertical direction.

ループ回数とA式の値を第3図について計算すると下表
のようになる。
When the number of loops and the value of formula A are calculated for FIG. 3, the results are as shown in the table below.

ループ回数 A (]) 5−6 −1 −1+IO9 (2) 9−6 3 (3) 3−6 −3 −3−1107 (4) 7−6 1 (5) 1−6 −5 予定のループ回数だけ処理が進むとき、終点までドツト
をつなぐ折線ができ上り、直線ベクトル類イ以のものが
jqられる。
Loop count A (]) 5-6 -1 -1+IO9 (2) 9-6 3 (3) 3-6 -3 -3-1107 (4) 7-6 1 (5) 1-6 -5 Scheduled loop When the process proceeds the same number of times, a broken line connecting the dots up to the end point is created, and straight line vectors A and higher are jq.

以上は行方向にビットが並んでいるときについて説明を
したから、傾斜が45度より急になっている場合に特に
有効である。逆に傾斜が45度よりゆるやかになってい
る場合は、行方向、列方向とを逆にして処理を行うこと
も可能であり、こうすることにより、列方向の軸に近い
ゆるやかな傾斜の線(列方向の軸に急傾斜の線)に対し
有効な処理を行うことも可能である。
Since the above description has been made regarding the case where the bits are lined up in the row direction, this is particularly effective when the slope is steeper than 45 degrees. On the other hand, if the slope is gentler than 45 degrees, it is possible to perform processing by reversing the row and column directions, and by doing this, a line with a gentle slope close to the axis in the column direction can be processed. It is also possible to perform effective processing for (a line with a steep slope on the axis in the column direction).

(6)発明の効果 このようにして本発明によると、複数の同時書込みが可
能となりメモリへのベクトル書込みが短時間で得られる
ので、プリントするようなときも当初からの時間が早い
(6) Effects of the Invention As described above, according to the present invention, multiple simultaneous writes are possible and vector writing to the memory can be achieved in a short time, so that printing can be done quickly from the beginning.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はベクトル書込み方式を説明する図、第2図は従
来のベクトル書込み方式の動作説明図、第3図は本発明
の一実施例による動作説明図、第4図は第3図の動作フ
ローチャートを示す。 vT−ベクトル 特許出願人 冨士通株式会社 代 理 人 弁理士 鈴木栄祐 1月 2月 3月 48 第1図 第3図
Figure 1 is a diagram explaining the vector writing method, Figure 2 is a diagram explaining the operation of the conventional vector writing method, Figure 3 is a diagram explaining the operation according to an embodiment of the present invention, and Figure 4 is the operation of Figure 3. A flowchart is shown. vT-Vector Patent Applicant Fujitsu Co., Ltd. Representative Patent Attorney Eisuke Suzuki January February March 48 Figure 1 Figure 3

Claims (1)

【特許請求の範囲】[Claims] イメージメモリをアクセスするときビットアクセス機能
を自するメモリの書込み方式であって、行(または列)
方向のドツト数を予めめておき、列(または行)方向で
は書込みのためにiiJ記ピントアクセス機能を繰り返
し行い、行(または列)方向に該各アクセスに対応した
所定数だり同時又は連続して変化することを特徴とする
イメージメモリの書込み制御力式。
A memory writing method that has a bit access function when accessing image memory, and uses row (or column)
The number of dots in the direction is set in advance, and in the column (or row) direction, the focus access function described in ii. An image memory write control force type that is characterized by a change in the write control force of an image memory.
JP58204251A 1983-10-31 1983-10-31 Write control system of image memory Granted JPS6097442A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58204251A JPS6097442A (en) 1983-10-31 1983-10-31 Write control system of image memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58204251A JPS6097442A (en) 1983-10-31 1983-10-31 Write control system of image memory

Publications (2)

Publication Number Publication Date
JPS6097442A true JPS6097442A (en) 1985-05-31
JPH0560131B2 JPH0560131B2 (en) 1993-09-01

Family

ID=16487355

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58204251A Granted JPS6097442A (en) 1983-10-31 1983-10-31 Write control system of image memory

Country Status (1)

Country Link
JP (1) JPS6097442A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS572085A (en) * 1980-06-04 1982-01-07 Hitachi Ltd Microprogrammable graphic generator
JPS5794788A (en) * 1980-12-05 1982-06-12 Hitachi Ltd Graphic display
JPS58126587A (en) * 1982-01-22 1983-07-28 株式会社東芝 Generation of line coordinates

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS572085A (en) * 1980-06-04 1982-01-07 Hitachi Ltd Microprogrammable graphic generator
JPS5794788A (en) * 1980-12-05 1982-06-12 Hitachi Ltd Graphic display
JPS58126587A (en) * 1982-01-22 1983-07-28 株式会社東芝 Generation of line coordinates

Also Published As

Publication number Publication date
JPH0560131B2 (en) 1993-09-01

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