JPH011075A - Image processing device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an image processing device that manages a display memory and draws figures, and particularly relates to an image processing device that manages a display memory and draws figures, and particularly an image processing device that is provided in such a processing device to search for boundaries of figures. Regarding circuits.

[Conventional technology]

One of the functions of an image processing device is to fill the inside or outside of a figure defined by a closed loop with an arbitrary pattern. To do this, it is necessary to search the boundaries of the figure. Each dot on the display screen corresponds to one bit in the display memory, so the contents of the display memory are read word by word, the data of each bit in each word is detected, and the boundary of the figure is searched. ing.

Graphic boundary search according to the prior art was performed as follows.

(1) Give a starting point for boundary search, read one word of data with the bit specified by this starting point from the display memory, and use a bit shift command to check that the data of the bit specified by the starting point is "1". or "0". If it is rlJ, the starting point is considered to be the boundary of the figure, the search is stopped, and an error message is sent. This is because the left end boundary and/or right end boundary of the figure cannot be determined.

(2) If rOJ, store "1" from the bit specified at the search start point to the leftmost bit (LSB) of one word that includes the bit specified at the search start point. A bit shift instruction is used to determine whether or not there are any bits.

(3-A) When a bit storing r I J is detected, the bit position is set as the left edge boundary. Then, the search begins in the right direction from the search start point.

(3-B) On the other hand, if a bit storing "1" is not detected, the contents of one word adjacent to the left side of that word are newly read. A bit shift instruction is used from the rightmost bit (MSB) to the leftmost bit (LSB) of the read word to determine whether the content of each bit is "1" or "0".

(3-C) If the bit storing r I J is not detected, a word adjacent to the left side is newly read out and the same process is performed. Thereafter, the process is repeated until a bit storing "1" is detected. The leftmost boundary is thus detected.

(4-A) Next, search for the right edge boundary. A bit that stores "1" in the rightmost bit (MSB) of a word containing this bit from the bit specified at the search start point is detected.

(4-B) If no such bit is detected, read the contents of the adjacent word on the right and detect the bit storing "1" using a bit shift instruction. Thereafter, the same process is repeated to search for the right edge boundary.

Thus, the boundaries of the shape are searched.

[Problem to be solved by the invention]

However, in this boundary search method, in order to find the bit that stores "1", the data is determined bit by bit using a bit shift instruction. Therefore, a considerably long processing time is required. For example 1
If a boundary point between 000 bits does not appear, the bit shift command and data determination process will not be performed 1000 times.

SUMMARY OF THE INVENTION An object of the present invention is to provide an image processing apparatus equipped with a boundary search means that performs and obtains a boundary search at high speed.

[Means to solve the problem]

An image processing apparatus according to the present invention includes means for generating mask information of N bits, of which M bits (0≦M≦N-1) have mask data, and a means for generating mask information of which M bits (0≦M≦N-1) have mask data; means for receiving the display data and outputting display data of bits corresponding to the bits of the mask information that do not have the mask data; and means for detecting the display data of each output bit and performing a predetermined logic operation of the display data of the output bits. and means for generating bit position information associated with a bit having a level.

The number and/or position of bits having mask data in the mask information can be varied by control data.

When processing one word having the bit specified by the search start point, first, mask information is generated such that all bits except the bit at the position corresponding to the seventh bit position have mask data. Therefore, at the search starting point, only the data of the specified bit is supplied to the position information generating means. If the data of this bit is "1" as a predetermined logic level, that information is immediately obtained and the boundary search can be stopped.

If "0", boundary searches in the left and right directions start. In this case, the mask information includes mask data at least from the bit adjacent to the bit position corresponding to the bit position specified at the search start point to the leftmost or rightmost bit. Therefore, if there is a "1" bit in the word having the bit specified by the search start point, position information related to that bit can be obtained. If there is no boundary within this word, one adjacent word is read. In this case, all bits of mask information have no mask data. Therefore, all the bits of one word read out are supplied to the position information generating means and are "1".
If there is a bit storing the bit, position information associated with that bit is generated. In this way, the boundary search for the figure is completed in a short time.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention. The sequencer 1 manages the display memory 8 and displays the table of the CRT 9.
Draw shapes on the screen. Each dot on the display screen of the CRT 9 corresponds to 801 bits of display memory.

One word of display memory 8 is composed of 16 bits. When the sequencer 1 receives a fill-in command from a host processor (not shown), a first
and second registers 2 and 3, mask information generation circuit 4, first to sixteenth mask gates 5-0 to 5-
15. Using the position information generator 6 and the display memory control circuit 7, search for the boundary of the figure to be filled.

FIG. 10(A) shows an example of a figure to be filled in. The boundary of this figure is indicated by a thick line 100, and the inner area 10
Let h be filled with 1 in an arbitrary pattern. Figure 10 (B
) is one horizontal line L of the figure shown in Figure 10 (A).
, and the horizontal line L all r L located above and below it
It is an enlarged view of the data map of each word of the display memory 8 at a-1, and the same figure (C) is an enlarged view of the data map of each word of the display memory 8 in the other horizontal lines L,
3 is an enlarged view of the data map of each word of the display memory 8 in the horizontal line Lb+++Lb-+ located above and below the horizontal line Lb+++Lb-+. The leftmost bit in each word is the least significant bit. In Figure 10 (B) and (C), the X mark is "1"
However, it indicates that it can be ``0''.

Returning to FIG. 1, the sequencer 1 determines whether bit rlJ or rOJ, which is not shown, is the start point of the field search. To this end, the sequencer 1 instructs the display memory control circuit 7 to read from the display M memory 8 one word of data having the bit specified at the boundary start point. In response to this,
The display memory control circuit 7 outputs the address of the word to the address bus 71 and inputs the data of the word from the display memory 8 via the data bus 72. One word of 16-bit data MD having the bit specified at the boundary search starting point is supplied to the first to sixteenth mask gates 5-0 to 5-15, respectively. Thereafter, the sequencer 1 writes data indicating the position of the bit designated by the boundary search start point into the first and second mask registers 2 and 3. Since one word consists of 16 bits, data of 4 bits is written into mask registers 2 and 3, respectively. The contents of the mask register 2.3 are provided to the mask information generation circuit 4.

As shown in FIG. 2, the mask information generation circuit 4 includes first and second mask ROMs 41 and 42 and 16 AND
It has an AND gate circuit 43 composed of gates.

The contents of the first mask register 2 are stored in the first mask ROM 4.
The contents of the second mask register 3 are supplied as the address information of the second mask ROM 42. The first mask ROM 41 has a third mask ROM 41 for each of the 4-bit address information "0" to "F".
16-bit output X shown in Figure (A). Or XL.

The second mask ROM 42 generates the 4-bit address information "0" to "F" for the husband 4 as shown in FIG. 3(B).
16-bit Y shown in . to Y15 is generated. 1st
The 16-bit mask ROM 41 outputs X. or X 1
5 is supplied to the 10th input terminal of each of the 16 AND gates of the AND gate circuit 43, and the second mask R
The OM42016 bit outputs Y0 through Y15 are provided to the second input terminal of each of the 16 AND gates. A
The 16-bit output from the ND gate circuit 43 is generated as mask information 4-0 to 4-F. Assuming that the bit position data indicated at the search start point is A'',
As is clear from FIGS. 3(A) and 3(B), the mask information data 4-0 to 4-F are "'0000 000
0 0010 0000”.In other words, all bits 4 except the A-th bit 4-A of the mask information
-0 to 4-9 and 4-B to 4-F take mask data "0"', and only °A''A''-th 4-A takes mask data "1". Mask information data 4-0 to 4-F are supplied to mask gates 5-0 to 5-15, respectively.

Each of mask gates 5-0 to 5-15 has an AND gate 54, an inverter 51, an OR gate 57, and two transfer gates 52.53, connected as shown. Transfer gates 52 and 53 are controlled by a logic control signal 55 from sequencer 1.

That is, when the logic control signal 55 is "1", the transfer gate 52 is opened, and when it is "0", the inverter 56 is opened.
The transfer gate 53 opens. When retrieving data for a boundary retrieval problem, the signal 55 takes "1". Thus, when the data at the boundary search starting point is "1", only the A-th output 5-100 among the outputs 5-00 to 5-150 of the mask gates 5-0 to 5-15 is "1".
1, and all remaining outputs are 0. on the other hand,
When the data at the boundary search starting point is "0", all outputs 5-0 to 5-150 take "0". Outputs 5-00 to 5-150 of the mask gates are supplied to the position information generating circuit 6.

The position information generation circuit 6 receives search direction information 6 from the sequencer 1.
1.62 and according to this information mask gate output 5-
Which bit from 00 to 5-150 is “1” or “0”?
63 to 66 outputs location information indicating whether the
The detection information 67 and the backward information 68 are supplied to the sequencer 1 as an output 67 of forward information indicating that the search is to proceed. The position information generating circuit 6 has a PLA configuration as shown in FIG. In FIG. 5, at the intersection of each vertical signal line and each horizontal signal line, there are 118 AND gates (NAND gate NA) and one NOR gate N0 (118 AND gates).
ANI and 15 OR games) Each of the ORs has search direction information 61 and 62 .
2-4 decoder 69 and 4 AND games) AN2
The expansion is controlled by Thus, Mask Gate 5
The relationship between the position information 63 to 66, forward information 67, and backward information 68 generated by the position information generation circuit 6 for the 16-bit outputs 5-○○ to 5-150 from −○ to 5-15 is as follows: When the information 61.62 is "00", the relationship is as shown in Figure 6, and when it is "01", the relationship is as shown in Figure 7. When the search direction information 61,62 is "10", the relationship is as shown in Figure 8. is obtained, and when it is "11", the relationship shown in Fig. 9 is obtained.In other words, in Fig. 6, it is obtained as the most significant bit information.However, if the input of the most significant bit (MSB) is "1", the relationship shown in Fig. 9 is obtained. In this case, the boundary point position information becomes "0" and the retreat information becomes rlJ. When the inputs 5-00 to 5-I50 of all the workpieces are "0", the boundary point position information becomes "0" and the forward movement information becomes "1". In FIG. 7, the position of the serial bit of the bit that takes "1" first when viewed from the input 5-00 of the least significant bit (LSB) is obtained as boundary point position information. However, forward information in which LSB bits 5-0 are "1" is obtained. In FIG. 8, the position of the first bit that takes "0" from MSB bits 5-150 is obtained as boundary point position information. all bits 5-00 to 5
When -150 is "1", advance information of "1" is obtained. In Figure 9, starting from LSB bits 5-00, the first
'' is obtained as boundary point position information. When all bits 5-00 to 5-150 are ``1'' in the base, the front groove information becomes ``1''. Note that the bits marked with an X in Figures 6 to 9 can be either "0" or "1."
” But it shows that you can take it.

When searching for the data of the bit designated by the boundary search start point, the sequencer 1 supplies search direction information 61, 62 of "00" to the position information generating circuit 6. Therefore, the relationship between the input and the output of the circuit 6 is as shown in FIG. As described above, if the bit designated by the search start point is "1", only the A-th mask gate output 5-100 becomes "1". Therefore, the boundary position information 63 to 66 takes data of "11". At this time, both forward information 67 and backward information 68 are "0".
It is. These information are supplied to sequencer l. Therefore, the sequencer 1 considers that the search start point is on the boundary and stops the search.

While processing such as error message output is started, as shown in FIG. 10, if the search start point S is given within the inner region 101 of the boundary 100 of the figure to be filled, the process shown in FIG. As shown, a word W, , having the bits specified by the search starting point S. All bits of ``0''.

Therefore, the mask gate output 5-00 to 5-15
All 0's are "0". As a result, boundary point position information 63 to 66 of "O" is obtained, and forward movement information of "1" is obtained. Thus, the sequencer 1 determines that the search starting point S is not on the boundary, and searches from "0" to "1" for each bit to the left from the search starting point S. Hereinafter, this search will be referred to as "leftward 1←0 search." In this search, the sequencer 1 generates the logic control signal 55 of "1" and sets the search direction information 61, 62 to "00".

The leftward 1←0 search is performed in the following procedure.

(1) “1” from the bit to the least significant bit of the word Wa, c that has the bit specified by the search starting point S
In order to detect whether there is a bit that stores , the sequencer 1 sets '0' in the first mask register 2 and stores '0' in the second mask register 3, which is the bit position specified by the search start point S. As a result, the outputs 4-0 to 4-F' from the mask information generation circuit 4 are as shown in FIG. 3(A).
, as is clear from (B), “1111 1111 1
1100000''.In other words, mask information data 4-B to 4-F takes mask data "0", and the others take non-mask data "1".A-th bit specified by search starting point S Since it is known from the above-mentioned search start point data search process that is rOJ, "9" may be written in the second mask register 3. In this case, mask information data 4-0 to 4- F is “11111”
1111100 0000". This mask information is supplied to mask gates 5-0 to 5-15, respectively. Mask gates 5-0 to 5-15 (or 5
-90) is the data from the LSB of word W, c to the Ath (or A-1st), and the remaining output is "
0". In the example of FIG. 10, all bits of words Wa and c are "0", so all mask gate outputs 5-0 to 5-150 are "0".

Therefore, as is clear from FIG. 6, the boundary point position information 63 to 66 are "0", and the advance information 6 is "1".
7 is output.

(2) Based on this information, sequencer 1 selects word W1
1. Since it is determined that there is no bit storing rlJ from the bit specified by the search start point S to the LSB, the word W1. . The word W*+a-1 on the left is accessed and its data is read. The sequencer 1 further writes "O" into the first mask register 2 and "F" into the second mask register 3, respectively.

As a result, as is clear from FIGS. 3A and 3B, the mask information data 4-0 to 4-F all become "1" (non-mask data). As a result, the mask gates 5-0 to 5-15 are connected to the read word W a
+Output all bits of data of c-1. In the example of FIG. 10, word W1. . All bits of −1 are “On. Therefore, the boundary point position information 63-66
becomes "0", and the advance information 67 becomes "1".

(3) Sequencer 1 performs this ry based on the obtained information.
- Since it is determined that there is no bit storing "1" in word Wa, c-+, word W, . Read the contents of the word to the left of -1 and perform a search. There is no need to rewrite the contents of the first and second mask registers 2 and 3.

(4) As a result of reading the word Wle-1 including boundary information, the mask gate outputs 5-00 to 5-150 are 6
××××××××××××××10''. As a result of this output being supplied to the position information generating circuit 6, as is clear from FIG. 6, the boundary point position information 63-66 15
” (F), forward information 67 and backward information 68
Both become "0". In this way, the sequencer 1 completes the leftward 1←0 search on the line L in which it detects that the left end boundary BaL on one horizontal line L1 of the graphic area 101 to be filled is located at the most significant bit of the word Wle-1.

The sequencer 1 then searches from "0" to "1" for each bit in the right direction from the search start point S.

This search will be referred to as "rightward 0→1 search" below.

In this search, the logic control signal 55 is set to "1" and the search direction information 61, 62 is set to "01". Therefore, the input/output relationship of the position information generating circuit 6 is as shown in FIG. The procedure for rightward 0→1 search is as follows.

(1) The sequencer 1 reads the data of the words Wa and c having the bits specified by the search start point S and supplies them to the mask gates 5-0 to 5-15. Furthermore, the sequencer 1 sets the first mask register 2 to "A" or "II".
Write B 11 and set “F” to the second mask register 3.
Write. As a result, mask information output 4-0 to 4
-F becomes "00000000 0011 1111" or "00000000 0001 1111'. In other words, outputs 4-0 to 4-A (or 4-B) take mask data "0". Therefore, mask gate output 5- 100 (or 5-110) to 5-150 take the data of the corresponding bit of word Wa+c.
In the example shown in Figure 0, the word W1. .

Since all bits of are rOJ, all mask gate outputs 5-00 to 5-150 will be "0".

Therefore, as is clear from FIG. 7, the boundary point position information 6 row 66 becomes "0" and the forward movement information 67 becomes "1".

(2) Based on this information, the sequencer 1 determines that there is no bit that stores "1" from the bit specified by the search start point S of words Wa, c to the most significant bit. The word W on the right side of the word Wa, e. +1 is read. Furthermore, "0" and "F" are stored in the first and second mask registers 2 and 3, respectively. Therefore, all mask information outputs 40 to 4-F become non-mask data "1n,"
Word W1. . +1 data is output from mask gates 5-0 to 5-15. In Figure 10, the word W
Since the data of a + c "l is all 0",
Boundary point position information 63-66 becomes “0” and forward movement information 67
becomes "1".

(3) Since it is determined that there is no set storing "1" in this word Wa+c+1, the word to the right of the word Wa+c+1 is read out and the search is continued. Register 2.3
The contents of the file will not be changed.

(4) Word W1 containing right edge boundary information. . As a result of reading 0, mask gate output 5-00 to 5-150
becomes “IX×××××××××××××”. 7th
As is clear from the figure, the boundary point position information 63-66 is “
15" (F), and the backward information 68 of "1" is generated. Since the retreat information 68 is “1”, the boundary point position information is “1”.
5″ is the word Wa, c to the left of word W110.+1
+. -1) shows the most significant bit. That is, the sequencer 1 has the right edge boundary pB on the line L1, * is the word W1 . . +(n-1) most significant bit.

Thus, one horizontal groove L of the area 101 to be filled
The left end boundary B1 and right end boundary BIIB on 1 are searched and determined.

Now that the search for the left and right boundaries of line L has been completed, a boundary search for line L, +1 located above line L1, or line L, -1 located below, is performed in the same way as the above process. be done. That is, word Wa+1 . above word Wa, e. e or the word W below...
. , and performs a leftward 1←0 search from the same bit position as the bit position specified by the search start point S. After this search is completed, a 0→1 search is performed in the right direction.

As shown in FIG. 10(A), area 10 to be filled
1 is not a simple rectangular area, but has a partially concave shape. That is, as shown in the data map of line L in FIG. 10(C), line L.

All the bits in the portion corresponding to the boundary line 100-1 are "1", and there are four boundary points Bb to B b 4 on the line L. The boundary point BBI can be detected by searching 1←0 in the left direction, and the boundary point B
b can be detected by rightward 0→1 search. Boundary point B
b2 can be detected by a rightward O-+1 search, but for each word located on the left side of the vertical line passing through the search starting point S, two searches are performed: a leftward 1←0 search and a rightward 0→1 search. It is necessary to perform multiple searches. Similarly, boundary point B b
s can be searched by a leftward 1←0 search, but requires two searches for each word located to the right of the vertical line. In order to solve such problems, the boundary search circuit shown in FIG. 1 has functions of leftward O.-1 search and 1-0 search.

That is, a word located on the boundary line 100-1 of the line L and to the left of the search starting point S, for example, W6. , is read, the sequencer 1 performs a leftward 0←1 search. In this search, the same data "On," as in the leftward 1←0 search is stored in the first and second mask registers 2 and 3.
Write FIT. Also, the logic control signal 55 is set to “0”.
and set the search direction information 61 and 62 to "10". Mask information outputs 4-0 to 4-F all take data "1", but as is clear from FIG.
is opened and transfers the output of OR gate 57. Therefore, mask gate outputs 5-Oo to 5-150 are word W69. This is the data of each bit. The input/output relationship of the position information generating circuit 6 is shown in FIG. In the example of FIG. 10, the word W1. ．． All data are "1". Therefore, Ulu's advance information 67 is obtained in which the boundary point position information 63-66 is "0". Sequencer 1 determines that there is no bit storing "0" in words Wb, d, and reads words W, , d-, to the left thereof. The contents of registers 2 and 3 remain unchanged. Word W,
, the data for a-+ is 'oooooooo.

0000 0111". Therefore, the boundary point position information 63-66 becomes "12" (C), and the advance information 67,
Both retreat information 68 becomes "0". As a result, sequencer 1 determines that the Cth bit of word W, .
, is determined to be the upper boundary point Bb2. Word W,
For each word on the left side of , , , search is performed in the left direction 1←0 to reach the boundary point Bb.

Detect.

Words on the line L to the right of the vertical line passing through the search starting point S, for example W61. When is read out, right direction 1 →
Perform 0 search. In this search, the data in mask registers 2 and 3 are not changed.

The logic control signal 55 is set to "0" and the search direction information 61 and 62 are set to 11". The input/output relationship of the position information generating circuit 6 is shown in FIG. 9. All data in the word W51. is set to "1".
'', the boundary point position information 63-66 shows "0" and the advance information 67 becomes "In." Therefore, the words Wb and sol on the right are read out. The data of this word is “1110oooo oooo oooo
”, the boundary point position information 63-66 indicates “3” and the forward information 67 and backward information 68 both become “0”.Thus, the third bit of the word Wb, s++ is on the line L.

It is detected as the upper boundary point Bb3. A rightward 0→1 search is performed from the next right-hand neighbor word, and as a result, a boundary point B b 4 is detected.

For a word in line L that contains a bit with the same positional information as the bit specified by search starting point S,
A leftward 0←l search is performed from that bit to the least significant bit, and a rightward 1→0 search is performed from the next bit to the most significant bit. The bit position is “A”
'', in the case of leftward 0←1 search, write "0" and "A" to the first and second mask registers 2 and 3, respectively, and set the control signal 55 to "0". Therefore, The bit from the Bth bit to the MSB is fixed to "1".In other words, data "1" is used as mask data in this case.In the case of rightward 1→0 search, the first and second masks are used. “B” in registers 2 and 3.

The write signal 55 of each F++ is set to "0".

Therefore, bits from the LSB to the A-th bit are masked with mask data "1".

Thus, in one search, four boundaries at line L, B
b + or Bb is detected.

The present invention is not limited to the above embodiments, and various modifications are possible. For example, although the mask information generation circuit 4 and the position information generation circuit 6 have complicated circuit configurations, they can achieve the same function by combining various logic gates. [Effects of the Invention] As described above, the mask information generation circuit 4 and the position information generation circuit 6 are equipped with the boundary search means according to the present invention. Since the image processing device does not require any bit shift commands, it can quickly detect boundaries of areas to be filled.

[Brief explanation of drawings]

1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing the mask information generation circuit 4 shown in FIG. 1, and FIGS. 3(A) and 3(B) are respectively shown in FIG. 4 is a table diagram showing the input/output data relationship of the first and second mask ROMs 41 and 42 shown in FIG. The circuit diagram of the position information generating circuit 6 shown in FIG. 6, FIG. 7, FIG. 8, and FIG. B) and (C) are a pattern diagram showing an example of an area to be filled in, an enlarged view of the data map at line L, and an enlarged view of the data map at line L, respectively. Agent Patent Attorney Uchihara Oto (left direction 1-r Kenshi) 6th direction 7th direction θ-1 wisdom-Murasaki 8th figure 7th

Claims (1)

[Claims] N bits, of which M bits (0≦M≦N-1)
means for generating mask information having mask data;
means for receiving the mask information and the N-bit display data read from the display memory and outputting display data of bits corresponding to the bits of the mask information that do not have the mask data; An image processing apparatus comprising means for detecting logical information and generating bit position information related to bits having predetermined logical information.