JP3037019B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device having an electrode structure having two or more layers.

[0002]

2. Description of the Related Art Semiconductor devices (hereinafter referred to as "LSI") have various structures according to their functions. However, such as an analog circuit LSI having a large number of capacitive elements (hereinafter referred to as "capacitors") and an analog / digital mixed LSI. LSI with a two-layer electrode structure for forming a capacitor (LSI with a dielectric film sandwiched between a first-layer electrode and a second-layer electrode with a capacitor) or for similar purposes Many LSIs having a two-layer or three-layer electrode structure have been developed and commercialized. DRAM, SRAM, UVPROM, EP
The ROM and the like are typical examples.

An L having such an electrode structure of two or more layers
In SI, the lower electrode is mainly used for forming a capacitor, and the uppermost electrode is sometimes used as an upper electrode plate of a capacitor.
Generally, a gate electrode and a resistance element such as an S transistor are formed. However, with the recent demand for higher density and higher speed of LSI, it is necessary to lower the resistance of the gate electrode itself and to lower the contact resistance between the gate electrode and the metal wiring. (For example, tungsten) has come to be used. Since it is difficult to form the above-described resistance element with such a low-resistance material, the resistance element is formed by using a lower-layer electrode that can be formed of a high-resistance material, and such a structure will be used in the future. Increasingly mainstream.

[0004] Therefore, referring to FIG.
A conventional general manufacturing method for forming a resistive element with the electrode of the first layer of the two layers will be described by taking SI as an example.
FIG. 1 is a cross-sectional view showing a conventional method of manufacturing a semiconductor device. For convenience of explanation, a cross-sectional portion where one resistor element and one capacitor are adjacent is extracted and shown. First, as shown in FIG. 3A, an insulating film 2 is formed on the surface side of the semiconductor substrate 1.
Then, a desired resistance element 4 and a lower electrode (one electrode) 3 of a capacitor are formed by using a first layer of electrode material by photolithography. Next, as shown in FIG. 3B, the surface of the resistance element 4, the capacitor electrode 3, and the surface of the semiconductor substrate 1 are oxidized to form an insulating film 2. Next, an insulating dielectric film 8 of a material different from that of the insulating film 2 is formed above the resistive element 4 and the capacitor electrode 3 by using photolithography. After that, as shown in FIG.
After forming a film, using photolithography technology
A desired capacitor upper electrode 7 is formed as shown in FIG. After that, after forming an interlayer insulating film and metal wiring,
A circuit is configured as the SI, and the manufacture is completed, but the description of that part is omitted.

[0005]

In this conventional manufacturing method, the first electrode material is formed in the dry etching step in the photolithography step of patterning the second layer electrode material. There is a problem that the resistive element portion which has been damaged is damaged. In other words, in this dry etching step, the resistive element portion below is slightly etched by over-etching (etching to prevent etching residue) when unnecessary portions of the second layer electrode material are removed by etching. As a result, there is a problem that the cross-sectional area of the resistance element portion decreases and the resistance value increases.
Particularly, in recent years, with the increase in the density and performance of LSIs, the precision of the resistance value of the resistive element is strictly required, and an increase in the resistance value due to such damage results in a significant decrease in yield and performance degradation. . For this reason, the above-mentioned dry etching step
There is a problem that the production margin is very small, strict management is required, and the yield and the performance are deteriorated at a certain probability due to variations in the production.

An object of the present invention has been made in view of such a problem, and an element such as a resistance element formed of a lower electrode material may be damaged by dry etching of an upper electrode material. It is an object of the present invention to provide a method of manufacturing a semiconductor device which is not affected by the problem.

[0007]

According to the method of manufacturing a semiconductor device of the present invention, in a manufacturing process for forming a multi-layered electrode having two or more layers, after forming one layer of electrode , an insulating film is formed on the surface of the electrode.
And an insulating dielectric film different from this insulating film are sequentially formed, and protection is required at the time of forming the next upper electrode to be formed.
Configured as characterized by performing the formation of the upper electrode after a protective film on the Mino surface side of the electrode portions requiring protection of the layers.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1 is a cross-sectional view illustrating a method of manufacturing a semiconductor device having a two-layer electrode structure according to an embodiment of the present invention in the order of steps, in which one resistive element and one capacitor are adjacent to each other for convenience of explanation. The cross-sectional portion of the portion to be performed is extracted and shown.

First, as shown in FIG.
Through an insulating film 2 such as a silicon oxide film
The lower electrode 3 and the resistive element 4 of the capacitor are formed from the first layer electrode material by using the photolithography technique. The first-layer electrode material is made of polycrystalline silicon having a relatively high resistance and a thickness of 200 to 300 nm. Next, as shown in FIG. 1B, the surfaces of the resistance element 4 and the capacitor electrode 3 and the surface of the semiconductor substrate are oxidized to a thickness of 10 to 15 nm to form an insulating film, and the resistance element 4 and the capacitor electrode 3 are formed. Above, an insulating dielectric film 8 of a material different from that of the insulating film 2 is formed. The material of the insulating dielectric film 8 is a silicon nitride film (Si ₃ N ₄ ).
This is achieved by forming a film with a thickness of 20 to 30 nm by a method, and then dry-etching a film other than a desired region using a photolithography technique.

Next, as shown in FIG. 1C, a protective film 5 of the present invention is formed so as to cover the entire resistive element 4. The material of the protective film 5 is a silicon oxide film (SiO ₂ ), which is formed by a CVD method, and the thickness thereof is optional depending on the conditions when dry-etching the second-layer electrode material described later. Can be set to 50 nm in this embodiment. Then, a photolithography technique is used as the formation method, and the etching is performed by wet etching using buffered diffusion. This is because the silicon oxide film is etched by the buffered diffusion etching, but the silicon nitride film is hardly etched. Therefore, the reduction in the thickness of the insulating dielectric film 8 due to the etching is suppressed to a negligible level. There is an advantage that it can be.

After the resistance element 4 is protected by the protective film 5 as described above, a second layer of electrode material is formed as shown in FIG. 1D, and the upper electrode 7 of the capacitor is formed by photolithography. To form The electrode material of the second layer is made of a tungsten-based metal which is a material having a relatively low resistance of 300.
A film is formed with a thickness of about 400 nm, and an unnecessary portion is removed by dry etching. At the time of this dry etching, damage due to over-etching of the resistance element 4 has conventionally been a problem as described above. However, in this embodiment, since the protective film 5 of the present invention is provided, the over-etching is performed. The resistance element 4 itself is not damaged by being held in the protective film.

When the above etching is completed, the photoresist used as an etching mask is removed, and then the entire surface is wet-etched with buffered hydrofluoric acid to simultaneously remove the protective film 5 and the insulating film 2 other than the element region. Then, the structure shown in FIG.

Thereafter, a desired LSI is completed by an ordinary LSI manufacturing technique through formation of an interlayer film, metal wiring, and the like. However, the description of this portion is not particularly necessary for explaining the present invention, so that it is not necessary. , Is omitted here.

In this embodiment, a resistance element is taken up as an example of an element formed of an electrode material in the first layer. Needless to say, all other elements, for example, M
Needless to say, the present invention can be applied to a gate electrode of an OS transistor and the like.

Next, the effect of the present invention will be specifically described with reference to FIG. FIG. 2 shows that in the manufacturing method of the present invention and the conventional manufacturing method, when the amount of over-etching when dry-etching the electrode material of the second layer is varied from 0% to 15%, the electrode material of the first layer is used. R / R ₀ including how the resistance value (R) of the formed resistance element changes with respect to the resistance value (R ₀ ) of the design of the resistance element, including variations.
It is shown by. As is apparent from the above, in the case of the conventional structure, as the over-etching amount increases, the damage to the resistance element increases, so that the resistance value increases, R / R ₀ increases, and the variation also increases. However, when applying the manufacturing method of the configuration of the present invention,
Within the range of over-etching of 0 to 15% in which the experiment was performed, no increase in the resistance value and no increase in the variation were recognized, indicating that the effect was remarkable.

One of the features of the manufacturing method of the present invention is that
There is a point that the protective film is completely removed after the etching of the upper electrode material is completed (FIG. 1E). The reason for removing this is that if the protection film is left as it is, the parasitic capacitance generated between the protection film and the resistance element or the like must be considered. Therefore, in the case of a newly developed LSI, there is no problem if it is designed in consideration of its parasitic capacitance. However, the above-mentioned parasitic capacitance is not applied to an existing LSI already in mass production.
There may be a slight performance deviation. However, according to the manufacturing method of the present invention, after the protective film has achieved its main purpose, it is completely eliminated, so there is no need to consider the parasitic capacitance as described above, and thus the protective film has already been mass-produced. There is a great effect that it can be immediately applied to existing LSIs already developed and designed.

[0017]

As described above, according to the present invention, since a protective film for protecting elements such as resistors formed by a lower electrode material is provided, these resistive elements and the like can dry an upper electrode material. Damage due to over-etching during etching is eliminated, and the conventional etching margin was narrow and management was troublesome.
In order to solve the problem of performance degradation, there is an effect that the etching margin is remarkably widened, and there is no performance degradation such as yield reduction and resistance value variation.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a semiconductor device shown in the order of steps for explaining one embodiment of the present invention.

FIG. 2 is a diagram illustrating a relationship between an over-etching amount and a change in resistance value for explaining the effect of the present invention.

FIG. 3 is a cross-sectional view of a semiconductor device shown in the order of steps for describing a conventional method of manufacturing a semiconductor device.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 semiconductor substrate 2 insulating film 3 capacitor lower electrode 4 resistive element 5 protective film 6 second layer electrode material 7 capacitor upper electrode 8 insulating dielectric film 9 second layer electrode material

Continued on the front page (51) Int.Cl. ⁷ identification code FI H01L 29/40 (58) Investigated field (Int.Cl. ⁷ , DB name) H01L 27/04 H01L 21/3065 H01L 21/822 H01L 23 / 29 H01L 23/31 H01L 29/40

Claims (2)

(57) [Claims] In a manufacturing process for forming an electrode of a semiconductor device having a multi-layered electrode structure of two or more layers, after an electrode of one layer is formed, an insulating film and a material different from the insulating film are formed on the surface of the electrode.
An insulating dielectric layer is sequentially formed, the electrode portions requiring protection of the layers already formed during the formation of the upper electrode is formed next Mino
After providing a protective film on the surface of the dielectric film, the upper electrode
The method of manufacturing a semiconductor device, characterized in that performing the formation. 2. The method according to claim 1, wherein the protection film is completely removed after the formation of the upper electrode is completed.