JP2812275B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of forming a gate electrode of a MOS transistor.

[0002]

2. Description of the Related Art FIG. 3 shows LOCOS as an element isolation technique.
FIG. 4 is a diagram illustrating a manufacturing process of a semiconductor device using a (Local Oxidation of Silicon) method. Conventionally, in a semiconductor device of this type, first, as shown in FIG.
After a LOCOS oxide film 2 and a gate oxide film 3 are formed thereon, as shown in FIG. 3B, a polysilicon film 4 is grown on the entire surface of the wafer by a CVD method.
Then, a photoresist film 5 is spin-coated on the entire surface of the wafer as shown in FIG.

Next, as shown in FIG. 3D, the photoresist film 5 is exposed using photolithography technology.
Development is performed, and the photoresist film 5 is left only in the portion where the gate electrode is to be formed. Then, as shown in FIG. 3E, the polysilicon film 4 is etched using anisotropic plasma etching using the remaining photoresist film 5 as an etching mask material to form a gate electrode 6. After that, the photoresist film 5 is removed, whereby FIG.
The gate electrode 6 as shown in FIG.

[0004]

However, in the above-described conventional method for manufacturing a semiconductor device, the following problem has occurred when processing the gate electrode. That is, as shown in FIG. 4, the upper surface of the polysilicon film 4 is not flat due to the step of the LOCOS oxide film 2. Further, since the photoresist film 5 is a coating film, the thickness of the photoresist film 5 on the polysilicon film 4 is not uniform, and the adjacent L
The LOCOS oxide films 2 whose photoresist film thicknesses are adjacent are such that the thickness of the LOCOS oxide film 2 becomes thicker at a portion where the distance between the OCOS oxide films 2 is narrow, and becomes thinner at a portion where the distance between the OCOS oxide films 2 is wide.
It depended on the distance between each other.

FIG. 6 is a diagram showing the relationship between the thickness of a photoresist film and the gate length when a gate electrode is processed for a fixed exposure time. As shown in FIG. 6, when viewed as a whole,
As the photoresist film thickness increases, the gate length increases, but in part, light during exposure is scattered in the photoresist film and reflected at the interface with the polysilicon film.
The gate length changes like a standing wave due to the mutual interference between the incident light and the reflected light.

Therefore, for example, in FIG. 4, the film thickness at a place where the distance between adjacent LOCOS oxide films 2 is small is t1 and the film thickness at a wide place is t2 (t1> t2).
Considering the case where the film thicknesses t1 and t2 are the peaks and valleys of the standing wave in FIG. 6, even if the gate length on the photomask is the same, it is caused by the distance between adjacent LOCOS oxide films 2. As a result, the photoresist thicknesses t1 and t2 change, and as a result, as shown in FIG. 5, the actual gate lengths change as L1 and L2 (L1> L2), respectively.

The difference between L1 and L2 mainly depends on the wavelength of the light source used at the time of exposure and the refractive index of the photoresist, but under the conditions generally used at present, this difference is about 0.1 μm. For example, in a submicron device having a gate length of 0.5 μm or less, this difference is equal to the gate length of 2 μm.
It will account for more than 0%. Then, the influence on the transistor threshold voltage, on-state current, punch-through withstand voltage, and the like becomes large, and a malfunction occurs in an integrated circuit due to a difference between a design value and an actual transistor characteristic, and the product life is shortened. was there.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems. Even when MOS transistors are formed at different positions on a substrate at different intervals between step portions, variations in the gate lengths of the transistors are reduced. It is an object to provide a method for manufacturing a semiconductor device which can be reduced.

[0009]

In order to achieve the above object, a method for manufacturing a semiconductor device according to the present invention comprises a step on a substrate.
Semiconductor device in which a step is formed and the gap between the steps is different
A step of depositing a gate electrode film on the entire surface of the substrate, and forming an insulating film having a large etching selectivity with respect to the gate electrode film on the gate electrode film, wherein the insulating film is formed along the step portion. Depositing an insulating film by filling the concave portion of the electrode film so that the lowest portion of the insulating film is at least as thick as the highest portion of the gate electrode film; flattening the upper surface of the insulating film; And a step of patterning the gate electrode film using the photoresist film formed thereon. Also book
The method of manufacturing a semiconductor device according to the present invention includes the steps of:
Depositing a film, and forming the gate on the gate electrode film.
An insulating film having a large etching selectivity to the electrode film is
An insulating film formed along the step portion of the gate electrode film;
Filling the recesses, the lowest part of the insulating film is at least
Thickness that is higher than the highest part of the gate electrode film
And depositing the insulating film, and planarizing the upper surface of the insulating film.
Leaving an insulating film on the entire board; and forming a film formed on the insulating film.
Patterning the gate electrode film using a photoresist film;
Characterized in that it has a step of performing

Further, as a method of patterning the gate electrode film, after etching the insulating film using the photoresist film as a mask, the photoresist film is removed, and the gate electrode film is etched using the remaining insulating film as a mask. The etching may be performed, or the insulating film and the gate electrode film may be continuously etched using the photoresist film as a mask.

According to the method of manufacturing a semiconductor device of the present invention,
An insulating film is deposited on the gate electrode film, and the upper surface of the insulating film is planarized, so that when a photoresist for processing a gate electrode is applied on the insulating film, a step portion is formed over the entire surface of the substrate. Irrespective of the presence or absence of the photoresist, the thickness of the photoresist becomes uniform, so that the standing wave effect is suppressed, thereby reducing the variation in the gate length.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to FIGS. FIG. 1 is a diagram showing a manufacturing process of a semiconductor device using a LOCOS method as an element isolation technique. First, as shown in FIG. 1A, after a LOCOS oxide film 2 and a gate oxide film 3 are formed on a silicon substrate 1, a polysilicon film 4 (gate electrode film) serving as a gate electrode is formed on the entire surface of the wafer by a CVD method. And doped with impurities such as phosphorus to reduce the electric resistance.

Next, as shown in FIG.
A plasma oxide film 7 (insulating film) having a thickness of about m is grown on the entire surface of the wafer. At this time, the plasma oxide film 7 is
The concave portion of the polysilicon film 4 along the step formed by the S oxide film 2 is completely filled, and the lowest portion of the plasma oxide film 7 is (L
The state is higher than the highest portion of the polysilicon film 4 (on the OCOS oxide film 2). Thereafter, as shown in FIG. 1C, the entire surface of the wafer is subjected to CMP (Chemical Mechanical Po
Polishing by the lish) method, and polishing about 50 to 60% (1.0 to 1.2 μm) of the initial film thickness of the plasma oxide film 7.
As a result, the upper surface of the plasma oxide film 7 becomes a flat surface.

Then, as shown in FIG. 1D, a photoresist film 5 is spin-coated on the entire surface of the wafer. Then
Exposure and development of the wafer are performed by photolithography, and patterning is performed so that the photoresist film 5 is left in a portion where a gate electrode is to be formed. Thereafter, by performing anisotropic plasma etching using the photoresist film 5 as an etching mask material, the plasma oxide film 7 is etched as shown in FIG. On this occasion,
Since the etching selectivity between the plasma oxide film 7 and the polysilicon film 4 is large, the polysilicon film 4 is hardly etched.

Next, after removing the photoresist film 5,
By performing anisotropic plasma etching using the remaining plasma oxide film 7 as a mask material for etching, FIG.
As shown in (f), the polysilicon film 4 is etched to form a gate electrode 6. Finally, when the plasma oxide film 7 used as the mask material is removed by isotropic etching such as wet etching, the gate electrode 6 shown in FIG. 1G is formed. Thereafter, a MOS transistor is completed by forming source and drain diffusion layers.

According to the method of manufacturing the semiconductor device of the present embodiment, when the photoresist film 5 is spin-coated, the surface of the plasma oxide film 7 as the base is flattened by the CMP method. As shown in FIG. 2, the thickness t of the formed photoresist film 5 becomes uniform irrespective of the distance between the LOCOS oxide films 2. Then, the photoresist film thickness t
Is uniform and is not affected by the above-described standing wave during exposure, so that the photoresist pattern is formed with a gate length substantially equal to the dimensions of the photomask, and variations in the gate length can be suppressed to less than half the conventional values. Therefore, since the actual characteristics of the transistor, such as the threshold voltage, the on-state current, and the punch-through withstand voltage, can be obtained almost as designed, the conventional problems such as malfunctioning of the integrated circuit and shortening of the product life are obtained. Can be solved.

The technical scope of the present invention is not limited to the above embodiment, and various changes can be made without departing from the spirit of the present invention. For example, in the present embodiment, when the polysilicon film 4 is patterned, after the plasma oxide film 7 is once patterned, the photoresist film 5 is removed, and the polysilicon film 4 is etched using the pattern of the plasma oxide film 7 as a mask. However, instead of this method, the etching of the plasma oxide film and the polysilicon film may be performed continuously using the photoresist pattern formed on the plasma oxide film as a mask.

As the insulating film provided on the polysilicon film, various insulating films other than the plasma oxide film can be used as long as they have a large etching selectivity with respect to the polysilicon film. The means for flattening the insulating film is not limited to the CMP method, but may be, for example, an etch-back method. Further, in this embodiment, the example in which the step portion is formed by the LOCOS oxide film is described. However, the present invention can be applied to the case where the step portion is formed on the substrate by various structures.

[0019]

As described in detail above, according to the method of manufacturing a semiconductor device of the present invention, when a photoresist film for processing a gate electrode is applied, the upper surface of an insulating film as a base is flattened. Therefore, the thickness of the formed photoresist film becomes uniform on the substrate regardless of the presence or absence of the step portion, and the pattern becomes a gate length almost according to the photomask dimension, and the variation is less than half of the conventional one. . Therefore, the threshold voltage, ON current, punch-through withstand voltage, etc.
Since the actual characteristics of the transistor are almost as designed, the conventional problems such as malfunction of the integrated circuit and shortened product life can be solved.

[Brief description of the drawings]

FIG. 1 is a longitudinal sectional view sequentially showing a method of manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a longitudinal sectional view of a semiconductor device obtained by the same method.

FIG. 3 is a longitudinal sectional view sequentially showing a conventional method of manufacturing a general semiconductor device.

FIG. 4 is a longitudinal sectional view showing a state at the time of applying a photoresist in the same method.

FIG. 5 is a longitudinal sectional view showing a state at the time of processing a gate electrode in the same method.

FIG. 6 is a longitudinal sectional view showing a relationship between a photoresist film thickness and a gate length.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 silicon substrate 2 LOCOS oxide film 3 gate oxide film 4 polysilicon film 5 photoresist film 6 gate electrode 7 plasma oxide film (insulating film)

Claims (4)

(57) [Claims] A step is formed on a substrate, and the step is formed on the substrate .
In the method for manufacturing a semiconductor device having different intervals, a step of depositing a gate electrode film over the entire surface of the substrate; and forming an insulating film having a large etching selectivity with respect to the gate electrode film on the gate electrode film. Depositing a concave portion of the gate electrode film formed along a step portion so as to deposit a film having a thickness such that a lowest portion of the insulating film is at least higher than a highest portion of the gate electrode film; A method of manufacturing a semiconductor device, comprising: flattening an upper surface of a semiconductor device; and patterning the gate electrode film using a photoresist film formed on the insulating film. 2. A semiconductor device having a step on a substrate.
A gate electrode film deposited on the entire surface of the substrate.
And the process of Etching on the gate electrode film on the gate electrode film
An insulating film having a large selectivity is formed along the step.
Filling the recesses of the gate electrode film caused by the
The lowest part is at least the highest of the gate electrode film.
Depositing the film by a thickness that is higher than the portion, Work to flatten the upper surface of the insulating film and leave the insulating film on the entire substrate
About Using the photoresist film formed on the insulating film,
Having a step of patterning a gate electrode film.
Manufacturing method of a semiconductor device. 3. The semiconductor according to claim 1 or claim 2.
In the method of manufacturing the device, When patterning the gate electrode film, the photo
The insulating film was etched using the resist film as a mask
Thereafter, the photoresist film is removed, and the remaining insulating film is masked.
Etching the gate electrode film as a mask.
A method for manufacturing a semiconductor device. 4. The semiconductor according to claim 1 or claim 2.
In the method of manufacturing the device, When patterning the gate electrode film, the photo
The insulating film and the gate using a resist film as a mask
Performing etching of the electrode film; Conductor device
Manufacturing method.