JP3012091B2 - Seal ring and manufacturing method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a seal ring as a component of a semiconductor package, and can be suitably used particularly for mass-produced products such as quartz products and SA filter packages.

[0002]

2. Description of the Related Art Among types of semiconductor packages, there is a type in which sealing is performed using a seal ring. As shown in FIG. 2, a semiconductor package of this type has a cavity 23 in which a semiconductor element (not shown) is mounted substantially at the center.
Is formed, and a metallized pattern 24 formed in a frame shape on a peripheral wall surrounding the cavity 23 is formed.
A seal ring 26 having one main surface joined to the metallized pattern 24 by Ag solder 25 or the like, and a lid (not shown) welded to the other main surface of the seal ring 26 after mounting the semiconductor element. In addition, a metal lead is bonded to a side surface of the insulating base 22 as necessary.

[0003] In this type of semiconductor package, welding as a means for hermetically sealing the semiconductor element after it is mounted, heat is applied only to the vicinity of the welded portion, so that there is little thermal effect on the semiconductor element during sealing. . In this respect, the sealing means is more suitable for a semiconductor device which is particularly vulnerable to heat than a means for sealing the whole semiconductor package while heating the whole semiconductor package using low-melting glass or solder.

Heretofore, the seal ring 26 is generally formed by stamping a metal plate such as Kovar or 42Ni. Therefore, burrs 26a are provided in the punching direction on the ridge line portion of one of the main surfaces of the seal ring 26. Such burrs 26a are:
Usually, it is sharp and its thickness is not uniform.
If the principal surface on the side marked with is a welding surface, the welding strength will vary, and there is a risk of injury if touched.

Therefore, conventionally, the main surface on the side where the burr 26a is attached is used as a brazing surface with the insulating base 22 and the burr 26a
The main surface on the side without the mark was the welding surface with the lid.

[0006]

[Problems to be solved by the invention]

However, since the above-mentioned selection of the burr-attached surface has to rely only on visual observation, the seal ring 26 and the insulating base 22 are selected.
It was not possible to automate the joining process, and labor was required.

An object of the present invention is to solve the problems of the prior art and to provide a seal ring which can eliminate the need for burrs and can achieve automation of the process.

[0009]

[Means for Solving the Problems]

[0010] The means is a component of a semiconductor package in which one major surface is brazed to an insulating substrate carrying the semiconductor and the opposite major surface is welded to the lid. A seal ring characterized in that all ridges formed by the side and the side are arc-shaped. It is in.

A preferable means for manufacturing the seal ring is characterized in that a metal plate is punched and then barrel-polished.

Here, the insulating substrate refers to, for example, ceramic, glass, heat-resistant resin and the like. The material of the lid is usually a metal such as Kovar or a 42Ni-Fe alloy,
It is not limited to metal as long as it can be welded.

[0013]

When a metal plate is punched, burrs are generated in the direction of the punching die, but the ridge in the opposite direction is originally deformed into an arc shape due to the plasticity of the metal. Therefore,
For example, after punching as described above, the seal ring from which burrs have been removed by barrel polishing has an arc shape on all of the ridge lines, so that either of the principal surfaces can be used as a welding surface and the lid body. Can be welded well. In addition, since all of the principal surfaces have the same surface properties, it is not necessary to select a brazing surface when brazing the insulating base and the seal ring before welding.

When the arc shape of the ridge line portion is approximated to a circular arc, the radius is desirably 50 μ or less, particularly preferably 30 μ or less. The radius of the burrs without burrs at the time of punching is usually 3
This is because it is about 0 μm, and if it exceeds 50 μm, the bonding area becomes small.

[0015]

FIG. 1 is a vertical sectional view of a semiconductor package using a seal ring according to an embodiment of the present invention. The semiconductor package 11 includes an insulating base 12 in which a cavity 13 for mounting a semiconductor element 18 is formed substantially in the center, a metallized pattern 14 formed in a frame shape on a peripheral wall surrounding the cavity 13, and an Ag soldering metallized pattern 14. A seal ring 16 having one main surface joined by a member 15 or the like, and a lid 17 welded to another main surface of the seal ring 16 after mounting the semiconductor element.

The seal ring 16 has an arc shape having a radius of about 30 μm at both the main surface and the inner or outer surface, but the main surface still has a width of 0.8 μm.
It has a flat part of about mm and secures a bonding area.

The semiconductor element 18 is formed on the insulating base 12.
Is electrically connected to the internal pad 12a by a bonding wire 19, and hermetically sealed by welding the seal ring 16 and the lid 17.

[Manufacturing Method of Semiconductor Package with Seal Ring] To manufacture the seal ring 16, first, it is made of a metal such as Kovar or 42Ni-Fe alloy and has a thickness of 0.25.
mm plate, outer dimensions 7.0 x 4.6 mm, inner dimensions 5.4 x
A 3.0 mm frame is punched out with a metal mold, and this is barrel-polished with an alumina-based or silica-based abrasive. The polishing time was initially 30 minutes, but as a result of the experiment, the burr of the seal ring was removed at a rotation speed of 220 rpm × 5 minutes,
It was found that a radius of about 30 μm was formed at the ridge.

After barrel polishing, the substrate was washed with water, treated with a 2.5% hydrochloric acid aqueous solution for 10 minutes, and subjected to a chemical polishing treatment with a solution containing 25% of a hydrogen peroxide-based abrasive having a particle size of 5 to 7 μm. This chemical polishing process is a process for removing the barrel polishing agent attached to the seal ring. Next, the mixture was treated with a 2% aqueous hydrochloric acid solution for 30 seconds, neutralized with a 2% aqueous sodium bicarbonate solution for 30 seconds, washed with warm water, and dried. Then, the seal ring 16 before joining was manufactured by performing Ni plating.

On the other hand, the insulating substrate 12 is formed by punching out a ceramic green sheet mainly composed of alumina, mullite, aluminum nitride or the like, printing metallized ink such as W or Mo to form internal wiring, and forming a predetermined shape. After cutting, three layers were laminated, baked at a high temperature, and Ni-plated on the metallized portion exposed on the surface, thereby producing the device.

The plated portion exposed on the uppermost layer surface of the insulating substrate 12 having the three-layer structure is a metallized pattern 14 for joining the seal ring 16, and is located between the uppermost layer and the intermediate layer toward the cavity 13. The exposed plating part is the pad 12a.

The seal ring 16 and the insulating base 12 are formed on a metallized pattern 14 of the insulating base 12 by an Ag solder 15.
Was placed on the foil, and a heat treatment at 800 ° C. was performed with the seal ring 16 placed on the foil, thereby performing brazing. Thereafter, the semiconductor element mounting step and the wire bonding step are omitted, the Kovar lid 17 is further placed on the seal ring 16, and the seal ring 16 and the lid 17 are seam-welded to form the semiconductor package 11 (however, , The semiconductor element is not housed).

In the above manufacturing process, when the seal ring 16 is placed on the Ag solder 15, the main surface on the side where burrs did not occur was joined with 100 pieces that were joined with the main surface on the side where burrs occurred on the bottom. When a total of 200 semiconductor packages 11 were manufactured by distinguishing from the 100 semiconductor packages 11 bonded together, and the airtightness and the bonding strength were evaluated, no difference was observed between the two.

[0024]

As described above, since it is not necessary to select both the front and back main surfaces of the seal ring in the seal ring joining step, this step can be automated, and the man-hour can be reduced.
It can be reduced to 10 or less. Further, since the ridge of the seal ring has an arc shape, no injury is caused even when touched by hand.

[Brief description of the drawings]

FIG. 1 is a longitudinal sectional view of a semiconductor package using a seal ring according to an embodiment of the present invention.

FIG. 2 is a longitudinal sectional view of a semiconductor package using a conventional seal ring.

[Explanation of symbols]

 11, 21 Semiconductor package 12, 22 Insulating substrate 13, 23 Cavity 14, 24 Metallized pattern 15, 25 Ag solder 16, 26 Seal ring 17, 27 Lid

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 23/02

Claims (2)

(57) [Claims] 1. A component of a semiconductor package, wherein one main surface is brazed to an insulating base on which a semiconductor is mounted, and the other main surface is welded to a lid, wherein the main surface and the side surface are welded. A seal ring characterized in that all of the ridges formed by are formed in an arc shape. 2. The method for manufacturing a seal ring according to claim 1, wherein after the metal plate is punched, barrel polishing is performed.