JP2992873B2 - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JP2992873B2
JP2992873B2 JP35474195A JP35474195A JP2992873B2 JP 2992873 B2 JP2992873 B2 JP 2992873B2 JP 35474195 A JP35474195 A JP 35474195A JP 35474195 A JP35474195 A JP 35474195A JP 2992873 B2 JP2992873 B2 JP 2992873B2
Authority
JP
Japan
Prior art keywords
pedestal
semiconductor device
main surface
support
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP35474195A
Other languages
Japanese (ja)
Other versions
JPH09181229A (en
Inventor
久夫 冨沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Sanken Electric Co Ltd
Original Assignee
Mitsubishi Electric Corp
Sanken Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp, Sanken Electric Co Ltd filed Critical Mitsubishi Electric Corp
Priority to JP35474195A priority Critical patent/JP2992873B2/en
Priority to US08/777,944 priority patent/US5917245A/en
Priority to GB9626677A priority patent/GB2308736B/en
Priority to FR9615959A priority patent/FR2742925B1/en
Priority to KR1019960072417A priority patent/KR100239128B1/en
Priority claimed from AU23707/97A external-priority patent/AU722964B2/en
Priority to DE19724909A priority patent/DE19724909A1/en
Publication of JPH09181229A publication Critical patent/JPH09181229A/en
Priority to US09/162,003 priority patent/US5998239A/en
Application granted granted Critical
Publication of JP2992873B2 publication Critical patent/JP2992873B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/10155—Shape being other than a cuboid
    • H01L2924/10158—Shape being other than a cuboid at the passive surface
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0364—Conductor shape
    • H05K2201/0373—Conductors having a fine structure, e.g. providing a plurality of contact points with a structured tool
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/06—Thermal details
    • H05K2201/066—Heatsink mounted on the surface of the printed circuit board [PCB]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10568—Integral adaptations of a component or an auxiliary PCB for mounting, e.g. integral spacer element
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10742—Details of leads
    • H05K2201/1075—Shape details
    • H05K2201/10757—Bent leads
    • H05K2201/10772—Leads of a surface mounted component bent for providing a gap between the lead and the pad during soldering
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954—Other details of electrical connections
    • H05K2201/10969—Metallic case or integral heatsink of component electrically connected to a pad on PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1178—Means for venting or for letting gases escape
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【産業上の利用分野】本発明は、半導体装置に関し、詳
細には半導体素子が台座を介して回路基板等の支持体に
固着された半導体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device having a semiconductor element fixed to a support such as a circuit board via a base.

【０００２】[0002]

【従来の技術】回路基板の一方の主面に銅等で形成され
た台座を介して半導体素子を固着した構造の半導体装置
は公知である。この構造の半導体装置によれば、半導体
素子から発生する熱を台座によって外部に良好に放出す
ることができるため、台座を設けない構造とした場合に
比べて半導体素子の電流容量を大きくとれる利点があ
る。2. Description of the Related Art A semiconductor device having a structure in which a semiconductor element is fixed to one main surface of a circuit board via a pedestal made of copper or the like is known. According to the semiconductor device having this structure, since the heat generated from the semiconductor element can be satisfactorily released to the outside by the pedestal, there is an advantage that the current capacity of the semiconductor element can be increased as compared with a structure without the pedestal. is there.

【０００３】[0003]

【発明が解決しようとする課題】ところが、従来の半導
体装置では、台座の回路基板に対するろう付け面が平坦
であったため、台座が回路基板に傾斜してろう付けされ
ることがあった。このため、ろう材の厚みをろう付け面
の全体にわたって均一にすることが困難であった。ま
た、このような傾斜が生じない場合であっても、半導体
装置間におけるばらつきを抑えてろう材層を所定の厚み
に形成することは困難であった。However, in the conventional semiconductor device, since the brazing surface of the pedestal to the circuit board is flat, the pedestal may be brazed to the circuit board at an angle. For this reason, it has been difficult to make the thickness of the brazing material uniform over the entire brazing surface. Further, even when such an inclination does not occur, it has been difficult to form a brazing material layer to a predetermined thickness while suppressing variations between semiconductor devices.

【０００４】このような台座の傾斜やろう材層の厚さ不
均一・厚さ不足は、半導体装置の製造工程上支障をもた
らすばかりでなく特性不良の原因ともなる。即ち、台座
が傾斜してろう付けされると、台座への半導体素子のダ
イボンディングや半導体素子へのワイヤボンディングが
良好に行えず、接続不良等を引き起こす原因となる。ま
た、ろう材層の厚さが不均一であったり、厚さが不足し
ていると熱疲労試験で特性不良が生じる場合がある。つ
まり、厳しい温度条件下での使用に耐えないこととな
る。[0004] Such inclination of the pedestal and unevenness / insufficient thickness of the brazing material layer not only hinders the manufacturing process of the semiconductor device but also causes poor characteristics. That is, if the pedestal is brazed at an angle, the die bonding of the semiconductor element to the pedestal and the wire bonding to the semiconductor element cannot be performed satisfactorily, which causes a connection failure or the like. In addition, if the thickness of the brazing material layer is not uniform or the thickness is insufficient, poor properties may occur in a thermal fatigue test. That is, it cannot be used under severe temperature conditions.

【０００５】そこで、本発明は、このような台座の傾斜
やろう材の厚さ不均一・不足が防止され、厳しい温度条
件下の使用でも特性不良が生ぜず、生産歩留りも向上す
る半導体装置を提供することを目的とする。Accordingly, the present invention provides a semiconductor device which prevents such inclination of the pedestal and unevenness / insufficiency of the thickness of the brazing material, does not cause poor characteristics even when used under severe temperature conditions, and improves the production yield. The purpose is to provide.

【０００６】[0006]

【課題を解決するための手段】上記目的を達成するため
の本発明は、実施例を示す図面の符号を参照して説明す
ると、支持体１と、該支持体１の一方の主面にろう材９
によって固着された台座２と、前記支持体１の一方の主
面に前記台座２を介して固着された半導体素子３とを備
え、前記台座２の前記支持体１に固着される主面にはそ
の外縁部分に前記支持体１の一方の主面から離間する方
向に向って末広がりに傾斜する傾斜部８と前記傾斜部８
よりも内側で前記支持体１の一方の主面側に突出して前
記支持体１の一方の主面に当接する脚部７が形成されて
おり、前記ろう材９が前記台座２と前記支持体１とが対
向する領域を充填するとともに前記傾斜部８を被覆して
いることを特徴とする半導体装置に係わるものである。
なお、請求項２に示すように、脚部を互いに離間した複
数の柱状部分から構成すると望ましい。また、請求項３
に示すように、脚部は互いに離間した複数の帯状部分と
することもできる。The present invention for attaining the above object will be described with reference to the reference numerals in the drawings showing the embodiments, in which a support 1 and one main surface of the support 1 are provided. Lumber 9
And a semiconductor element 3 fixed to one main surface of the support 1 via the pedestal 2. The main surface of the pedestal 2 fixed to the support 1 has At its outer edge, a slope 8 and a slope 8 which are divergently inclined in a direction away from one main surface of the support 1.
A leg 7 is formed on the inner side of the support 1 so as to protrude toward one main surface of the support 1 and abut on one main surface of the support 1, and the brazing material 9 is formed between the pedestal 2 and the support The semiconductor device according to the present invention relates to a semiconductor device characterized in that a region facing the semiconductor device 1 is filled and the inclined portion 8 is covered.
It is desirable that the leg portion is constituted by a plurality of columnar portions which are separated from each other. Claim 3
As shown, the legs may be a plurality of strips spaced apart from each other.

【０００７】[0007]

【発明の作用効果】各請求項の発明によれば、台座に形
成された脚部が支持体に当接してストッパ部として機能
するので、台座の傾斜が防止されるとともにろう材層の
厚みを均一且つ所定の厚みに確保することができる。ま
た、台座部の外縁部分に形成された傾斜部にもろう材が
被覆されるので台座部と支持体とのろう付けが強固に達
成され、厳しい温度条件下で使用しても台座が支持体か
ら剥離等することがない。結果として、特性不良が生じ
難く且つ生産歩留りが向上した半導体装置が得られる。
なお、請求項２、３の発明によれば、脚部が互いに離間
した複数の部分から成るので、傾斜防止が完全に達成さ
れるとともに、ろう付け時に発生したガスが外部に良好
に放出されるため、ろう材層内に気泡が生じ難く、ろう
付け強度を大きく確保等するうえで有利である。According to the present invention, the legs formed on the pedestal abut against the support and function as stoppers, so that the pedestal is prevented from tilting and the thickness of the brazing material layer is reduced. A uniform and predetermined thickness can be ensured. In addition, since the brazing material is also coated on the inclined portion formed on the outer edge portion of the pedestal portion, brazing between the pedestal portion and the support is firmly achieved, and the pedestal is supported even under severe temperature conditions. There is no peeling off. As a result, it is possible to obtain a semiconductor device in which characteristic defects hardly occur and the production yield is improved.
According to the second and third aspects of the present invention, since the legs are composed of a plurality of parts separated from each other, the prevention of inclination is completely achieved, and the gas generated during brazing is discharged well to the outside. Therefore, bubbles are less likely to be generated in the brazing material layer, which is advantageous in securing a large brazing strength.

【０００８】[0008]

【第１の実施例】次に、図１乃至図４を参照して本発明
の第１の実施例に係わる半導体装置を説明する。図１の
半導体装置は、Ａｌ２Ｏ３（アルミナ）等から成る回路
基板（支持体）１、Ｃｕ（銅）の母材にＮｉ（ニッケ
ル）とＡｇ（銀）を順次メッキして成る台座２と、Ｓｉ
（シリコン）から成る半導体素子としてのダイオードチ
ップ３とを備える。First Embodiment Next, a semiconductor device according to a first embodiment of the present invention will be described with reference to FIGS. The semiconductor device shown in FIG. 1 includes a circuit board (support) 1 made of Al 2 O 3 (alumina) or the like, a pedestal 2 made by sequentially plating Ni (nickel) and Ag (silver) on a Cu (copper) base material. And Si
A diode chip 3 as a semiconductor element made of (silicon).

【０００９】回路基板１の一方の主面には、ＡｇＰｄ
（銀パラジウム）の導体ペーストを周知のスクリーン印
刷によってパターン形状に形成した後にこれを焼成して
得られた台座固着用の電極（パッド）４とこれに接続さ
れた配線導体５とが設けられている。電極４は、図２に
示すように、台座２と同一の四角形の平面形状を有して
おり、その２つの角部に配線導体５の一端が接続されて
いる。尚、図２において、台座２は破線で示されてい
る。本実施例では、電極４の面積を台座２の面積よりも
若干大きくしている。On one main surface of the circuit board 1, AgPd
An electrode (pad) 4 for fixing the pedestal obtained by forming a conductive paste of (silver palladium) into a pattern shape by well-known screen printing and then firing the same, and a wiring conductor 5 connected thereto are provided. I have. As shown in FIG. 2, the electrode 4 has the same rectangular planar shape as the pedestal 2, and one end of the wiring conductor 5 is connected to the two corners. In FIG. 2, the pedestal 2 is indicated by a broken line. In the present embodiment, the area of the electrode 4 is slightly larger than the area of the pedestal 2.

【００１０】台座２は、図３及び図４に示すように、板
状の本体部６と４つの円柱形状の脚部７から構成されて
いる。本体部６の一方の主面（回路基板１に固着される
主面）には、その外縁に沿って環状に傾斜部８が設けら
れている。この傾斜部８は、本体部６の一方の主面から
他方の主面（ダイオードチップ３が固着される主面）に
向って末広がりとなる傾斜、即ち回路基板１に固着した
ときに回路基板１の一方の主面から離間する方向に向っ
て末広がりとなる傾斜となっている。また、この実施例
では傾斜部８に曲率が設けられている。脚部７は、本体
部６の４つの角部の近傍に配置されており、傾斜部８よ
りも若干内側に位置している。また、４つの脚部７の本
体部６の一方の主面からの高さは等しくなっている。
尚、本体部６の他方の主面には一方の主面のように傾斜
部は設けられていない。As shown in FIGS. 3 and 4, the pedestal 2 is composed of a plate-shaped main body 6 and four cylindrical legs 7. On one main surface (main surface fixed to the circuit board 1) of the main body 6, an inclined portion 8 is provided annularly along the outer edge thereof. The inclined portion 8 is inclined so as to diverge from one main surface of the main body portion 6 to the other main surface (the main surface to which the diode chip 3 is fixed), that is, when the circuit portion 1 is fixed to the circuit board 1. Are inclined toward the direction away from one of the main surfaces. In this embodiment, the inclined portion 8 has a curvature. The legs 7 are arranged near the four corners of the main body 6, and are located slightly inside the inclined portions 8. The heights of the four legs 7 from one main surface of the main body 6 are equal.
It should be noted that the other main surface of the main body 6 is not provided with an inclined portion unlike the one main surface.

【００１１】台座２は、本体部６の一方の主面におい
て、半田（ろう材）９を介して、回路基板１の電極４に
固着されている。このとき、４つの脚部７の主面は電極
４に当接しており、台座本体部６の一方の主面と電極４
の間隔は、一様に脚部７の高さに等しくなっている。台
座２と電極４とを固着する半田９は、台座２と電極４と
が対向する領域を完全に充填し、本体部６の一方の主面
及び脚部７の側面を被覆するとともに傾斜部８も被覆し
ている。また、半田９は電極４のほぼ全面に広がってお
り、その一部は２つの配線導体５の上面にまで達してい
る。この実施例では、上述のように電極４の面積を台座
本体部６よりも大きくしたので、図１に示すように、半
田９は台座２から電極４に向って末広がりに形成されて
いる。The pedestal 2 is fixed to the electrode 4 of the circuit board 1 via a solder (brazing material) 9 on one main surface of the main body 6. At this time, the main surfaces of the four leg portions 7 are in contact with the electrode 4, and one main surface of the pedestal main body portion 6 is connected to the electrode 4.
Are uniformly equal to the height of the leg 7. The solder 9 for fixing the pedestal 2 and the electrode 4 completely fills the region where the pedestal 2 and the electrode 4 face each other, covers one main surface of the main body 6 and the side surface of the leg 7, and includes the inclined portion 8. Is also coated. The solder 9 spreads over almost the entire surface of the electrode 4, and a part of the solder 9 reaches the upper surfaces of the two wiring conductors 5. In this embodiment, since the area of the electrode 4 is larger than that of the pedestal main body 6 as described above, the solder 9 is formed so as to expand from the pedestal 2 toward the electrode 4 as shown in FIG.

【００１２】台座本体部６の他方の主面には、半田１０
を介してダイオードチップ３が固着されている。尚、本
実施例では、この半導体装置を周知のリフロー法で製作
した。即ち、半田９、１０に半田ペーストを使用し、こ
のペーストの粘着力を利用して電極４上に台座２とダイ
オードチップ３を順次重ねて仮固着した組立体を形成
し、この組立体を加熱炉に通して半田ペーストを再溶融
後、これを硬化させて完全に固着する方法である。この
方法によれば、台座２とダイオードチップ３の固着を同
時に行える利点がある。勿論、その他の方法によって製
作することもできる。On the other main surface of the pedestal body 6, solder 10
, The diode chip 3 is fixed. In this example, the semiconductor device was manufactured by a well-known reflow method. That is, a solder paste is used for the solders 9 and 10, and a pedestal 2 and a diode chip 3 are sequentially laminated on the electrode 4 by using the adhesive force of the paste to form a temporarily fixed assembly, and this assembly is heated. This is a method in which the solder paste is passed through a furnace, re-melted, cured, and completely fixed. According to this method, there is an advantage that the pedestal 2 and the diode chip 3 can be simultaneously fixed. Of course, it can also be manufactured by other methods.

【００１３】この実施例の半導体装置によれば、以下の
効果が得られる。 台座本体部６の４つの角部に形成された脚部７が電極
４に当接し、これらがストッパ部（台座２と電極４との
位置決め部）として機能するため、台座２が回路基板１
に対して傾斜して固着されることがない。また、台座２
と電極４との間隔が脚部７の高さに設定されるので、半
田９の厚みを均一に且つ所望の厚さに得ることができ
る。 台座本体部６の傾斜部８にも半田９が被覆されるとと
もに、電極４が台座本体部６よりも大きな面積となって
おり半田９が電極４に向って末広がりに形成されている
ので、台座２と電極４との半田付けを強固に達成でき
る。特に、半田はがれが生じ易い台座本体部６の角部に
対応する電極４には配線導体５が接続されており、みか
け上電極面積が増大しているので、この部分の半田付け
が他の部分よりも厚みを増しておこなえる点においても
有利となっている。 ４つの脚部７が互いに離間した円柱部分（柱状部分）
として形成されているので、半田ペースト中に含まれる
フラックスの揮発等によって生じた気泡を半田９の外部
に容易に排出することができる。このため、半田９にボ
イドが生じることを防止できる。 以上〜によっ
て、特性不良が生じ難く且つ生産歩留りが向上した半導
体装置が実現されている。According to the semiconductor device of this embodiment, the following effects can be obtained. The legs 7 formed at the four corners of the pedestal main body 6 abut against the electrodes 4 and function as stoppers (positioning portions between the pedestal 2 and the electrodes 4).
It is not inclined and fixed. In addition, pedestal 2
Since the distance between the electrode and the electrode 4 is set to the height of the leg 7, the thickness of the solder 9 can be obtained uniformly and at a desired thickness. The solder 9 is also coated on the inclined portion 8 of the pedestal main body 6, and the electrode 4 has a larger area than the pedestal main body 6, and the solder 9 is formed so as to expand toward the electrode 4. 2 and the electrode 4 can be firmly soldered. In particular, the wiring conductors 5 are connected to the electrodes 4 corresponding to the corners of the pedestal main body 6 where solder peeling is likely to occur, and the apparent electrode area is increased. This is also advantageous in that the thickness can be increased more than that. A columnar part (columnar part) with four legs 7 separated from each other
Therefore, air bubbles generated by volatilization of the flux contained in the solder paste can be easily discharged to the outside of the solder 9. Therefore, it is possible to prevent voids from being generated in the solder 9. As described above, a semiconductor device in which characteristic failure hardly occurs and production yield is improved is realized.

【第２の実施例】[Second embodiment]

【００１４】次に図５乃至図７を参照して本発明の第２
の実施例に係わる半導体装置を説明する。この実施例に
係る図５の半導体装置は、その台座１１を除いては図１
の第１の実施例の半導体装置と同様であるので、図１の
半導体装置と同一の箇所には同一の符号を付してその説
明を省略する。Next, a second embodiment of the present invention will be described with reference to FIGS.
The semiconductor device according to the embodiment will be described. The semiconductor device of FIG. 5 according to this embodiment has the same structure as that of FIG.
Since the semiconductor device is the same as that of the first embodiment, the same parts as those of the semiconductor device of FIG.

【００１５】図５の半導体装置では、その台座１１が本
体部６と脚部１２から構成されている点で図１の半導体
装置と同様であるが、その脚部１２が図６及び図７に示
すように、２つの帯状部分から成る点で異なっている。
帯状部分から成る２つの脚部１２は、互いに離間し且つ
台座本体部６の対向する２つの辺よりも内側に形成され
ている。また、脚部１２の断面形状は、図６に示すよう
に三角形状となっている。この実施例の半導体装置にお
いても、２つの帯状の脚部１２がストッパ部として機能
し、第１の実施例の半導体装置と同様の作用効果を得る
ことができる。The semiconductor device of FIG. 5 is similar to the semiconductor device of FIG. 1 in that the pedestal 11 is composed of the main body 6 and the legs 12, but the legs 12 are similar to those of FIGS. As shown, they differ in that they consist of two strips.
The two leg portions 12 each formed of a band-shaped portion are separated from each other and formed inside the two opposing sides of the pedestal main body 6. Further, the cross-sectional shape of the leg portion 12 is triangular as shown in FIG. Also in the semiconductor device of this embodiment, the two band-shaped legs 12 function as stoppers, and the same operation and effect as those of the semiconductor device of the first embodiment can be obtained.

【００１６】[0016]

【変形例】本発明は、上述の実施例に限定されるもので
なく、変形が可能なものである。例えば、脚部７を角柱
形状にしてもよい。但し、気泡の排出の点においては円
柱形状とするのが望ましい。また、帯状脚部１２の断面
形状を台形状等にすることもできる。更に、台座本体部
６の平面形状を円形等にしてもよい。また、配線導体５
を電極４の３〜４つの角部に接続することもできるし、
電極４の角部を辺部よりも若干外側まで延在させて半田
の広がりを増大することもできる。なお、配線導体５を
設けなくても本発明の効果は得られる。[Modifications] The present invention is not limited to the above-described embodiment, but can be modified. For example, the leg 7 may have a prismatic shape. However, in terms of discharging bubbles, it is desirable to use a cylindrical shape. Further, the cross-sectional shape of the band-like leg portion 12 may be trapezoidal or the like. Furthermore, the planar shape of the pedestal main body 6 may be circular or the like. In addition, the wiring conductor 5
Can be connected to three to four corners of the electrode 4,
The corner of the electrode 4 may be extended slightly outside the side to increase the spread of the solder. The effects of the present invention can be obtained without providing the wiring conductor 5.

【図面の簡単な説明】[Brief description of the drawings]

【図１】本発明の第１の実施例の係わる半導体装置を示
す断面図である。FIG. 1 is a sectional view showing a semiconductor device according to a first embodiment of the present invention.

【図２】図１の半導体装置の回路基板を示す平面図であ
る。FIG. 2 is a plan view showing a circuit board of the semiconductor device of FIG. 1;

【図３】図１の半導体装置の台座を示す側面図である。FIG. 3 is a side view showing a pedestal of the semiconductor device of FIG. 1;

【図４】図１の半導体装置の台座を示す平面図である。FIG. 4 is a plan view showing a pedestal of the semiconductor device of FIG. 1;

【図５】本発明の第２の実施例に係わる半導体装置を示
す断面図である。FIG. 5 is a sectional view showing a semiconductor device according to a second embodiment of the present invention.

【図６】図５の半導体装置の台座を示す側面図である。FIG. 6 is a side view showing a pedestal of the semiconductor device of FIG. 5;

【図７】図５の半導体装置の台座を示す平面図である。FIG. 7 is a plan view showing a pedestal of the semiconductor device of FIG. 5;

【符号の説明】[Explanation of symbols]

１ 回路基板 ２，１１ 台座 ３ ダイオードチップ ７，１２ 脚部 ９ 半田 DESCRIPTION OF SYMBOLS 1 Circuit board 2,11 Pedestal 3 Diode chip 7,12 Leg 9 Solder

Claims (3)

(57)【特許請求の範囲】(57) [Claims] 【請求項１】 支持体と、該支持体の一方の主面にろう
材によって固着された台座と、前記支持体の一方の主面
に前記台座を介して固着された半導体素子とを備え、前
記台座の前記支持体に固着される主面にはその外縁部分
に前記支持体の一方の主面から離間する方向に向って末
広がりに傾斜する傾斜部と前記傾斜部よりも内側で前記
支持体の一方の主面側に突出して前記支持体の一方の主
面に当接する脚部が形成されており、前記ろう材が前記
台座と前記支持体とが対向する領域を充填するとともに
前記傾斜部を被覆していることを特徴とする半導体装
置。1. A support, a pedestal fixed to one main surface of the support by a brazing material, and a semiconductor element fixed to one main surface of the support via the pedestal, The main surface of the pedestal fixed to the support body has an outer edge portion having an inclined portion inclined in a divergent manner in a direction away from one main surface of the support, and the support body inside the inclined portion. A leg portion protruding toward one main surface side of the support member and abutting against one main surface of the support is formed, and the brazing filler metal fills a region where the pedestal and the support are opposed to each other and the inclined portion is formed. A semiconductor device, which is coated with: 【請求項２】 前記脚部は、互いに離間した複数の柱状
部分から構成されていることを特徴とする請求項１に記
載の半導体装置。2. The semiconductor device according to claim 1, wherein said leg portion includes a plurality of columnar portions separated from each other. 【請求項３】 前記脚部は、互いに離間した複数の帯状
部分から構成されていることを特徴とする請求項１に記
載の半導体装置。3. The semiconductor device according to claim 1, wherein said leg portion is constituted by a plurality of strip portions separated from each other.
JP35474195A 1995-12-26 1995-12-26 Semiconductor device Expired - Lifetime JP2992873B2 (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP35474195A JP2992873B2 (en) 1995-12-26 1995-12-26 Semiconductor device
US08/777,944 US5917245A (en) 1995-12-26 1996-12-23 Semiconductor device with brazing mount
GB9626677A GB2308736B (en) 1995-12-26 1996-12-23 Semiconductor device and method for manufacture thereof
FR9615959A FR2742925B1 (en) 1995-12-26 1996-12-24 SEMICONDUCTOR DEVICE OF THE TYPE HAVING A FRAME FOR DISCHARGING THE HEAT, AND MANUFACTURING METHOD THEREOF
KR1019960072417A KR100239128B1 (en) 1995-12-26 1996-12-26 Semiconductor device and method for manufacture thereof
DE19724909A DE19724909A1 (en) 1995-12-26 1997-06-12 Semiconductor device with mount for its securing to PCB
US09/162,003 US5998239A (en) 1995-12-26 1998-09-28 Method of manufacturing a semiconductor device with a brazing mount

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP35474195A JP2992873B2 (en) 1995-12-26 1995-12-26 Semiconductor device
AU23707/97A AU722964B2 (en) 1997-05-30 1997-05-30 Semiconductor device and method for manufacture thereof
DE19724909A DE19724909A1 (en) 1995-12-26 1997-06-12 Semiconductor device with mount for its securing to PCB

Publications (2)

Publication Number Publication Date
JPH09181229A JPH09181229A (en) 1997-07-11
JP2992873B2 true JP2992873B2 (en) 1999-12-20

Family

ID=27152821

Family Applications (1)

Application Number Title Priority Date Filing Date
JP35474195A Expired - Lifetime JP2992873B2 (en) 1995-12-26 1995-12-26 Semiconductor device

Country Status (4)

Country Link
JP (1) JP2992873B2 (en)
DE (1) DE19724909A1 (en)
FR (1) FR2742925B1 (en)
GB (1) GB2308736B (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6246587B1 (en) 1998-12-03 2001-06-12 Intermedics Inc. Surface mounted device with grooves on a termination lead and methods of assembly
FR2813442A1 (en) * 2000-08-31 2002-03-01 Valeo Equip Electr Moteur Power diode for use in rectifier bridge of rotary electric machine such as alternator for automobile vehicles
US20050017371A1 (en) * 2003-07-22 2005-01-27 Zhiyong Wang Electronic assembly having a die with rounded corner edge portions and a method of fabricating the same
DE10339487B4 (en) * 2003-08-27 2007-03-15 Infineon Technologies Ag Method for applying a semiconductor chip to a carrier
JP3988735B2 (en) * 2004-03-15 2007-10-10 日立金属株式会社 Semiconductor device and manufacturing method thereof

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Publication number Priority date Publication date Assignee Title
US3434018A (en) * 1966-07-05 1969-03-18 Motorola Inc Heat conductive mounting base for a semiconductor device
US3740617A (en) * 1968-11-20 1973-06-19 Matsushita Electronics Corp Semiconductor structure and method of manufacturing same
JPS58210643A (en) * 1982-06-01 1983-12-07 Mitsubishi Electric Corp Semiconductor device
JPS6272147A (en) * 1985-09-26 1987-04-02 Toshiba Corp Resin-sealed semiconductor device
JPS62283648A (en) * 1986-06-02 1987-12-09 Matsushita Electronics Corp Resin-sealed semiconductor device
US4862247A (en) * 1987-11-24 1989-08-29 Texas Instruments Incorporated Contact joint for semiconductor chip carriers
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JP3426692B2 (en) * 1994-03-30 2003-07-14 三菱電機株式会社 Semiconductor device

Also Published As

Publication number Publication date
FR2742925B1 (en) 1999-03-12
GB2308736A (en) 1997-07-02
DE19724909A1 (en) 1998-12-17
FR2742925A1 (en) 1997-06-27
GB2308736B (en) 2000-06-28
GB9626677D0 (en) 1997-02-12
JPH09181229A (en) 1997-07-11

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