JPH07105460B2 - Semiconductor device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly, to an insulating plate having a metallized pattern suitable for stacking semiconductor elements as heating elements.

[Conventional technology]

Generally, a semiconductor element insulating plate is used for electrical insulation when mounting a semiconductor element on a heat sink (metal base) or the like, and is joined to the metal base plate by brazing such as solder or silver solder. . Such an insulating plate not only performs electrical insulation but also has a role of radiating heat generated in the semiconductor element itself to the metal base plate side, particularly when a heat-generating semiconductor element is mounted. As the insulating plate, an insulating member such as alumina is used.

By the way, mounting semiconductor elements on this kind of insulating plate,
When mounting the insulating plate itself on the metal base plate, soldering or other brazing is used.However, since alumina, etc., which is the insulating plate, is not suitable for brazing, semiconductor elements should be mounted on the front and back surfaces of the insulating plate. A metallized surface for joining and a metallized surface for joining with a metal base plate are provided. A molybdenum, tungsten film or the like is used for the metallized surface.

Further, in a conventional insulating plate of this type, for example, Japanese Patent Laid-Open No. 55-1186.
As disclosed in Japanese Patent Publication No. 41 etc., by providing a plurality of slits on the metallized surface provided on the insulating plate, voids generated during brazing of solder etc. can be escaped from the slits to reduce the voids, Alternatively, the crack occurrence rate at the joints such as solder depends on the difference in the linear expansion coefficient of the members to be joined, and the longer the joints, the greater the strain between the members. Since cracks are likely to occur, as disclosed in, for example, Japanese Patent Laid-Open No. 165656/1988, the backside metallized surface of the insulating plate is arranged directly below the semiconductor element mounted on the front side, and the insulating plate and the metal base are placed. The joint (brazing part) with the plate is concentrated right under the semiconductor element, and thus the metallized surface and thus the length of the joint are made as short as possible to reduce the occurrence of cracks at the joint. Meta under the element In order to keep the other semiconductor element chip mounting surface of the rise surface horizontal, various considerations have been made such as providing a second metallized surface.

[Problems to be solved by the invention]

As described above, conventionally, this kind of insulating plate has various considerations for the metallized pattern, such as forming slits on the metallized surface and making the joint length as short as possible while specifying the position of the metallized surface. This is done to prevent the occurrence of voids, which is the cause of the decrease in heat conduction, and to reduce cracks.

However, among the above-mentioned conventional techniques, in the conventional example in which the slit is formed on the metallized surface, emphasis is placed on reducing voids, and it is sufficient to reduce cracks at the joint between the insulating plate and the metal base plate. It was never taken into consideration. In other words, the conventional slit method has a metallized surface.
As shown in the conventional example of FIG. 4, the voids and heat generated at the joints of the solder, etc. applied to 21 are applied to the metallized surface of the insulating plate 1.
It escapes to the outside through a cross-shaped slit portion 22 provided in 21. However, the cracks caused by long-term repeated application of thermal stress have the property of progressing toward the center from the four corners of the insulating plate and the end faces of the insulating plate, as shown by the arrows in the figure, so the solder separated by cross-shaped slits. There was a tendency for all the joints such as the above to be attacked by cracks. In particular, once a crack occurs, the crack acts as a notch and stress concentration occurs in the notch portion, which has a notch effect, which promotes the progress of the crack. The hatched portion 23 in FIG. 4 represents the portion where the crack has not progressed as the progress of cracking. In FIG.
The crack signal is more pronounced on the side, but this happens when the thickness of the joint is thinner on the B side than on the A side. That is, the thinner the joint, the more the thermal stress tends to increase.

Such an imbalance in the thickness of the joint portion occurs due to the imbalance in the weight of the portion where the semiconductor element is mounted on the insulating plate and the other portions.

Further, among the above-mentioned conventional techniques, the method of forming the backside metallization of the insulating plate directly under the semiconductor element mounting location can reduce the occurrence of cracks, but has a space between the insulating plate and the metal base plate. As a result, heat conduction from the insulating plate to the metal base plate side tends to decrease, and the chip temperature of the semiconductor element tends to rise. Particularly, in the case of an igniter with a current limit, heat generation increases when the current is limited, so that thermal stress also increases in the initial stage, and there is a point to be improved in terms of long-term reliability.

The present invention has been made in view of the above points, and an object thereof is to effectively suppress the occurrence of voids, cracks, and the like at a joint portion with a metal base plate, and to sufficiently secure a heat dissipation area. Another object of the present invention is to provide a semiconductor element insulating plate that can improve the durability and reliability of a semiconductor assembly including a semiconductor element, an insulating plate, a metal base, and the like.

[Means for Solving the Problems]

In order to achieve the above object, the present invention is configured as follows. The reference numerals of the constituent elements are those shown in FIGS. 1, 2 (a) and 2 (b).

That is, according to the present invention, the semiconductor element 5 is bonded to the insulating plate 1 having heat conductivity and electric insulation with the bonding agent 9 directly or via the heat sink 6, and the insulating plate 1 is bonded to the metal base 7 with the bonding agent 10. In the semiconductor device which is bonded to form a laminated structure, a metallized surface used for bonding to the metal base 7 is formed on the back surface of the insulating plate 1, and the metallized surface is the semiconductor element or the heat sink 6 The first metallized surface 2 formed immediately below the mounting location of the metallized portion, and the second metallized surface 4 disposed around the first metallized surface 2 via the slit portion 3 not subjected to metallization.
Of these, the first metallized surface 2 has a surface from directly above the semiconductor element 5 when the semiconductor element 5 is mounted on the insulating plate 1 without the heat sink 6 interposed therebetween. When the semiconductor element 5 is mounted on the insulating plate 1 via the heat sink 6, it has an area in which all projections are accommodated, and an area in which all orthographic projections from directly above the heat sink 6 are accommodated. In addition, the slit portion 3 is characterized in that it extends to the edge of the insulating plate 1.

[Action]

As already described in “Problems to be solved by the invention”, cracks at the joint between the insulating plate 1 and the metal base 7 are
When the insulating plate 1 is joined from the edges and the four corners toward the center and the insulating plate 1 is joined with an inclination, the thinner the joining portion is, the greater the degree of progress of cracking. Moreover, the notch effect of the crack itself works on the crack part,
Since the stress is concentrated, the crack has a property of further progressing.

By the way, when the insulating plate 1 is laminated on the metal base 7, a brazing agent (bonding agent) 10 such as solder is provided between the first and second metallized surfaces (2, 4) on the back surface of the insulating plate and the metal base 7. However, since there is a slit 3 which is not metallized around the first metallized surface 2, this portion is a non-bonded portion where the bonding agent 10 does not exist. That is, the joint between the first metallized surface 2 of the insulating plate 1 and the metal base 7 (this is referred to as the first joint), and the second metallized surface 4 arranged around the first joint. There is a slit-shaped non-bonding part between the bonding part and the bonding part between the metal base 7 (this is referred to as a second bonding part).

According to such a joint structure, even if cracks are generated around the first joint, that is, in the second joint from the four corners and edges of the insulating plate 1, the cracks reach the slit-shaped non-joint. As a result, the notch effect disappears and stress concentration disappears, so that the progress of cracks can be stopped and the cracks can be effectively prevented from extending to the first joint portion side.

Furthermore, the first joint portion is divided into the second joint portion through the slit 3, and the length of the first joint portion can be shortened to a necessary minimum, so that the metal base 7 and the insulating plate 1 can be shortened.
Mounting the semiconductor 5 or the heat sink 6 with a semiconductor element by minimizing the thermal strain of the joint portion (first joint portion) between the two and even if the thickness of the joint portion is inclined and the thickness is unbalanced. Since the joint portion (first joint portion) directly below the portion is located away from the start point of the inclination (where the joint portion is thinnest at the joint portion at one end of the insulating plate 1), its thickness is also sufficient. Since it is ensured and the thermal stress is reduced, the soundness of the first joint portion can be sufficiently maintained because the first joint portion itself has a structural characteristic that cracks are less likely to occur.

When the semiconductor element 5 is mounted on the insulating plate 1 without the heat sink 6 interposed therebetween, the first metallized surface 2 corresponding to the first bonding portion capable of ensuring sufficient soundness is a true element of the semiconductor element 5. When the semiconductor element 5 is mounted on the insulating plate 1 through the heat sink 6, the orthographic projection from above is set so that all the orthographic projection from above is settled. Since the setting is made, the soundness of the bonding (crack prevention) to the metal base 7 can be sufficiently maintained even at least at the area of the semiconductor element 5 or the heat sink 6 with the semiconductor element 5, and the semiconductor element 5 or the heat sink 6 with the semiconductor element 5 can be maintained. Improves the reliability of peeling prevention. Further, since there is no slit 3 and thus the non-bonding region and the bonding region may be entirely below the semiconductor blocking 5 or the heat sink 6 with semiconductor blocking, the heat radiation effect to the metal base 7 can be enhanced.

Further, in addition to the first metallized surface 2, the second metallized surface 4 disposed around the first metallized surface 2 is also bonded through the bonding agent 10 such as solder, so that the thermal conductivity is improved and the temperature rise of the semiconductor element is increased. Can be reduced. Therefore, the thermal stress applied to each joint can be reduced, and the time until an initial crack is formed can be delayed.

Further, also in the present invention, as in the conventional case, the joint portion between the metal base 7 and the insulating plate 1 is divided by the slit 3 and the slit 3 is extended to the edge of the insulating plate 1 like 3 '.
Voids can escape through the non-bonding grooves formed by 3 '.

〔Example〕

 An embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a back view of an insulating plate for a semiconductor device according to a first embodiment of the present invention.

In the figure, reference numeral 1 denotes an insulating plate, which is made of, for example, alumina, aluminum nitride or the like, and a first metallized surface 2, slit portions 3 and 3 ', and a second metallized surface 4 described below are arranged on the back surface of the insulating plate 1. Set up.

The first and second metallized surfaces 2 and 4 are made of, for example, a molybdenum film or a tungsten film applied to the back surface of the insulating material 1. Further, since the molybdenum film or the like is usually easily oxidized, these A metal plating such as nickel is applied on the film. Among these metallized surfaces, the first metallized surface 2 is formed right under the semiconductor element mounting position on the insulating plate. In addition, a slit portion 3 which is not metallized is secured around the first metallized surface 2, and a second metallized surface 4 is disposed around the first metallized surface 2 through the slit portion 3. It is composed.
The second metallized surface 4 is divided into a plurality of metallized patterns by a plurality of slit portions 3 '. Each of the slit portions 3'in this embodiment is a linear extension of the slit portion 3 to reach each end face of the insulating plate 1.

The slit portions 3 and 3'have a width d of 3 mm or more. This is because when the slit width is 3 mm or less, when the metal base plate 7 to be described later is bonded to the metallized surfaces 2 and 4 of the insulating plate 1 with solder or the like, the contact portions of the joints of the joints exceed the slits. This is because the meaning of existence of the slit is lost. A metallized surface (not shown) for joining a semiconductor element or another heat sink plate is also formed on the surface of the insulating plate 1.

An example of a laminated structure of a semiconductor assembly using such an insulating plate 1 is shown in FIGS.

FIG. 2 (a) is a first laminated structure example, in which 5 is a semiconductor element (power transistor or the like), 6 is a heat sink (for example, a molybdenum plate), and 7 is a nickel-plated copper or aluminum second layer. The semiconductor element 5, the heat sink 6, the insulating plate 1, and the metal base plate 7 are laminated in this order from the top, and the reference numerals 8, 9, 10 are provided between these components.
It is joined with the solder shown in. In this embodiment, the insulating plate 1 is made of alumina, and on the insulating plate 1,
The semiconductor element 5 is mounted via the heat sink 6.

First and second metallized surfaces 2, 4 on the back surface of the insulating plate 1
Are bonded to the metal base plate 7 with solder 10. A wire bonding member 11 is connected to the insulating plate 1 by a solder 12.

Here, the first metallized surface 2 has an area in which all orthographic projections from directly above the heat sink 6 are accommodated.

FIG. 2B shows a second laminated structure example. In this example, a laminated structure in which the insulating plate 1 is an aluminum nitride substrate is shown, and in FIG. The reference numerals indicate the same parts. Particularly, in this example, since the insulating plate 1 is made of aluminum nitride having high thermal conductivity, the semiconductor element 5 is directly mounted on the insulating plate 1 via the solder 9. is there. Then, as shown in FIGS. 2A and 2B, when the first and second metallized surfaces 2 and 4 of the insulating plate 1 and the metal base plate 7 are joined via the solder 10, A slit-shaped non-bonding portion 15 is formed at a portion corresponding to the slit portion 3.

The first metallized surface 2 has an area in which all orthographic projections from directly above the semiconductor element 5 are accommodated.

FIG. 3 is a plan view of the semiconductor assembly showing the entire laminated structure of FIG. 2 (a). As shown in FIG.
In addition to the semiconductor 5, the heat sink 6 and the like being disposed thereon, the printed board 13 is joined, and the semiconductor element 5 and the wire bonding member 11 and the wire 14 on the printed board 13 are connected to each other to establish electrical continuity. ing.

Next, the operation of this embodiment will be described.

Generally, cracks occurring at the joint between the metal base plate and the insulating plate are likely to occur between the members to be joined having a large linear expansion coefficient difference, and the longer the length of the joint is, the more the cracks between the to-be-joined parts in the joint become. Since the difference in thermal expansion (thermal strain) is large, it easily occurs.
Taking FIG. 2 (a) as an example, the linear expansion coefficient of each member is 6.8 × 10 ⁻⁶ when the insulating plate 1 is an alumina substrate and 28 × 1 for the solder 10.
0 ⁻⁶ , the metal base 7 is copper 17 × 10 ⁻⁶ , and aluminum is 24 × 10 ⁻⁶ . That is, cracking is likely to occur at the solder joint 10 between the insulating plate 1 having the largest soldering area and the largest difference in linear expansion coefficient and the second metal base plate (metal base) 7.

In the case of FIG. 2B, the insulating plate 1 is made of aluminum nitride and has a linear expansion coefficient of 4.3 × 10 ⁻⁶ , so that cracks are likely to occur in the solder 10 as in FIG. 2A. The generation and progress of cracks lowers the thermal conductivity and thus the reliability of the device. As described in the section [Problems to be solved by the invention], the progress of these cracks is as follows.
Due to its nature, it proceeds from the four corners and end faces of the insulating substrate 1, and when the joint 10 is inclined, it tends to occur in the thinner joint.

In FIGS. 2A and 2B, when the insulating plate 1 and the joint portion 10 are inclined, the thickness of the joint portion 10 on the side A becomes thin due to the weight of the first heat sink 6 and the semiconductor element 5. There is a tendency. If a crack occurs once, the notch effect that causes stress concentration in the crack itself works, which promotes the progress of the crack.

Then, the insulating plate 1 and the metal base plate 7 in the case of the present embodiment.
At the joints 10 between them, when a long-term thermal fatigue cycle is applied, the second joints (second joints) at one end and four corners of the insulating plate 1 are formed.
The cracks are generated from the metallized surface 4b) of the metallized surface 10b), but in the present embodiment, when the cracks reach the slit-shaped non-bonded portion 15, the notch effect of the cracks disappears and the cracking stops. . Furthermore, the first joint 10a
Through the slit-like non-joint 15 to the second joint 10b.
Since the length of the first joint portion 10a can be made as short as possible, the metal base plate 7 and the insulating plate 1 are separated.
The thermal strain between the joints 10a can be made as small as possible, and even if there is a thickness imbalance in the entire joint 10 and a thickness imbalance occurs, the joint 10a directly below the semiconductor mounting location has a start point of inclination ( Since it is located at a position apart from the thinnest portion of the joint at the joint 10b at one end of the insulating plate 1, its thickness is sufficiently secured and thermal stress is also reduced.
10a itself is in a state where cracking is unlikely to occur. Therefore,
According to the present embodiment, even if cracks occur in the second joint portion 10b, the first joint portion 10a has a crack signal preventing effect due to the slit-shaped non-joint portion 15 and the first joint portion itself is not cracked. Since the structural characteristics that do not easily occur are provided, the synergistic effect of the two can sufficiently maintain the soundness of the joint portion in the required range.

Further, in addition to the first metallized surface 2, the second metallized surface 4 arranged around the first metallized surface 2 is also joined to the metal base plate by the brazing material, so that the thermal conductivity is improved and the temperature rise of the semiconductor can be reduced. Therefore, the thermal stress applied to each joint can be reduced, and the time until the initial crack enters can be lengthened.

Furthermore, since the joint portion 10 between the metal base plate 7 and the insulating plate 1 can be divided by the slit 3, the void can be reduced by the slit.

5 (a) and 5 (b) are rear views of the insulating plate 1 showing the second and third embodiments of the present invention.

The portion indicated by reference numeral 2 in FIG. 5 (a) is the first metallized surface directly below the semiconductor element as in the case of the first embodiment, and the second metallized surface 4 disposed around the first metallized surface with the slit 3 interposed therebetween. This is an example in which the slits 3'are further subdivided, and FIG. 5 (b) is an example in which the way of inserting the slits 3'is changed. The metallized patterns according to these embodiments can also achieve the same effects as the first embodiment.

FIG. 6 (a) is a front view of an insulating plate showing a fourth embodiment of the present invention, and FIG. 6 (b) is a rear view of the same. This embodiment shows a specific example of an insulating plate for mounting a plurality of semiconductor elements, and the hatched portion is a metallized surface. Each semiconductor element 5 is mounted on the metallized surfaces 2'a to 2'c of FIG. 6 (a) through a joint, and the metallized surfaces 2'a to 2'c maintain the mutual pressure resistance. Therefore, they are separated and arranged at a predetermined interval. FIG. 6 (b) shows a metallization pattern on the back surface, and 2a to 2c are the first metallized surfaces arranged directly below 2'a to 2'c of the respective semiconductor element mounting locations. 2nd around each of 2a-2c
Of the metallized surface 4 is disposed via the slit portion 3. Further, the second metallized surface 4 is subdivided into a plurality of slit portions 3 ′ communicating with the slit portions 3.

FIG. 6C shows a modified example (fifth embodiment) of the back surface metallized pattern of the insulating plate 1.

FIGS. 7 (a) and 7 (b) show an example of a laminated structure of a semiconductor assembly using the insulating plate 1 of the fourth embodiment, which is shown in FIGS. 2 (a) and 2 (b). The same reference numerals as in the laminated structure example indicate the same or common elements. Figure 7 (a)
Then, a plurality of semiconductor elements 5, insulating plate (alumina substrate)
1. Metal base plate 7 and metal base 7 ′ are soldered 9, 10, 1
These are sequentially joined through 0 ', especially the metal base plate 7
And the metal base 7'are separated from each other, and the metal base plate 7 to be joined to the insulating plate 1 is divided according to the number of semiconductor elements 5. Then, the joint portion 10 between the insulating plate 1 and the metal base plate 7
Is a first joining portion 10a where each of the first metallized surfaces 2a, 2b and 2c and the metal base plate 7 are joined together, and a second joining portion where the second metallized surface 4 and the metal base plate 7 are joined together. The joint 10
The slit-shaped non-joint portion 15 is formed between the first joint portion 10a and the second joint portion 10b.

7 (b) is different from FIG. 7 (a) in the metal base plate 7
Is a single metal base plate 7 without being divided, the metal base plate 7 is also used as the metal base plate 7 ', and the insulating plate 1 is made of aluminum nitride.

FIG. 8 is a plan view of the semiconductor assembly showing the laminated structure of FIG. 7 (a) as a whole. The wire bonding member 11 and the aluminum wire 14 on the printed board 13 adhered to the metal base 7 '.
Thus, each semiconductor element 5 is electrically connected to the printed board 13. The wire bonding member 11 on the insulating plate 1 is ultrasonically connected to an external terminal (not shown) by an aluminum wire. The metal base plate 7 and the aluminum base 7'of FIG. 7 (a) can be ultrasonically welded without using brazing such as solder. According to such joining, the reliability of joining can be improved. Can be significantly improved.

In this embodiment as well, cracks are likely to occur at the joint 10 between the insulating plate 1 and the metal base plate (or metal base) 7, but like the other embodiments described above, the non-joint corresponding to the slit 3 is not formed. Due to the effect of preventing cracking of the portion 15 and the joining length of the first joining portion 10a corresponding to the first metallized surfaces 2a, 2b, 2c as short as possible and the thickness of the joining portion 10a being sufficiently secured, Since it is possible to effectively prevent the occurrence of cracks in the first joint portion 10a itself and reduce the occurrence of voids in the joint portion through the slits 3 and 3 ', the first metallized surface
The necessary minimum heat radiation area can be secured at the joint 10a at 2a, 2b, 2c.

Therefore, the reliability of the joint can be improved, and the durability and reliability of the semiconductor assembly can be improved. Further, in this embodiment, a plurality of semiconductor elements can be mounted on one insulating plate. Since an insulating plate is not individually prepared and joined for each semiconductor element, the manufacturing process of the semiconductor assembly can be simplified.

FIG. 9 shows a sixth embodiment of the present invention, in which the first metallized surface 2 formed on the back surface of the insulating plate 1 is shown.
The second metallized surface 4 arranged around the a, 2b, 2c via the slit 3 is subdivided through a large number of slits 3 '.

〔The invention's effect〕

As described above, according to the present invention, it is possible to effectively suppress the occurrence of voids, cracks and the like at the joint between the insulating plate and the metal base plate,
Moreover, it is possible to sufficiently secure the heat dissipation area and improve the durability and reliability of the semiconductor assembly including the semiconductor element, the insulating plate, the metal base plate, and the like.

[Brief description of drawings]

FIG. 1 is a rear view of an insulating plate which is a first embodiment of the present invention, and FIG.
FIGS. 3A and 3B are side views showing an example of a laminated structure of a semiconductor assembly using the insulating plate of the first embodiment, and FIG.
FIG. 5A is a plan view showing the entire semiconductor assembly, FIG. 4 is a rear view of a conventional insulating plate, and FIGS. 5A and 5B are insulations according to the second and third embodiments of the present invention. The back view of the plate, FIGS. 6 (a) and 6 (b) are the front and back views of the insulating plate according to the fourth embodiment of the present invention, and FIG. 6 (c) is the insulating plate of the fifth embodiment of the present invention. 7A and 7B are side views showing an example of a laminated structure of the semiconductor assembly using the fourth embodiment,
FIG. 8 is a plan view showing the entire semiconductor assembly of FIG. 7 (a), and FIG. 9 is a back view of an insulating plate which is a sixth embodiment of the present invention. 1 ... Insulation plate, 2 ... First metallized surface, 2a, 2b, 2c ...
... first metallized surface, 3 ... slit portion around the first metallized surface, 3 '... slit portion, 4 ... second metallized surface, 5 ... semiconductor element, 7 ... metal base, 10 ...
… Bonding part (brazing part), 10a …… First joint part, 10b …… Second joint part, 15 …… Slit-shaped non-joint part.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-62-203354 (JP, A) JP-A-55-118641 (JP, A) JP-A-55-68661 (JP, A)

Claims (2)

[Claims] 1. A semiconductor element (5) is bonded to an insulating plate (1) having heat conductivity and electric insulation by a bonding agent (9), and the insulating plate (1) is bonded to a metal base (7). In a semiconductor device having a laminated structure formed by bonding with an agent (10), a metallized surface used for bonding with the metal base (7) is formed on the back surface of the insulating plate (1), and the metallized surface is A first metallized surface (2) formed directly below the mounting location of the semiconductor element (5) and a slit portion (3) around the first metallized surface (2) which is not metallized. And a second metallization surface (4) provided, of which the first metallization surface (2) has an area in which all orthographic projections from directly above the semiconductor element (5) are accommodated, Moreover, the slit portion (3) is an edge of the insulating plate (1). A semiconductor device characterized by being extended to. 2. A semiconductor element (5) is bonded to an insulating plate (1) having heat conductivity and electric insulation by a bonding agent (9) via a heat sink (6), and the insulating plate (1) is made of metal. In a semiconductor device in which a bonding agent (10) is bonded onto a base (7) to form a laminated structure, a metallized surface used for bonding with the metal base (7) is formed on the back surface of the insulating plate (1). The metallized surface includes a first metallized surface (2) formed directly below the mounting location of the heat sink (6) and a slit portion (around the first metallized surface (2)) which is not metallized. 3) and a second metallization surface (4) which is disposed through the first metallization surface (2). The first metallization surface (2) of the first metallization surface (2) accommodates all orthographic projections from directly above the heat sink (6). Has an area, and the slit portion (3) is a semiconductor device characterized by being extended to the edge of the insulating plate (1).