JPH09107173A - Pad structure and wiring board device - Google Patents
Pad structure and wiring board deviceInfo
- Publication number
- JPH09107173A JPH09107173A JP7263222A JP26322295A JPH09107173A JP H09107173 A JPH09107173 A JP H09107173A JP 7263222 A JP7263222 A JP 7263222A JP 26322295 A JP26322295 A JP 26322295A JP H09107173 A JPH09107173 A JP H09107173A
- Authority
- JP
- Japan
- Prior art keywords
- pad
- stud
- sub
- pad portion
- main
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48475—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball
- H01L2224/48476—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area
- H01L2224/48491—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being an additional member attached to the bonding area through an adhesive or solder, e.g. buffer pad
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、パッド構造及びそ
のようなパッド構造を備えた配線基板装置に関するもの
である。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pad structure and a wiring board device having such a pad structure.
【０００２】[0002]
【従来の技術】従来、基板上に実装された半導体チップ
と、その半導体チップの近傍に形成されたパッド上には
んだを介して表面実装されたスタッドとの間を、ボンデ
ィングワイヤによって接合してなる配線基板装置が知ら
れている。2. Description of the Related Art Conventionally, a semiconductor chip mounted on a substrate and a stud surface-mounted via solder on a pad formed in the vicinity of the semiconductor chip are joined by a bonding wire. Wiring board devices are known.
【０００３】図１０（ａ）には、前記配線基板装置にお
けるパッド２１の構造が示されている。このパッド２１
は矩形状であって、表面実装されるべきスタッド２２の
底面よりもひとまわり大きくなっている。実装時におい
ては、このようなパッド２１の上面にまずクリームはん
だ２３が塗布され、次いでその上にスタッド２２が仮固
定される（図１０(b),(c) 参照）。この状態でクリーム
はんだ２３をリフローさせることにより、パッド２１と
スタッド２２とが接合されるようになっている。FIG. 10 (a) shows the structure of the pad 21 in the wiring board device. This pad 21
Has a rectangular shape and is slightly larger than the bottom surface of the stud 22 to be surface-mounted. At the time of mounting, the cream solder 23 is first applied to the upper surface of such a pad 21, and then the stud 22 is temporarily fixed thereon (see FIGS. 10B and 10C). By reflowing the cream solder 23 in this state, the pad 21 and the stud 22 are joined together.
【０００４】[0004]
【発明が解決しようとする課題】ところが、従来におい
てパッド２１上にスタッド２２をはんだ付けすると、図
１０（ｄ）に示されるように、しばしば同スタッド２２
が基板２４に対して傾斜した状態（即ちスタッド２２の
上面が水平でない状態）になることがあった。なお、こ
れはリフローによって溶融したはんだ２３が、スタッド
２２を特定方向へ不均等に引っ張ることによるものと考
えられていた。また、抵抗溶接の場合には接触面積が変
わり、発熱量が不均一となるため、接合強度がバラつく
ことがあった。However, when the stud 22 is conventionally soldered on the pad 21, as shown in FIG. 10 (d), the stud 22 is often soldered.
May be inclined with respect to the substrate 24 (that is, the upper surface of the stud 22 is not horizontal). It is considered that this is because the solder 23 melted by the reflow pulls the stud 22 unevenly in a specific direction. Further, in the case of resistance welding, the contact area changes and the amount of heat generated becomes non-uniform, so that the joint strength may vary.
【０００５】そして、上記の場合にはワイヤボンダの出
力がスタッド２２及びボンディングワイヤ２５に充分に
伝わらず、このために両者２１，２５の接合強度が弱く
なるという問題があった。従って、得られる配線基板装
置の信頼性もいまひとつ不充分なものとなっていた。In the above case, the output of the wire bonder is not sufficiently transmitted to the stud 22 and the bonding wire 25, so that there is a problem that the bonding strength between the two 21 and 25 is weakened. Therefore, the reliability of the obtained wiring board device is also insufficient.
【０００６】上記のような事情のもと、本願発明者は、
実願平４−５５０５９号の出願においてスタッド２２の
傾斜を解消しうるパッドの構造を提案している。図１１
にはその改良されたパッド２６の構造が例示されてい
る。同パッド２６は、スタッド２２から外方へ突出する
突出部２７を４本有する十字状の形状になっている。こ
の構造であると、リフローによって溶融したはんだ２３
により、スタッド２２が複数の方向へ引っ張られること
になる。そして、このような面方向への均等な引っ張り
力が働くことにより、スタッド２２の傾斜が解消される
ようになっている。Under the above circumstances, the inventor of the present application
The application of Japanese Patent Application No. 4-55059 proposes a pad structure capable of eliminating the inclination of the stud 22. FIG.
The structure of the improved pad 26 is illustrated in FIG. The pad 26 has a cross shape having four protruding portions 27 protruding outward from the stud 22. With this structure, the solder 23 melted by reflow
As a result, the stud 22 is pulled in a plurality of directions. The uniform pulling force in the plane direction acts to eliminate the inclination of the stud 22.
【０００７】しかしながら、上述のように改良されたパ
ッド２６の構造の場合、傾斜の防止に関しては有効であ
るものの、スタッド２２が面方向に位置ズレしやすいと
いう問題があった（図１０(e) 参照）。なお、このよう
な事態が起こるのは、特にスタッド２２がパッド２６の
幾何学的中心からズレた位置に仮固定されたときに多い
ということが経験的に知られていた。従って、ワイヤボ
ンディングの接合強度をより向上させるためにも、さら
なる改良が必要であると考えられていた。However, in the case of the structure of the pad 26 improved as described above, although effective in preventing the inclination, there is a problem that the stud 22 is easily displaced in the plane direction (FIG. 10 (e)). reference). It has been empirically known that such a situation often occurs especially when the stud 22 is temporarily fixed at a position displaced from the geometric center of the pad 26. Therefore, it has been considered that further improvement is necessary in order to further improve the bonding strength of wire bonding.
【０００８】本発明は上記の課題に鑑みてなされたもの
であり、その目的は、表面実装部品の傾斜及び面方向へ
の位置ズレの双方を確実に防止することができるパッド
構造及び配線基板装置を提供することにある。The present invention has been made in view of the above problems, and an object thereof is a pad structure and a wiring board device capable of surely preventing both the inclination of a surface mount component and the positional deviation in the surface direction. To provide.
【０００９】[0009]
【課題を解決するための手段】上記の課題を解決するた
めに、請求項１に記載の発明では、表面実装部品を表面
実装するためのパッドの構造であって、前記表面実装部
品の被接合面とほぼ同じ外形寸法を持つ主パッド部の複
数箇所から副パッド部を外方へ突出させたことを特徴と
するパッド構造をその要旨とする。In order to solve the above-mentioned problems, the invention according to claim 1 has a structure of a pad for surface-mounting a surface-mounted component, wherein the surface-mounted component is to be joined. A gist of a pad structure is characterized in that sub pad portions are projected outward from a plurality of portions of a main pad portion having substantially the same outer dimensions as a surface.
【００１０】請求項２に記載の発明は、請求項１におい
て、前記各副パッド部は、前記主パッド部の幾何学的中
心を基準として対称となるような箇所に形成されている
としている。According to a second aspect of the present invention, in the first aspect, each of the sub pad portions is formed at a position symmetrical with respect to the geometric center of the main pad portion.
【００１１】請求項３に記載の発明は、請求項２におい
て、前記主パッド部は矩形状であり、前記副パッド部は
その主パッド部における各々のコーナー部分に設けられ
ているとしている。According to a third aspect of the present invention, in the second aspect, the main pad portion has a rectangular shape, and the sub pad portion is provided at each corner portion of the main pad portion.
【００１２】請求項４に記載の発明は、請求項３におい
て、前記各副パッド部の形状及び大きさは等しいものと
している。請求項５に記載の発明は、基板上に実装され
た半導体チップと、その半導体チップの近傍に形成され
たパッド上にはんだを介して表面実装されたスタッドと
の間を、ボンディングワイヤまたはリードの抵抗溶接に
よって接合してなる配線基板装置において、前記パッド
を、前記スタッドの被接合面とほぼ同じ外形寸法を持つ
主パッド部の複数箇所から副パッド部を外方へ突出して
なるものとしたことを特徴とする配線基板装置をその要
旨とする。According to a fourth aspect of the present invention, in the third aspect, the shape and size of each of the sub pad portions are the same. According to a fifth aspect of the present invention, a bonding wire or a lead is provided between a semiconductor chip mounted on a substrate and a stud surface-mounted on a pad formed in the vicinity of the semiconductor chip via solder. In a wiring board device joined by resistance welding, the pads are formed by projecting subpad portions outward from a plurality of locations of a main pad portion having substantially the same outer dimensions as the joined surface of the stud. The gist of the wiring board device is that.
【００１３】以下、前記発明の「作用」について説明す
る。請求項１〜５に記載の発明によると、パッドが、主
パッド部の複数箇所から副パッド部を外方へ突出させた
ような構造となっている。このため、パッド上にクリー
ムはんだ等の接合材料を塗布しかつその上に表面実装部
品を仮固定した状態でリフローを行うと、表面実装部品
は、溶融した接合材料の表面張力によって複数の方向へ
ほぼ均等な力で引っ張られる。そして、このような面方
向への引っ張り力がほぼ均等に働くことにより、表面実
装部品がパッド上に水平に接合される。つまり、表面実
装部品に働く引っ張り力が複数方向に分散されるため、
引っ張り力が特定方向のみに働いて傾斜に到るという事
態が回避される。The "action" of the invention will be described below. According to the invention described in claims 1 to 5, the pad has a structure in which the sub pad portions are projected outward from a plurality of locations of the main pad portion. For this reason, when reflow is performed with a bonding material such as cream solder applied to the pad and the surface-mounting components temporarily fixed on it, the surface-mounting components will move in multiple directions due to the surface tension of the molten bonding material. It is pulled with almost equal force. Then, the surface-mounted components are bonded horizontally on the pads by the pulling forces acting in the surface direction being substantially even. In other words, the tensile force that acts on the surface-mounted component is distributed in multiple directions,
It is possible to avoid the situation where the pulling force acts only in a specific direction to reach the slope.
【００１４】また、主パッド部は表面実装部品の被接合
面とほぼ同じ外形寸法であるため、同部分の外形寸法が
被接合部よりも小さい場合（例えば図１１の場合）に比
較して、表面実装部品に面方向への位置ズレが起こりに
くくなっている。これは、図１１の場合では、そもそも
仮固定時に表面実装部品の位置ズレがあると引っ張り力
が不均等に働きやすくなるのに対し、本発明ではそのよ
うな事態が起こりにくいからであると推測される。Since the main pad portion has substantially the same outer dimensions as the surface to be joined of the surface mount component, the outer dimensions of the same portion are smaller than those of the portion to be joined (for example, in the case of FIG. 11), The surface mount component is less likely to be displaced in the surface direction. This is presumably because in the case of FIG. 11, the pulling force is likely to work unevenly if there is a positional displacement of the surface mount component in the first place during temporary fixing, but such a situation is unlikely to occur in the present invention. To be done.
【００１５】請求項２に記載の発明によると、各副パッ
ド部は、主パッド部の幾何学的中心を基準として対称と
なるような箇所に形成されているため、非対称に形成さ
れている場合に比べて、面方向からの引っ張り力がより
均等に働く。According to the second aspect of the present invention, since each sub pad portion is formed at a position symmetrical with respect to the geometric center of the main pad portion, it is formed asymmetrically. Compared with, the pulling force from the surface direction works more evenly.
【００１６】請求項３に記載の発明によると、副パッド
部は矩形状の主パッド部における各々のコーナー部分に
設けられている。この構成であると、例えば同様の形状
をした副パッド部を主パッド部における複数の辺に設け
た場合に比べて、面方向からの引っ張り力がよりいっそ
う均等に働く。即ち、副パッド部をコーナー部分に設け
ると、副パッド部を辺に設けた場合に比較して、相対す
る副パッド部の離間距離が大きくなるからである。According to the third aspect of the present invention, the sub pad portion is provided at each corner of the rectangular main pad portion. With this configuration, the pulling force from the surface direction works even more uniformly than in the case where, for example, sub pads having the same shape are provided on a plurality of sides of the main pad. That is, when the sub pad portions are provided at the corners, the distance between the sub pad portions facing each other becomes larger than that when the sub pad portions are provided on the sides.
【００１７】請求項４に記載の発明によると、各副パッ
ド部の形状及び大きさが等しくなっているため、そうで
ない場合に比べて面方向への引っ張り力がよりいっそう
均等に働く。According to the fourth aspect of the present invention, since the shape and size of each sub-pad portion are the same, the pulling force in the surface direction acts more evenly than in the case where it is not the same.
【００１８】[0018]
〔第１の実施形態〕以下、本発明を具体化した一実施の
形態を図１〜図５に基づき詳細に説明する。[First Embodiment] An embodiment of the present invention will be described in detail below with reference to FIGS.
【００１９】図１に示されるように、この配線基板装置
１を構成する基板２の片側面の所定箇所には、金属材料
からなる矩形状のダイパッド３が形成されている。この
ダイパッド３上には、導電性接着剤４等を介して半導体
チップ５が接合されている。前記ダイパッド３の近傍に
は、表面実装部品としてのスタッド６を表面実装するた
めのパッド７が複数個形成されている。なお、本実施形
態におけるスタッド６は直方体であり、被接合面である
底面６ａの形状は矩形状になっている。また、スタッド
６は銅を材料として形成されており、その上下面はアル
ミニウム層（図示略）によって被覆されている。そし
て、このようなスタッド６は、前記スタッド実装用のパ
ッド７上にはんだ８を介して接合されている。また、ス
タッド６の上面と図示しない半導体チップ５上のボンデ
ィングパッドとは、アルミニウム等からなるボンディン
グワイヤ９によって接合されている。その結果、基板２
側と半導体チップ５側との電気的な接続が図られてい
る。As shown in FIG. 1, a rectangular die pad 3 made of a metal material is formed at a predetermined position on one side surface of a substrate 2 which constitutes the wiring board device 1. A semiconductor chip 5 is bonded onto the die pad 3 via a conductive adhesive 4 or the like. In the vicinity of the die pad 3, a plurality of pads 7 for surface-mounting the studs 6 as surface-mount components are formed. The stud 6 in this embodiment is a rectangular parallelepiped, and the bottom surface 6a, which is the surface to be joined, has a rectangular shape. The stud 6 is made of copper, and its upper and lower surfaces are covered with an aluminum layer (not shown). The stud 6 is joined to the pad 7 for mounting the stud through the solder 8. The upper surface of the stud 6 and the bonding pad on the semiconductor chip 5 (not shown) are joined by a bonding wire 9 made of aluminum or the like. As a result, the substrate 2
Is electrically connected to the semiconductor chip 5 side.
【００２０】図２に示されるように、本実施形態のスタ
ッド実装用のパッド７は、矩形状をした１つの主パッド
部７ａと、複数の副パッド部７ｂとによって構成されて
いる。主パッド部７ａは、スタッド６の底面６ａとほぼ
同じ外形寸法を有している。従って、被実装物であるス
タッド６は、リフローによるはんだ付けを行うと、基本
的にこの主パッド部７ａ内に収まることになる。各副パ
ッド部７ｂは、主パッド部７ａにおける複数の箇所から
パッド７の外方へ向かって（より詳細にいうとパッド７
が属する面において主パッド部７ａの幾何学的中心Ｏ1
から遠ざかる方向へ）突設されている。また、各々の副
パッド部７ａの形状及び大きさは等しく、それらはとも
に矩形状を呈している。As shown in FIG. 2, the stud mounting pad 7 of the present embodiment is composed of one rectangular main pad portion 7a and a plurality of sub pad portions 7b. The main pad portion 7a has substantially the same outer dimensions as the bottom surface 6a of the stud 6. Therefore, the stud 6, which is the mounted object, basically fits within the main pad portion 7a when soldering by reflow is performed. Each sub-pad portion 7b extends outward from the pad 7 from a plurality of locations on the main pad portion 7a (more specifically, the pad 7
The geometric center O1 of the main pad portion 7a in the plane to which
It is projected from the direction away from). The sub pad portions 7a have the same shape and size, and both have a rectangular shape.
【００２１】主パッド部７ａにおける複数の箇所とは、
本実施形態では主パッド部７ａの各々のコーナー部分を
意味している。従って、ここでは副パッド部７ｂの数は
４つである。また、各副パッド部７ｂは、主パッド部７
ａの幾何学的中心Ｏ1 を基準として対称となるような箇
所に形成されていると把握することもできる。The plurality of locations in the main pad portion 7a are
In the present embodiment, it means each corner portion of the main pad portion 7a. Therefore, the number of sub pad portions 7b is four here. In addition, each sub pad portion 7b is connected to the main pad portion 7
It can also be understood that it is formed at a position symmetrical with respect to the geometrical center O1 of a.
【００２２】次に、リフローによるはんだ付けの手順を
説明する。まず、図３に示されるように、接合材料であ
るクリームはんだ１０をパッド７上に塗布する。次に、
図４に示されるように、クリームはんだ１０にスタッド
６の底面６ａを押し付けることにより、スタッド６をパ
ッド７上に仮固定する。なお、主パッド部７ａの外形寸
法はスタッド６の底面６ａとほぼ等しいことから、主パ
ッド部７ａの幾何学的中心Ｏ1 とスタッド６の幾何学的
中心とを比較的容易に一致させることができる。次に、
基板２をリフロー炉に投入することにより、クリームは
んだ１０を溶融させる。その際、溶融したはんだ８の表
面張力、特にスタッド６の側面に付着しているはんだ８
の表面張力によって、スタッド６が４方向（図５の矢印
Ａ1 の方向）に引っ張られる。この結果、スタッド６は
傾斜することなく接合される。そして、最後に超音波等
を利用したワイヤボンダ等を用いてワイヤボンディング
を行い、半導体チップ５とスタッド６とを接合する。Next, the procedure of soldering by reflow will be described. First, as shown in FIG. 3, the cream solder 10 as a bonding material is applied on the pad 7. next,
As shown in FIG. 4, the stud 6 is temporarily fixed onto the pad 7 by pressing the bottom surface 6 a of the stud 6 against the cream solder 10. Since the outer dimensions of the main pad portion 7a are substantially equal to the bottom surface 6a of the stud 6, the geometric center O1 of the main pad portion 7a and the geometric center of the stud 6 can be relatively easily matched. . next,
The cream solder 10 is melted by putting the substrate 2 in a reflow oven. At that time, the surface tension of the melted solder 8, especially the solder 8 attached to the side surface of the stud 6.
The surface tension of the stud 6 pulls the stud 6 in four directions (direction of arrow A1 in FIG. 5). As a result, the stud 6 is joined without tilting. Then, finally, wire bonding is performed using a wire bonder or the like using ultrasonic waves or the like to bond the semiconductor chip 5 and the stud 6.
【００２３】さて、以下に本実施形態における特徴的な
作用効果を列挙する。 （イ）本実施形態によると、スタッド実装用のパッド７
が、主パッド部７ａの複数箇所から副パッド部７ｂを外
方へ突出させたような構造となっている。このため、ク
リームはんだ１０を塗布しかつスタッド６を仮固定した
状態でリフローを行うと、前記スタッド６は、溶融した
はんだ８の表面張力によって４方向へほぼ均等な力で引
っ張られる。そして、このような面方向への引っ張り力
がほぼ均等に働くことにより、スタッド６がパッド７上
に水平に接合される。つまり、スタッド６に働く引っ張
り力が４方向に分散されることにより、引っ張り力が特
定方向のみに働いて傾斜に到るという事態が回避され
る。The characteristic actions and effects of this embodiment will be listed below. (A) According to the present embodiment, the pad 7 for stud mounting
However, it has a structure in which the sub pad portions 7b are projected outward from a plurality of locations of the main pad portion 7a. For this reason, when reflowing is performed with the cream solder 10 applied and the studs 6 temporarily fixed, the studs 6 are pulled by the surface tension of the molten solder 8 in four directions with substantially equal force. Then, the pulling force in the surface direction acts substantially evenly, so that the stud 6 is horizontally joined to the pad 7. That is, since the pulling force acting on the stud 6 is distributed in four directions, it is possible to avoid the situation where the pulling force acts only in a specific direction to reach the inclination.
【００２４】しかも、本実施形態では、主パッド部７ａ
はスタッド６の底面６ａとほぼ同じ外形寸法になってい
る。このため、同部分の外形寸法が底面６ａよりも小さ
かった従来構成（図１１参照）に比較して、面方向への
位置ズレが起こりにくい。これは、前記従来構成ではそ
もそも仮固定時に位置ズレがあると引っ張り力が不均等
に働きやすくなるのに対し、本実施形態ではそのような
事態が起こりにくいからであると推測される。Moreover, in this embodiment, the main pad portion 7a
Has the same outer dimensions as the bottom surface 6a of the stud 6. Therefore, as compared with the conventional configuration (see FIG. 11) in which the outer dimension of the same portion is smaller than that of the bottom surface 6a, positional deviation in the surface direction is less likely to occur. It is presumed that this is because, in the above-described conventional configuration, the pulling force is likely to work unevenly if there is a positional deviation at the time of temporary fixing, whereas such a situation is unlikely to occur in the present embodiment.
【００２５】（ロ）本実施形態では、各副パッド部７ｂ
が、主パッド部７ａの幾何学的中心Ｏ1 を基準として対
称となるような箇所に形成されている。このため、仮に
それらを非対称となるような箇所に形成した場合に比べ
て、面方向からの引っ張り力がより均等に働くという利
点がある。(B) In this embodiment, each sub pad portion 7b
Are formed at locations symmetrical with respect to the geometric center O1 of the main pad portion 7a. For this reason, there is an advantage that the pulling force from the surface direction acts more uniformly than in the case where they are formed in asymmetrical locations.
【００２６】（ハ）本実施形態では、副パッド部７ａは
矩形状の主パッド部７ｂにおける４つのコーナー部分に
設けられている。この構成であると、例えば同様の形状
をした副パッド部７ｂを主パッド部７ａにおける４つの
辺に設けた場合に比べて、面方向からの引っ張り力がよ
りいっそう均等に働くという利点がある。即ち、副パッ
ド部７ｂをコーナー部分に設けると、そうでない場合に
比較して、相対する副パッド部７ｂの離間距離が大きく
なるからである。このことは、引っ張り力のばらつきの
解消に貢献するものと考えられる。(C) In this embodiment, the sub pad portion 7a is provided at four corners of the rectangular main pad portion 7b. With this configuration, there is an advantage that the pulling force from the surface direction acts more evenly as compared with the case where the auxiliary pad portion 7b having the same shape is provided on the four sides of the main pad portion 7a. That is, if the sub pad portion 7b is provided at the corner portion, the distance between the sub pad portions 7b facing each other becomes larger than that in the other case. This is considered to contribute to elimination of variations in tensile force.
【００２７】（ニ）本実施形態では、各副パッド部７ｂ
の形状及び大きさが等しくなっているため、そうでない
場合に比べて面方向への引っ張り力がよりいっそう均等
に働く。このことも同様に引っ張り力のばらつきの解消
に貢献するものと考えられるからである。(D) In this embodiment, each sub pad portion 7b
Since the shapes and sizes of the two are the same, the pulling force in the surface direction works more evenly than in the case where they do not. This is also considered to contribute to elimination of variations in tensile force.
【００２８】（ホ）本実施形態の配線基板装置１による
と、上記のように傾斜及び位置ズレの双方が確実に防止
されるため、ワイヤボンディング面であるスタッド６の
上面水平になり、かつスタッド６が本来の正しい位置に
接合された状態となる。ゆえに、ワイヤボンディングを
確実に実施することが可能となり、結果として信頼性に
優れた配線基板装置１を実現することができる。 〔第２の実施形態〕次に、図６に基づいて第２の実施形
態を説明する。なお、前記実施形態と共通する部材につ
いては同じ番号を付すのみとし、ここではその詳細な説
明は省略する。(E) According to the wiring board device 1 of the present embodiment, both the inclination and the positional deviation are surely prevented as described above, so that the upper surface of the stud 6 which is the wire bonding surface is horizontal and the stud is horizontal. 6 is in a state of being joined to the original correct position. Therefore, the wire bonding can be reliably performed, and as a result, the wiring board device 1 having excellent reliability can be realized. [Second Embodiment] Next, a second embodiment will be described with reference to FIG. It should be noted that members common to those in the above-described embodiment are given the same reference numerals, and detailed description thereof is omitted here.
【００２９】本実施形態におけるスタッド実装用のパッ
ド１６は、矩形状をした１つのパッド１６ａと、矩形状
をした４つの副パッド部１６ｂとによって構成されてい
る。各副パッド部１６ｂは、主パッド部１６ａにおける
複数の箇所からパッド１６の外方へ向かって突設されて
いる。また、各々の副パッド部１６ａの形状及び大きさ
は等しく、それらはともに矩形状を呈している。以上の
点においては前記実施形態と同様である。ただし、本実
施形態では、各副パッド部１６ｂが主パッド部１６ａの
４つの辺の中央部（コーナー部分を結ぶ中間の地点）に
形成されている点が相違している。なお、各副パッド部
１６ｂは、主パッド部１６ａの幾何学的中心Ｏ1 を基準
として対称となるような箇所に形成されている。The stud mounting pad 16 in this embodiment is composed of one rectangular pad 16a and four rectangular sub-pad portions 16b. Each sub pad portion 16b is provided so as to project outward from the pad 16 from a plurality of locations in the main pad portion 16a. The sub pad portions 16a have the same shape and size, and both have a rectangular shape. The above points are similar to those of the above-described embodiment. However, the present embodiment is different in that each sub pad portion 16b is formed at a central portion (an intermediate point connecting the corner portions) of four sides of the main pad portion 16a. The sub pad portions 16b are formed at locations symmetrical with respect to the geometric center O1 of the main pad portion 16a.
【００３０】そして、このようなパッド１６の構造であ
っても、第１の実施形態と同様の作用効果を奏すること
はいうまでもない。ところで、相対する副パッド部１６
ｂの離間距離は、コーナー部分にそれらを設けた場合ほ
ど大きくはないため、得られる効果はおのずと第１の実
施形態に準じたものとなる。Needless to say, even with such a structure of the pad 16, the same operational effect as that of the first embodiment can be obtained. By the way, the opposing sub pad portion 16
Since the separation distance of b is not so large as when they are provided in the corner portion, the obtained effect is naturally the same as that of the first embodiment.
【００３１】なお、本発明は上記の実施形態のみに限定
されることはなく、例えば次のように変更することが可
能である。 （１）図７に示す別例１のパッド１７では、矩形状をし
た１つの主パッド部１７ａの４つの辺から、それぞれ副
パッド部１７ｂが突出している。しかし、副パッド部１
７ｂは、辺の中央部からいくぶんずれた位置に形成され
ている。なお、これらの副パッド部１７ｂは、主パッド
部１６ａの幾何学的中心Ｏ1 を基準として対称となるよ
うな箇所に形成されている。このような構成であっても
第１の実施形態に準ずる効果を奏する。The present invention is not limited to the above embodiment, and can be modified as follows, for example. (1) In the pad 17 of the modified example 1 shown in FIG. 7, the sub pad portions 17b project from the four sides of one main pad portion 17a having a rectangular shape. However, the sub pad 1
7b is formed at a position slightly displaced from the center of the side. The sub pad portions 17b are formed at positions symmetrical with respect to the geometric center O1 of the main pad portion 16a. Even with such a configuration, an effect similar to that of the first embodiment can be obtained.
【００３２】（２）図８に示す別例２のパッド１８で
は、矩形状をした主パッド部１８ａの各コーナー部分か
ら、円形状の副パッド部１８ｂが突出している。このよ
うな構成であると、第１の実施形態と同じ作用効果を奏
する。(2) In the pad 18 of the second example shown in FIG. 8, the circular sub pad portion 18b projects from each corner of the rectangular main pad portion 18a. With such a configuration, the same operational effects as those of the first embodiment can be obtained.
【００３３】（３）図９に示す別例３のパッド１９で
は、矩形状をした主パッド部１９ａのコーナー部分のう
ちの２つ及び辺のうちの１つから、副パッド部１９ｂが
突出している。従って、副パッド部１９ｂは１つ少ない
数（即ち３つ）になっており、しかも主パッド部１６ａ
の幾何学的中心Ｏ1 を基準として非対称となるような箇
所に形成されている。このような構成であっても第１の
実施形態に準ずる効果を奏する。つまり、非対称といえ
ども３方向から引っ張り力が働くからである。(3) In the pad 19 of another example 3 shown in FIG. 9, the sub pad portion 19b projects from two of the corner portions and one of the sides of the rectangular main pad portion 19a. There is. Therefore, the number of sub-pad portions 19b is one less (that is, three), and the main pad portion 16a is also present.
Is formed at a location that is asymmetric with respect to the geometric center O1 of. Even with such a configuration, an effect similar to that of the first embodiment can be obtained. That is, even if it is asymmetric, the pulling force acts from three directions.
【００３４】（４）主パッド部７ａ，１６ａ…の形状は
矩形状に限定されることはなく、スタッド６の底面６ａ
の形状に応じて、例えば円形、楕円形、その他の多角形
等に変更されることができる。(4) The shape of the main pad portions 7a, 16a ... Is not limited to the rectangular shape, and the bottom surface 6a of the stud 6 is not limited thereto.
The shape can be changed to, for example, a circle, an ellipse, or another polygon depending on the shape of the.
【００３５】（５）表面実装部品は、実施形態において
示したワイヤボンディング用のスタッド６に限定される
ことはなく、例えば抵抗溶接用のスタッド等であっても
よい。また、本発明のパッド構造は、スタッドばかりで
なくその他の表面実装部品等に適用されることができ
る。(5) The surface mount component is not limited to the stud 6 for wire bonding shown in the embodiment, but may be, for example, a stud for resistance welding. Further, the pad structure of the present invention can be applied not only to studs but also to other surface mount components and the like.
【００３６】ここで、特許請求の範囲に記載された技術
的思想のほかに、前述した実施形態によって把握される
技術的思想をその効果とともに以下に列挙する。 （１） 請求項１または２において、前記主パッド部は
矩形状であり、前記副パッド部はその主パッド部におけ
る各々の辺に設けられているパッド構造。この構成であ
ると、請求項３の効果には及ばないものの、それに準ず
る効果を奏することができる。Here, in addition to the technical ideas described in the claims, the technical ideas grasped by the above-described embodiments are listed below together with their effects. (1) The pad structure according to claim 1 or 2, wherein the main pad portion has a rectangular shape, and the sub pad portion is provided on each side of the main pad portion. With this configuration, although it does not reach the effect of claim 3, it is possible to obtain an effect similar to that.
【００３７】（２） 技術的思想（１）において、前記
各副パッド部の形状及び大きさは等しいパッド構造。こ
の構成であると、請求項４の効果には及ばないものの、
それに準ずる効果を奏することができる。(2) A pad structure according to the technical idea (1), in which the shape and size of each of the sub pad portions are the same. With this configuration, although it does not reach the effect of claim 4,
An effect similar to that can be achieved.
【００３８】なお、本明細書中において使用した技術用
語を次のように定義する。 「面方向： パッドが属する面に沿った方向をいう。」The technical terms used in the present specification are defined as follows. "Plane direction: The direction along the plane to which the pad belongs."
【００３９】[0039]
【発明の効果】以上詳述したように、請求項１〜４に記
載の発明によれば、表面実装部品の傾斜及び面方向への
位置ズレの双方を確実に防止することができるパッド構
造を提供することができる。請求項２に記載の発明によ
れば、前記の傾斜及び位置ズレをより確実に防止するこ
とができる。請求項３，４に記載の発明によれば、前記
の傾斜及び位置ズレをよりいっそう確実に防止すること
ができる。請求項５に記載の発明によれば、傾斜及び位
置ズレの双方が確実に防止されるため、ワイヤボンディ
ングを確実に実施することが可能となり、信頼性に優れ
た配線基板装置を実現することができる。As described above in detail, according to the inventions described in claims 1 to 4, the pad structure capable of reliably preventing both the inclination of the surface mount component and the positional deviation in the surface direction is provided. Can be provided. According to the invention described in claim 2, it is possible to more reliably prevent the inclination and the positional deviation. According to the invention described in claims 3 and 4, the inclination and the positional deviation can be prevented more reliably. According to the invention described in claim 5, since both the inclination and the positional deviation are surely prevented, it is possible to surely perform the wire bonding, and it is possible to realize a highly reliable wiring board device. it can.
【図１】第１の実施形態の配線基板装置を示す部分断面
図。FIG. 1 is a partial cross-sectional view showing a wiring board device according to a first embodiment.
【図２】同じく（ａ）はクリームはんだ塗布前の状態を
示す部分拡大平面図、（ｂ）は部分拡大断面図。2A is a partially enlarged plan view showing a state before application of cream solder, and FIG. 2B is a partially enlarged sectional view.
【図３】同じく（ａ）はクリームはんだ塗布後の状態を
示す部分拡大平面図、（ｂ）は部分拡大断面図。3A is a partially enlarged plan view showing a state after the cream solder is applied, and FIG. 3B is a partially enlarged sectional view.
【図４】同じく（ａ）は半導体チップの仮固定後の状態
を示す部分拡大平面図、（ｂ）は部分拡大断面図。FIG. 4A is a partially enlarged plan view showing a state after the semiconductor chip is temporarily fixed, and FIG. 4B is a partially enlarged sectional view.
【図５】同じく（ａ）はリフロー後の状態を示す部分拡
大平面図、（ｂ）は部分拡大断面図。5 (a) is a partially enlarged plan view showing a state after reflow, and FIG. 5 (b) is a partially enlarged sectional view.
【図６】第２の実施形態の配線基板装置を示す部分拡大
平面図。FIG. 6 is a partially enlarged plan view showing a wiring board device according to a second embodiment.
【図７】別例１の配線基板装置を示す部分拡大平面図。FIG. 7 is a partially enlarged plan view showing a wiring board device according to another example 1.
【図８】別例２の配線基板装置を示す部分拡大平面図。FIG. 8 is a partially enlarged plan view showing a wiring board device according to another example 2.
【図９】別例３の配線基板装置を示す部分拡大平面図。FIG. 9 is a partially enlarged plan view showing a wiring board device of Modified Example 3;
【図１０】（ａ）〜（ｅ）は従来の配線基板装置の問題
点を説明するための概略図。10 (a) to 10 (e) are schematic views for explaining problems of the conventional wiring board device.
【図１１】従来の配線基板装置の問題点を説明するため
の概略図。FIG. 11 is a schematic diagram for explaining a problem of a conventional wiring board device.
１…配線基板装置、２…基板、５…半導体チップ、６…
表面実装部品としてのスタッド、６ａ…被接合面として
の底面、７，１６，１７，１８，１９…パッド、７ａ，
１６ａ，１７ａ，１８ａ，１９ａ…主パッド部、７ｂ，
１６ｂ，１７ｂ，１８ｂ，１９ｂ…副パッド部、８…
（クリーム）はんだ、９…ボンディングワイヤ、Ｏ1 …
主パッド部の幾何学的中心。1 ... Wiring board device, 2 ... Substrate, 5 ... Semiconductor chip, 6 ...
Studs as surface mount parts, 6a ... Bottom surface as bonded surfaces, 7, 16, 17, 18, 19 ... Pads, 7a,
16a, 17a, 18a, 19a ... Main pad portion, 7b,
16b, 17b, 18b, 19b ... Sub pad portion, 8 ...
(Cream) Solder, 9 ... Bonding wire, O1 ...
The geometric center of the main pad.
Claims (5)
の構造であって、前記表面実装部品の被接合面とほぼ同
じ外形寸法を持つ主パッド部の複数箇所から副パッド部
を外方へ突出させたことを特徴とするパッド構造。1. A pad structure for surface-mounting a surface-mounted component, comprising: a plurality of main pad portions having substantially the same outer dimensions as a surface to be joined of the surface-mounted component, and sub-pad portions outwardly. Pad structure characterized by protruding.
何学的中心を基準として対称となるような箇所に形成さ
れている請求項１に記載のパッド構造。2. The pad structure according to claim 1, wherein each of the sub pad portions is formed at a position symmetrical with respect to a geometric center of the main pad portion.
ッド部はその主パッド部における各々のコーナー部分に
設けられている請求項２に記載のパッド構造。3. The pad structure according to claim 2, wherein the main pad portion has a rectangular shape, and the sub pad portion is provided at each corner portion of the main pad portion.
い請求項３に記載のパッド構造。4. The pad structure according to claim 3, wherein the sub pad portions have the same shape and size.
半導体チップの近傍に形成されたパッド上にはんだを介
して表面実装されたスタッドとの間を、ボンディングワ
イヤまたはリードの抵抗溶接によって接合してなる配線
基板装置において、 前記パッドを、前記スタッドの被接合面とほぼ同じ外形
寸法を持つ主パッド部の複数箇所から副パッド部を外方
へ突出してなるものとしたことを特徴とする配線基板装
置。5. A semiconductor chip mounted on a substrate and a stud surface-mounted on a pad formed in the vicinity of the semiconductor chip via solder are joined by resistance welding of bonding wires or leads. In the wiring board device according to the present invention, the pad is formed by projecting the sub pad portion outward from a plurality of locations of the main pad portion having substantially the same outer dimensions as the joined surface of the stud. Wiring board device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7263222A JPH09107173A (en) | 1995-10-11 | 1995-10-11 | Pad structure and wiring board device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7263222A JPH09107173A (en) | 1995-10-11 | 1995-10-11 | Pad structure and wiring board device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH09107173A true JPH09107173A (en) | 1997-04-22 |
Family
ID=17386484
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7263222A Pending JPH09107173A (en) | 1995-10-11 | 1995-10-11 | Pad structure and wiring board device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH09107173A (en) |
Cited By (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1997046059A1 (en) * | 1996-05-29 | 1997-12-04 | Rohm Co., Ltd. | Method for mounting terminal on circuit board and circuit board |
| US6225573B1 (en) | 1996-05-31 | 2001-05-01 | Rohm Co., Ltd. | Method for mounting terminal on circuit board and circuit board |
| JP2002353255A (en) * | 2001-05-30 | 2002-12-06 | Moric Co Ltd | Land pattern for soldering semiconductor chip |
| JP2008288311A (en) * | 2007-05-16 | 2008-11-27 | Casio Hitachi Mobile Communications Co Ltd | Land shape |
| WO2009151123A1 (en) * | 2008-06-12 | 2009-12-17 | 三菱マテリアル株式会社 | Method for joining substrate and object to be mounted using solder paste |
| JP2010056399A (en) * | 2008-08-29 | 2010-03-11 | Mitsubishi Materials Corp | Method of joining substrate and object to be mounted using solder paste having excellent registration |
| JP2012080141A (en) * | 2012-01-25 | 2012-04-19 | Nec Casio Mobile Communications Ltd | Soldering structure and electronic apparatus with soldering structure |
| JP2012222128A (en) * | 2011-04-08 | 2012-11-12 | Nichicon Corp | Power module |
| JP2014107541A (en) * | 2012-11-29 | 2014-06-09 | Samsung Display Co Ltd | Circuit board and method of mounting electronic component on circuit board |
| US8810016B2 (en) | 2005-06-06 | 2014-08-19 | Rohm Co., Ltd. | Semiconductor device, substrate and semiconductor device manufacturing method |
| US20150245483A1 (en) * | 2014-02-27 | 2015-08-27 | Nissin Kogyo Co., Ltd. | Circuit board and vehicle brake hydraulic pressure control unit |
| JP2016096322A (en) * | 2014-11-07 | 2016-05-26 | 日亜化学工業株式会社 | Light emission device |
| BE1023875B1 (en) * | 2016-07-14 | 2017-08-31 | C-Mac Electromag Bvba | Improved solder pattern and method for checking for even melting of solder |
| JP2017212354A (en) * | 2016-05-26 | 2017-11-30 | ローム株式会社 | LED module |
| JP2018500752A (en) * | 2014-12-19 | 2018-01-11 | ウォーカー マイロンWALKER, Myron | Spoked solder pads for improved solderability and self-alignment of integrated circuit packages |
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|---|---|---|---|---|
| WO1997046059A1 (en) * | 1996-05-29 | 1997-12-04 | Rohm Co., Ltd. | Method for mounting terminal on circuit board and circuit board |
| US6175086B1 (en) | 1996-05-29 | 2001-01-16 | Rohm Co., Ltd. | Method for mounting terminal on circuit board and circuit board |
| US6225573B1 (en) | 1996-05-31 | 2001-05-01 | Rohm Co., Ltd. | Method for mounting terminal on circuit board and circuit board |
| JP2002353255A (en) * | 2001-05-30 | 2002-12-06 | Moric Co Ltd | Land pattern for soldering semiconductor chip |
| US8810016B2 (en) | 2005-06-06 | 2014-08-19 | Rohm Co., Ltd. | Semiconductor device, substrate and semiconductor device manufacturing method |
| US9520374B2 (en) | 2005-06-06 | 2016-12-13 | Rohm Co., Ltd. | Semiconductor device, substrate and semiconductor device manufacturing method |
| JP2008288311A (en) * | 2007-05-16 | 2008-11-27 | Casio Hitachi Mobile Communications Co Ltd | Land shape |
| WO2009151123A1 (en) * | 2008-06-12 | 2009-12-17 | 三菱マテリアル株式会社 | Method for joining substrate and object to be mounted using solder paste |
| JP2010056399A (en) * | 2008-08-29 | 2010-03-11 | Mitsubishi Materials Corp | Method of joining substrate and object to be mounted using solder paste having excellent registration |
| JP2012222128A (en) * | 2011-04-08 | 2012-11-12 | Nichicon Corp | Power module |
| JP2012080141A (en) * | 2012-01-25 | 2012-04-19 | Nec Casio Mobile Communications Ltd | Soldering structure and electronic apparatus with soldering structure |
| JP2014107541A (en) * | 2012-11-29 | 2014-06-09 | Samsung Display Co Ltd | Circuit board and method of mounting electronic component on circuit board |
| CN104883816A (en) * | 2014-02-27 | 2015-09-02 | 日信工业株式会社 | Circuit Board And Vehicle Brake Hydraulic Pressure Control Unit |
| US20150245483A1 (en) * | 2014-02-27 | 2015-08-27 | Nissin Kogyo Co., Ltd. | Circuit board and vehicle brake hydraulic pressure control unit |
| EP2914072B1 (en) * | 2014-02-27 | 2021-11-03 | Autoliv Nissin Brake Systems Japan Co., Ltd. | Circuit board and vehicle brake hydraulic pressure control unit |
| US9821787B2 (en) * | 2014-02-27 | 2017-11-21 | Autoliv Nissin Brake Systems Japan Co., Ltd. | Circuit board and vehicle brake hydraulic pressure control unit |
| JP2016096322A (en) * | 2014-11-07 | 2016-05-26 | 日亜化学工業株式会社 | Light emission device |
| USD845368S1 (en) | 2014-12-19 | 2019-04-09 | Myron Walker | Spoked solder pad |
| JP2018500752A (en) * | 2014-12-19 | 2018-01-11 | ウォーカー マイロンWALKER, Myron | Spoked solder pads for improved solderability and self-alignment of integrated circuit packages |
| US10134696B2 (en) | 2014-12-19 | 2018-11-20 | Myron Walker | Spoked solder pad to improve solderability and self-alignment of integrated circuit packages |
| USD845369S1 (en) | 2014-12-19 | 2019-04-09 | Myron Walker | Spoked solder pad |
| JP2017212354A (en) * | 2016-05-26 | 2017-11-30 | ローム株式会社 | LED module |
| BE1023875B1 (en) * | 2016-07-14 | 2017-08-31 | C-Mac Electromag Bvba | Improved solder pattern and method for checking for even melting of solder |
| JP2018022742A (en) * | 2016-08-02 | 2018-02-08 | 日亜化学工業株式会社 | Light emitting device |
| US10243125B2 (en) | 2016-08-02 | 2019-03-26 | Nichia Corporation | Light emitting device |
| JP2020068285A (en) * | 2018-10-24 | 2020-04-30 | スタンレー電気株式会社 | Semiconductor light-emitting device and method of manufacturing the same |
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