JP2976442B2 - Method of forming insulating film - Google Patents

Method of forming insulating film

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Publication number
JP2976442B2
JP2976442B2 JP1160092A JP16009289A JP2976442B2 JP 2976442 B2 JP2976442 B2 JP 2976442B2 JP 1160092 A JP1160092 A JP 1160092A JP 16009289 A JP16009289 A JP 16009289A JP 2976442 B2 JP2976442 B2 JP 2976442B2
Authority
JP
Japan
Prior art keywords
film
sio
gas
insulating film
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP1160092A
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Japanese (ja)
Other versions
JPH0324268A (en
Inventor
淳一 佐藤
雅和 室山
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Sony Corp
Original Assignee
Sony Corp
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Publication of JPH0324268A publication Critical patent/JPH0324268A/en
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  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、絶縁膜の形成方法に関し、更に詳しくは、
バイアスECRプラズマCVD法により段差を有する基体もし
くは半導体基板に接する面に、低ストレス化され、且つ
段差部への密着性を高めた絶縁膜の形成方法に係るもの
である。
The present invention relates to a method for forming an insulating film, and more particularly, to a method for forming an insulating film.
The present invention relates to a method for forming an insulating film on a surface in contact with a substrate having a step or a semiconductor substrate by a bias ECR plasma CVD method, which has reduced stress and has improved adhesion to a step.

[発明の概要] 本発明は、段差を有する半導体基板に接する絶縁膜の
形成方法であって、上記絶縁膜はバイアスECRプラズマC
VD法により形成され、第1工程としてSiO2膜を形成した
後に、第2工程としてSiNX膜を形成することにより、 段差部への密着性の高い絶縁膜を形成することを可能
にするようにしたものであり、例えばトレンチアイソレ
ーションにおけるトレンチ内壁への密着性を改善し、リ
ーク電流の低減を図ることが可能となる。
SUMMARY OF THE INVENTION The present invention is a method for forming an insulating film in contact with a semiconductor substrate having a step, wherein the insulating film is formed by a bias ECR plasma C
By forming the SiO 2 film as the first step and then forming the SiN x film as the second step by the VD method, it is possible to form an insulating film having high adhesion to the step portion. For example, it is possible to improve the adhesion to the inner wall of the trench in the trench isolation, and to reduce the leak current.

[従来の技術] バイアスECRプラズマCVD法は、デバイスの高集積化が
今後、増々進む中で、層間膜の平坦化の要求に応え得る
重要な技術となりつつある。即ち、バイアスECRプラズ
マCVD法は、低圧で高密度プラズマを形成できるため、
アスペクト比の高い溝,段差へも高速で膜成長可能なう
え、ウエハにRFバイアスを印加することにより余分な膜
をエッチング除去することが出来、同一装置内で平坦化
絶縁膜を形成出来る利点がある。しかも、このCVD法
は、低温プラズマを用いるため、低温成長が可能であ
る。
[Prior Art] The bias ECR plasma CVD method is becoming an important technology capable of meeting the demand for the planarization of an interlayer film, as the degree of integration of devices increases in the future. That is, the bias ECR plasma CVD method can form high-density plasma at low pressure,
It has the advantage of being able to grow a film at high speed even on grooves and steps with a high aspect ratio, and to remove excess film by applying RF bias to the wafer and to form a planarized insulating film in the same device. is there. In addition, since the CVD method uses low-temperature plasma, low-temperature growth is possible.

この種のバイアスECRプラズマCVD法としては、特開昭
63−80538号公報記載のものが知られている。この技術
は、シラン(SiH4)ガスと酸素(O2)ガスを反応ガスと
して用い、SiO2膜をエッチングして平坦化しながら堆積
させるようにし、また、基板にバイアス電圧を印加し、
アルゴン(Ar)よりも質量の重い不活性ガスを用いるこ
とにより、横方向のエッチング速度を大きくし、平坦化
処理時間を短縮するようにしたものである。
This type of bias ECR plasma CVD method is disclosed in
The one described in JP-A-63-80538 is known. This technology uses silane (SiH 4 ) gas and oxygen (O 2 ) gas as reaction gases, etches and deposits a SiO 2 film while flattening it, and applies a bias voltage to the substrate,
By using an inert gas having a larger mass than argon (Ar), the etching rate in the horizontal direction is increased, and the time required for the planarization process is reduced.

斯るバイアスECRプラズマCVD法の特徴を生かして、例
えば素子間分離領域にトレンチを形成し、そのトレンチ
内にバイアスECRプラズマCVD法で、SiO2などの絶縁膜を
埋め込もうという研究開発が近年行なわれている。
In recent years, research and development to take advantage of the characteristics of such a bias ECR plasma CVD method, for example, to form a trench in an element isolation region and bury an insulating film such as SiO 2 in the trench by the bias ECR plasma CVD method. Is being done.

[発明が解決しようとする課題] しかしながら、このような従来の絶縁膜の形成方法に
あっては、バイアスECRプラズマCVDの反応ガスとしてSi
H4とO2を用いるが、堆積した絶縁膜のストレスが比較的
大きいため、トレンチ埋込み後に、デバイス形成過程で
加わる熱処理等により、基体結晶に欠陥を誘起したり、
埋込み膜にクラックが生じ易いという問題点があった。
[Problems to be Solved by the Invention] However, in such a conventional method for forming an insulating film, Si is used as a reactive gas for bias ECR plasma CVD.
Although H 4 and O 2 are used, the stress of the deposited insulating film is relatively large, so that defects may be induced in the base crystal by heat treatment applied during the device formation process after filling the trench,
There is a problem that cracks are easily generated in the embedded film.

本発明は、このような従来の問題点に着目して創案さ
れたものであって、段差に埋め込む絶縁膜の低ストレス
化を期し得るようにしたものである。
The present invention has been made in view of such conventional problems, and is intended to reduce the stress of an insulating film embedded in a step.

[課題を解決するための手段] 本発明は、段差を有する半導体基板に接する絶縁膜の
形成方法であって、上記絶縁膜を形成するにあたり、第
1工程としてバイアスECRプラズマCVD法で圧縮応力を有
するSiO2膜を形成した後に、第2工程としてバイアスEC
RプラズマCVD法により引張り応力を有するSiNX膜を形成
することにより、上記SiO2膜の圧縮応力を緩和すること
を、その解決手段としている。
[Means for Solving the Problems] The present invention is a method for forming an insulating film in contact with a semiconductor substrate having a step, and in forming the insulating film, compressive stress is reduced by a bias ECR plasma CVD method as a first step. After forming a SiO 2 film having a bias EC
The solution is to relax the compressive stress of the SiO 2 film by forming a SiN X film having a tensile stress by the R plasma CVD method.

[作用] 本発明においては、SiO2膜を形成した後、シリコン窒
化膜(SiNX)を形成することにより、SiO2膜の圧縮応力
を、SiNX膜の引張り応力で緩和し、基体側へ応力を及ぼ
すのを防止する。このため、例えばトレンチ部でのリー
ク電流を低減し、高アスペクト比のトレンチ埋込みを可
能にする。
[Operation] In the present invention, after forming the SiO 2 film, the silicon nitride film (SiN x ) is formed, so that the compressive stress of the SiO 2 film is relaxed by the tensile stress of the SiN X film, and the silicon substrate is moved toward the substrate. Prevent stress. For this reason, for example, the leakage current in the trench portion is reduced, and the trench with a high aspect ratio can be embedded.

[実施例] 以下、本発明に係る絶縁膜の形成方法の詳細を図面に
示す実施例に基づいて説明する。
EXAMPLES Hereinafter, details of a method for forming an insulating film according to the present invention will be described based on examples shown in the drawings.

(第1実施例) 第1図A〜第1図Cは、本発明の第1実施例の工程を
示す断面図である。
(First Embodiment) FIGS. 1A to 1C are cross-sectional views showing steps of a first embodiment of the present invention.

先ず、第1図Aに示すように、基体としてのシリコン
基板1の表面に、リソグラフィー技術及びドライエッチ
ング技術を用いて、段差としてのトレンチ1aを形成した
後、該トレンチ1a内壁面及びシリコン基板1表面に熱酸
化を行ない、酸化膜2を100〜200Å程度の厚さに形成す
る。
First, as shown in FIG. 1A, a trench 1a as a step is formed on the surface of a silicon substrate 1 as a base by using a lithography technique and a dry etching technique, and then the inner wall surface of the trench 1a and the silicon substrate 1 are formed. Thermal oxidation is performed on the surface to form an oxide film 2 having a thickness of about 100 to 200 °.

次に第1工程として、第1図Bに示すように、シラン
(SiH4)ガスと酸化二窒素(N2O)ガスを反応ガスとし
て用いて、バイアスECRプラズマCVD法を行ない絶縁膜と
しての第1次SiO2膜3を約500〜3000Åの膜厚に形成す
る。このバイアスECRプラズマCVD法の条件としては、Si
H4ガスの流量を20SCCM,N2Oガスの流量40SCCM、圧力を5
×10-3Torr、マイクロ波電力を800W、RFバイアスを300W
に設定した。
Next, as a first step, as shown in FIG. 1B, using a silane (SiH 4 ) gas and a dinitrogen oxide (N 2 O) gas as a reaction gas, a bias ECR plasma CVD method is performed to form an insulating film. A first SiO 2 film 3 is formed to a thickness of about 500 to 3000 °. Conditions for this bias ECR plasma CVD method include Si
The H 4 gas flow rate is 20 SCCM, the N 2 O gas flow rate is 40 SCCM, and the pressure is 5
× 10 -3 Torr, microwave power 800W, RF bias 300W
Set to.

次に第2工程として、第1図Cに示すように、反応ガ
スをSiH3ガスと酸素(O2)ガスとアルゴン(Ar)ガスに
代えてバイアスECRプラズマCVDを行ない、第2次SiO2
4を埋め込み平坦化を行なう。なお、このバイアスECR
プラズマCVDの条件は、SiH4ガスの流量を20SCCM,O2ガス
の流量を4SCCM,アルゴンガスの流量を10SCCMとし、圧力
を5×10-3Torr、マイクロ波電力を800W、RFバイアスを
300Wに設定した。
Next, as a second step, as shown in FIG. 1C, bias ECR plasma CVD is performed by replacing the reaction gas with SiH 3 gas, oxygen (O 2 ) gas, and argon (Ar) gas, thereby forming a second SiO 2 gas. The film 4 is buried and flattened. Note that this bias ECR
The plasma CVD conditions were as follows: SiH 4 gas flow rate was 20 SCCM, O 2 gas flow rate was 4 SCCM, argon gas flow rate was 10 SCCM, pressure was 5 × 10 -3 Torr, microwave power was 800 W, and RF bias was
Set to 300W.

上記した第1次SiO2膜3は、約1×109dyne/cm2以下
の低ストレス化を期し得るものであり、第2次SiO2膜4
の応力が約2×109dyne/cm2と比較的高ストレスであっ
ても第1次SiO2膜3からシリコン基板1側へ応力を及ぼ
すことを防止出来る。
Primary SiO 2 film 3 described above are those capable sake of about 1 × 10 9 dyne / cm 2 or lower stressed, secondary SiO 2 film 4
Even if the stress is relatively high, about 2 × 10 9 dyne / cm 2 , it is possible to prevent the stress from being applied from the primary SiO 2 film 3 to the silicon substrate 1 side.

このようにして形成されたトレンチ1のSiO2膜(第1
次SiO26膜3及び第2次SiO2膜4)は全体として低スト
レス化が図れるため、デバイス形成過程で行なわれる熱
処理を経ても、シリコン基板1の結晶に欠陥を生じた
り、SiO2膜にクラックが生じたりすることがない。
The SiO 2 film of the trench 1 thus formed (first
Since the secondary SiO 2 film 3 and the secondary SiO 2 film 4) can be reduced in stress as a whole, even after the heat treatment performed in the device forming process, defects occur in the crystal of the silicon substrate 1 or the SiO 2 film No cracks occur on the surface.

(第2実施例) 第2図A〜第2図Cは、本発明に係る絶縁膜の形成方
法の第2実施例の工程を示す断面図である。先ず、第2
図Aに示すように、シリコン基板1の表面に、リソグラ
フィー技術及びドライエッチング技術を用いて、トレン
チ1aを形成した後、熱酸化を行なって該トレンチ1a内壁
面及びシリコン基板1表面に酸化膜2を100〜200Å程度
の厚さに形成する。
Second Embodiment FIGS. 2A to 2C are cross-sectional views showing steps of a second embodiment of the method for forming an insulating film according to the present invention. First, the second
As shown in FIG. A, a trench 1a is formed on the surface of a silicon substrate 1 by using lithography and dry etching techniques, and then thermal oxidation is performed to form an oxide film 2 on the inner wall surface of the trench 1a and the surface of the silicon substrate 1. Is formed to a thickness of about 100 to 200 mm.

次に、第2図Bに示すように、反応ガスとしてシラン
(SiH4)ガスと酸素(O2)ガスを用いて、バイアスECR
プラズマCVDを行ないトレンチ1a内及びシリコン基板1
上にSiO2膜5を形成する。このCVDの条件としては、SiH
4ガスの流量を20SCCM,O2ガスを20SCCM、圧力を5×10-3
Torr、マイクロ波電力を800W、RFバイアスを300Wに設定
した。この条件でSiO2膜5を500〜3000Å程度の厚さに
形成した後、圧力,マイクロ波電力及びRFバイアスを同
一条件に保ったままSiH4の流量比を小さくして、さら
に、SiO2膜5の堆積、平坦化をバイアスECRプラズマCVD
によって行う(第2図C)。この場合、SiH4ガスを20SC
CM,O2ガスの流量を40SCCM,アルゴンガスを10SCCMの流量
とした。
Next, as shown in FIG. 2B, a silane (SiH 4 ) gas and an oxygen (O 2 ) gas are used as reaction gases, and a bias ECR is used.
Perform plasma CVD in trench 1a and silicon substrate 1
An SiO 2 film 5 is formed thereon. The conditions for this CVD are SiH
4 gas flow rate 20SCCM, O 2 gas 20SCCM, pressure 5 × 10 -3
Torr, microwave power was set to 800W and RF bias was set to 300W. After forming the SiO 2 film 5 with a thickness of about 500~3000Å in this condition, the pressure, by reducing the flow rate ratio remains SiH 4 was kept microwave power and RF bias to the same conditions, further, SiO 2 film 5 deposition and planarization biased ECR plasma CVD
(FIG. 2C). In this case, the SiH 4 gas is
The flow rates of CM and O 2 gas were 40 SCCM, and the flow rate of argon gas was 10 SCCM.

上記したように、SiH4ガスの流量比を段階的に小さく
したが、連続的にSiH4ガスの流量比を小さくするように
してもよい。即ち、トレンチ1a内壁を覆うSiO2膜形成時
のSiH4の流量比が大きければ(SiH4ガスとO2ガスとの流
量比が1:1程度)、充分に低ストレス化を図ることが可
能である。
As described above, the flow ratio of the SiH 4 gas is reduced stepwise, but the flow ratio of the SiH 4 gas may be reduced continuously. In other words, if the flow ratio of SiH 4 is large when the SiO 2 film covering the inner wall of the trench 1a is formed (the flow ratio of SiH 4 gas to O 2 gas is about 1: 1), it is possible to sufficiently reduce stress. It is.

なお、本実施例においては、アルゴンガスを加えた
が、他の不活性ガスを加えてもよい。
In this embodiment, the argon gas is added, but another inert gas may be added.

(第3実施例) 第3図A〜第3図Cは、本発明の第3実施例の工程を
示す断面図である。
Third Embodiment FIGS. 3A to 3C are cross-sectional views showing steps of a third embodiment of the present invention.

先ず、第3図Aに示すように、シリコン基板1のトレ
ンチ1aの内壁及びシリコン基板1表面を熱酸化により酸
化膜2を形成する。
First, as shown in FIG. 3A, an oxide film 2 is formed on the inner wall of the trench 1a of the silicon substrate 1 and the surface of the silicon substrate 1 by thermal oxidation.

次に第1工程として、第3図Bに示すように、反応ガ
スとしてSiH4ガスとO2ガスを用いてバイアスECRプラズ
マCVDを行ないSiO2膜5を500〜3000Å程度の膜厚で形成
する。このSiO2膜5は、圧縮応力を有する。このCVDの
条件は、ガス流量をSiH4/O2=20/40SCCM,圧力を5×10
-3Torr、マイクロ波電力を800W、RFバイアスを300Wに設
定した。
Next, as a first step, as shown in FIG. 3B, a bias ECR plasma CVD is performed using SiH 4 gas and O 2 gas as reaction gases to form an SiO 2 film 5 with a thickness of about 500 to 3000 °. . This SiO 2 film 5 has a compressive stress. The conditions of this CVD are as follows: gas flow rate is SiH 4 / O 2 = 20/40 SCCM, pressure is 5 × 10
-3 Torr, microwave power set to 800W, RF bias set to 300W.

次に、第2工程として、第3図にCに示すように、バ
イアスECRプラズマCVD法により、窒化シリコン(SiNX
膜6を平坦化、形成する。なお、このCVDの条件は、反
応ガスの流量をSiH4/O2=20/60SCCM、圧力を5×10-3To
rr、マイクロ波電力を800W、RFバイアスを300Wに設定し
た。
Next, as a second step, as shown in FIG. 3C, silicon nitride (SiN x ) is formed by a bias ECR plasma CVD method.
The film 6 is flattened and formed. The CVD conditions were as follows: the flow rate of the reaction gas was SiH 4 / O 2 = 20/60 SCCM, and the pressure was 5 × 10 −3 To
rr, microwave power was set to 800W and RF bias was set to 300W.

なお、この窒化シリコン膜6は、引張り応力を有し、
上記SiO2膜の圧縮応力を緩和する。
The silicon nitride film 6 has a tensile stress,
The compressive stress of the SiO 2 film is reduced.

本実施例では、SiO2膜5とSiNX膜6の2層としたが、
トレンチ1aの内壁に密着する層がSiO2膜であれば、窒化
シリコン膜との多層構造としてもよい。また、SiO2膜5
とSiNX膜6の成膜工程を、反応ガスを徐々に代えること
により連続的に形成してもよい。この場合、例えば、Si
H4ガスの流量を20SCCMに保ち、O2ガスを40SCCMから0SCC
Mに変化させ、同時にN2ガスを「0」から60SCCMに変化
させることにより、連続的なバイアスECRプラズマCVDが
可能となる。このように連続的に絶縁膜を形成した場
合、2層のものに比べてSiO2膜とSiNX膜の密着性が改善
される。また、シリコン基板1の温度等を制御すること
により、さらに、膜質を向上することが可能である。
In the present embodiment, two layers of the SiO 2 film 5 and the SiN X film 6 are used.
If the layer that adheres to the inner wall of the trench 1a is an SiO 2 film, a multilayer structure with a silicon nitride film may be used. Also, the SiO 2 film 5
The step of forming the SiN X film 6 may be performed continuously by gradually changing the reaction gas. In this case, for example, Si
Maintaining the flow rate of H 4 gas to 20SCCM, 0SCC O 2 gas from 40SCCM
By changing to M and simultaneously changing the N 2 gas from “0” to 60 SCCM, continuous bias ECR plasma CVD becomes possible. When the insulating film is continuously formed as described above, the adhesion between the SiO 2 film and the SiN X film is improved as compared with the case where the insulating film is formed in two layers. Further, by controlling the temperature and the like of the silicon substrate 1, it is possible to further improve the film quality.

本実施例によれば、SiO2膜のみでトレンチ埋込みを行
なうよりも、リーク電流等を低減化し、トレンチ分離能
の良好なアイソレーションを高アスペクト比のトレンチ
においても実現することが可能となる。
According to the present embodiment, it is possible to reduce leakage current and the like and to achieve good isolation of trenches even in trenches having a high aspect ratio, as compared with the case where trenches are buried only with the SiO 2 film.

[発明の効果] 以上の説明から明らかなように、本発明に係る絶縁膜
の形成方法によれば、段差部、特にトレンチに埋め込ま
れた絶縁膜の低ストレス化を図ることが可能となり、デ
バイス形成過程において熱処理を施しても基体結晶に欠
陥が生じることがなく、例えばリーク電流等を低減した
良好な特性を有する効果がある。更に本発明によれば、
半導体基板の段差部へ密着性の高い絶縁膜を形成するこ
とができるため、トレンチアイソレーションにおけるト
レンチ内壁への密着性を改善してリーク電流の低減を図
ることができる。
[Effects of the Invention] As is clear from the above description, according to the method for forming an insulating film according to the present invention, it is possible to reduce the stress of the step portion, particularly the insulating film embedded in the trench, and to reduce the device stress. Defects do not occur in the base crystal even when heat treatment is performed in the formation process, and for example, there is an effect of having good characteristics such as a reduction in leak current. Further according to the invention,
Since an insulating film having high adhesion can be formed on the step portion of the semiconductor substrate, the adhesion to the inner wall of the trench in the trench isolation can be improved, and the leakage current can be reduced.

【図面の簡単な説明】[Brief description of the drawings]

第1図A〜第1図Cは本発明に係る絶縁膜の形成方法の
第1実施例の工程を示す断面図、第2図A〜第2図Cは
同第2実施例の工程を示す断面図、第3図A〜第3図C
は同第3実施例の工程を示す断面図である。 1……シリコン基板、1a……トレンチ、2……酸化膜、
3……第1次SiO2膜、4……第2次SiO2膜、5……SiO2
膜、6……SiNX膜。
1A to 1C are cross-sectional views showing steps of a first embodiment of a method for forming an insulating film according to the present invention, and FIGS. 2A to 2C show steps of the second embodiment. Sectional views, FIGS. 3A-3C
FIG. 9 is a cross-sectional view showing a step of the third embodiment. 1 ... silicon substrate, 1a ... trench, 2 ... oxide film,
3 ...... primary SiO 2 film, 4 ...... secondary SiO 2 film, 5 ...... SiO 2
Film 6, SiN X film.

フロントページの続き (58)調査した分野(Int.Cl.6,DB名) H01L 21/316,21/318 Continuation of front page (58) Field surveyed (Int.Cl. 6 , DB name) H01L 21 / 316,21 / 318

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】段差を有する半導体基板に接する絶縁膜の
形成方法であって、上記絶縁膜を形成するにあたり、第
1工程としてバイアスECRプラズマCVD法で圧縮応力を有
するSiO2膜を形成した後に、第2工程としてバイアスEC
RプラズマCVD法により引張り応力を有するSiNX膜を形成
することにより、上記SiO2膜の圧縮応力を緩和すること
を特徴とする絶縁膜の形成方法。
1. A method for forming the insulating film in contact with the semiconductor substrate having a step, in forming the insulating film, after forming a SiO 2 film having a bias ECR plasma CVD process in the compression stress as the first step Bias EC as the second step
A method for forming an insulating film, wherein a compressive stress of the SiO 2 film is reduced by forming a SiN X film having a tensile stress by an R plasma CVD method.
JP1160092A 1989-06-22 1989-06-22 Method of forming insulating film Expired - Fee Related JP2976442B2 (en)

Priority Applications (1)

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JP1160092A JP2976442B2 (en) 1989-06-22 1989-06-22 Method of forming insulating film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1160092A JP2976442B2 (en) 1989-06-22 1989-06-22 Method of forming insulating film

Publications (2)

Publication Number Publication Date
JPH0324268A JPH0324268A (en) 1991-02-01
JP2976442B2 true JP2976442B2 (en) 1999-11-10

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Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0539804B1 (en) * 1991-10-15 1998-03-04 Canon Kabushiki Kaisha A substrate for a liquid jet recording head, a manufacturing method for such a substrate, a liquid jet recording head, and a liquid jet recording apparatus
CN102549729B (en) * 2009-12-16 2015-01-07 国家半导体公司 Stress compensation for large area gallium nitride or other nitride-based structures on semiconductor substrates
JP7141056B2 (en) * 2018-08-30 2022-09-22 富士電機株式会社 Gallium nitride semiconductor device and method for manufacturing gallium nitride semiconductor device

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