JPH0745610A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH0745610A
JPH0745610A JP18603493A JP18603493A JPH0745610A JP H0745610 A JPH0745610 A JP H0745610A JP 18603493 A JP18603493 A JP 18603493A JP 18603493 A JP18603493 A JP 18603493A JP H0745610 A JPH0745610 A JP H0745610A
Authority
JP
Japan
Prior art keywords
silicon nitride
nitride film
stress
internal stress
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18603493A
Other languages
Japanese (ja)
Inventor
Toshitaka Tatsunari
利貴 立成
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP18603493A priority Critical patent/JPH0745610A/en
Publication of JPH0745610A publication Critical patent/JPH0745610A/en
Pending legal-status Critical Current

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To prevent the stress migration in the wiring by forming a two-layer of silicon nitride films having different internal stress. CONSTITUTION:A silicon oxide film 2 is formed over the silicon substrate 1, and aluminum is deposited on the oxide film by sputtering. Thereafter the aluminum wiring 3 is formed by lithography techniques. Next, the silicon nitride film 4 with a tensile internal stress is formed as a protective film, and a silicon nitride film 5 with a compressive internal stress is formed on the silicon nitride film by plasma CVD.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体装置の製造方法に
係わり、特に半導体装置の保護膜あるいは層間絶縁膜の
形成方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming a protective film or an interlayer insulating film for a semiconductor device.

【0002】[0002]

【従来の技術】近年、半導体装置の配線を形成した後の
保護膜や層間絶縁膜としてプラズマCVD法によって形
成した窒化シリコン膜が用いられている。窒化シリコン
膜は、耐湿性、機械的強度に優れており、汚染源(Na
イオン等)に対する保護膜となる等の長所を持ってい
る。
2. Description of the Related Art In recent years, a silicon nitride film formed by a plasma CVD method has been used as a protective film or an interlayer insulating film after forming wirings of a semiconductor device. The silicon nitride film has excellent moisture resistance and mechanical strength, and is a source of pollution (Na
It has the advantage of being a protective film against ions, etc.).

【0003】プラズマCVD法によって形成される窒化
シリコン膜は、反応室内にシランガス、アンモニアガ
ス、窒素ガスを供給し、その後、電極間に高周波電圧を
印加してプラズマを発生させ、励起状態になった分子が
反応することによって形成される。
The silicon nitride film formed by the plasma CVD method is supplied with silane gas, ammonia gas, and nitrogen gas in the reaction chamber, and then a high-frequency voltage is applied between the electrodes to generate plasma and become excited. It is formed by the reaction of molecules.

【0004】[0004]

【発明が解決しようとする課題】上記従来のプラズマC
VD法による窒化シリコン膜では、膜自体に1×108
〜109ダイン/cm2程度の高い圧縮応力が発生してい
る。従って、この窒化シリコン膜を保護膜として配線上
に形成した場合、配線がストレスマイグレーションを起
こすという問題点があった。
The above-mentioned conventional plasma C
In the case of a silicon nitride film formed by the VD method, the film itself has 1 × 10 8
High compressive stress of about 10 9 dynes / cm 2 is generated. Therefore, when this silicon nitride film is formed on the wiring as a protective film, there is a problem that the wiring causes stress migration.

【0005】[0005]

【課題を解決するための手段】上記課題を解決するため
に本発明の半導体装置の製造方法は、半導体基板の主面
上に配線を形成する工程と、前記配線上にプラズマCV
D法により窒化シリコン膜を形成するにあたり、前記窒
化シリコン膜が、内部応力が圧縮応力である第1の窒化
シリコン膜と内部応力が引っ張り応力である第2の窒化
シリコン膜とで構成されている。
In order to solve the above problems, a method of manufacturing a semiconductor device according to the present invention comprises a step of forming wiring on the main surface of a semiconductor substrate, and a plasma CV on the wiring.
When forming a silicon nitride film by the D method, the silicon nitride film is composed of a first silicon nitride film whose internal stress is compressive stress and a second silicon nitride film whose internal stress is tensile stress. .

【0006】[0006]

【作用】この発明に係わる半導体装置の製造方法によれ
ば、窒化シリコン膜の内部応力を圧縮応力の窒化シリコ
ン膜と内部応力が引っ張り応力でほぼ相殺することがで
きるので、これを保護膜として配線上に形成した場合、
前記の配線がストレスマイグレーションを起こすという
問題点を解決することができる。
According to the method of manufacturing a semiconductor device according to the present invention, the internal stress of the silicon nitride film and the internal stress of the compressive stress can be almost canceled by the tensile stress. When formed on,
It is possible to solve the problem that the wiring causes stress migration.

【0007】[0007]

【実施例】図1は本発明の実施例を説明するための工程
順に示した半導体装置の断面図である。本実施例は、ア
ルミニウム配線の保護膜として、プラズマCVD法によ
る圧縮応力の窒化シリコン膜と内部応力が引っ張り応力
の窒化シリコン膜とを用いた例である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a sectional view of a semiconductor device showing steps in order to explain an embodiment of the present invention. The present embodiment is an example in which a silicon nitride film having a compressive stress and a silicon nitride film having a tensile stress as an internal stress are used by the plasma CVD method as a protective film for aluminum wiring.

【0008】まず、図1(a)に示すように、シリコン
基板1の上に、酸化シリコン膜2を形成する。この上に
スパッタ法によりアルミニウムを形成する。この後、リ
ソグラフィー技術を用いてアルミニウム配線3を形成す
る。次に、図1(b)に示すように保護膜としてプラズ
マCVD法により、内部応力が引っ張り応力の窒化シリ
コン膜4を形成し、続いて、内部応力が圧縮応力の窒化
シリコン膜5を連続して形成する。この時、形成する窒
化シリコン膜は、シランガス、アンモニアガス、窒素ガ
スを反応室に供給し、高周波電力を印加する。この際、
窒化シリコン膜の内部応力の制御は、高周波電力の印加
電力でのみ制御される。
First, as shown in FIG. 1A, a silicon oxide film 2 is formed on a silicon substrate 1. Aluminum is formed on this by sputtering. After that, the aluminum wiring 3 is formed by using the lithography technique. Next, as shown in FIG. 1B, a silicon nitride film 4 having an internal stress of tensile stress is formed as a protective film by a plasma CVD method, and subsequently, a silicon nitride film 5 having an internal stress of compressive stress is continuously formed. To form. At this time, for the silicon nitride film to be formed, silane gas, ammonia gas, and nitrogen gas are supplied to the reaction chamber, and high frequency power is applied. On this occasion,
The internal stress of the silicon nitride film is controlled only by the high frequency power applied.

【0009】ここで、内部応力が引っ張り応力の窒化シ
リコン膜4の形成条件は、 シランガス流量 ; 150sccm アンモニアガス流量; 50sccm 窒素ガス流量 ;3500sccm 形成温度 ; 360℃ 形成圧力 ; 5.5Torr 電極間距離 ; 9.9mm 印加高周波電力 ; 1.7w/cm2 である。
The conditions for forming the silicon nitride film 4 in which the internal stress is tensile stress are as follows: silane gas flow rate; 150 sccm ammonia gas flow rate; 50 sccm nitrogen gas flow rate; 3500 sccm formation temperature; 360 ° C. formation pressure; 5.5 Torr interelectrode distance; 9.9 mm Applied high frequency power; 1.7 w / cm 2 .

【0010】この形成条件下で内部応力が引っ張り応力
1〜2×109ダイン/cm2程度の窒化シリコン膜が得
られる。
Under these forming conditions, a silicon nitride film having an internal stress of about 1 to 2 × 10 9 dynes / cm 2 is obtained.

【0011】この内部応力が引っ張り応力である窒化シ
リコン膜4の膜厚が全体の目標膜厚の約半分形成できた
ら、高周波電力を調整する。そうすると、今度は、内部
応力が圧縮応力である窒化シリコン膜が形成されてい
く。これによって、残りの半分の膜厚を形成する。
When the film thickness of the silicon nitride film 4 in which the internal stress is tensile stress can be formed to about half of the total target film thickness, the high frequency power is adjusted. Then, a silicon nitride film whose internal stress is compressive stress is formed next time. As a result, the film thickness of the other half is formed.

【0012】この時、内部応力が圧縮応力の窒化シリコ
ン膜5の形成条件は、 シランガス流量 ; 150sccm アンモニアガス流量; 50sccm 窒素ガス流量 ;3500sccm 形成温度 ; 360℃ 形成圧力 ; 5.5Torr 電極間距離 ; 9.9mm 印加高周波電力 ; 2.0w/cm2 である。
At this time, the conditions for forming the silicon nitride film 5 in which the internal stress is compressive stress are as follows: silane gas flow rate; 150 sccm ammonia gas flow rate; 50 sccm nitrogen gas flow rate; 3500 sccm formation temperature; 360 ° C. formation pressure; 5.5 Torr interelectrode distance; 9.9 mm high-frequency power applied; 2.0 w / cm 2 .

【0013】この形成条件下で内部応力が圧縮応力1×
109〜2×109ダイン/cm2程度の窒化シリコン膜
が得られる。
Under these forming conditions, the internal stress is 1 × compressive stress.
A silicon nitride film of about 10 9 to 2 × 10 9 dynes / cm 2 is obtained.

【0014】以上のようにして窒化シリコン膜4,5を
形成すると、アルミニウム配線3に及ぼす窒化シリコン
膜4,5の応力を緩和することができ、アルミニウム配
線3のストレスマイグレーションを抑制できる。なお、
連続して形成するのは、内部応力が圧縮応力の窒化シリ
コン膜5と引っ張り応力の窒化シリコン膜との密着性を
高めるためである。さらに、高周波電力でのみで制御す
るのは、上記形成条件の中で最も応答性が良いため、ス
ループットを低下させることがない。例えば、ガス流量
を変化させて窒化シリコン膜の内部応力を制御する場
合、反応室内に安定したガスが供給されるまで数秒から
十数秒かかるため、生産性が低下する。
By forming the silicon nitride films 4 and 5 as described above, the stress of the silicon nitride films 4 and 5 exerted on the aluminum wiring 3 can be relaxed, and the stress migration of the aluminum wiring 3 can be suppressed. In addition,
The continuous formation is for increasing the adhesion between the silicon nitride film 5 having internal stress and compressive stress and the silicon nitride film having tensile stress. Furthermore, controlling with only high-frequency power has the highest responsiveness among the above-mentioned formation conditions, and therefore does not reduce throughput. For example, when the internal stress of the silicon nitride film is controlled by changing the gas flow rate, it takes several seconds to ten and several seconds until a stable gas is supplied into the reaction chamber, which lowers the productivity.

【0015】[0015]

【発明の効果】以上のようにこの発明の半導体装置の製
造方法によれば、アルミニウム配線に与える保護膜の内
部応力を緩和でき、配線のストレスマイグレーションを
抑制することができる。
As described above, according to the method of manufacturing a semiconductor device of the present invention, the internal stress of the protective film applied to the aluminum wiring can be relaxed, and the stress migration of the wiring can be suppressed.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例を説明するための半導体装置
の工程順断面図
1A to 1C are cross-sectional views in order of steps of a semiconductor device for explaining an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 シリコン基板 2 酸化シリコン膜 3 アルミニウム配線 4,5 窒化シリコン膜 1 Silicon substrate 2 Silicon oxide film 3 Aluminum wiring 4,5 Silicon nitride film

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 半導体基板の主面上に配線を形成する工
程と、前記配線上にプラズマCVD法により窒化シリコ
ン膜を形成するにあたり、前記窒化シリコン膜が、内部
応力が圧縮応力である第1の窒化シリコン膜と内部応力
が引っ張り応力である第2の窒化シリコン膜とで構成さ
れていることを特徴とする半導体装置の製造方法。
1. A step of forming a wiring on a main surface of a semiconductor substrate and a step of forming a silicon nitride film on the wiring by a plasma CVD method, wherein the internal stress of the silicon nitride film is a compressive stress. And a second silicon nitride film whose internal stress is tensile stress.
JP18603493A 1993-07-28 1993-07-28 Manufacture of semiconductor device Pending JPH0745610A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18603493A JPH0745610A (en) 1993-07-28 1993-07-28 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18603493A JPH0745610A (en) 1993-07-28 1993-07-28 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH0745610A true JPH0745610A (en) 1995-02-14

Family

ID=16181245

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18603493A Pending JPH0745610A (en) 1993-07-28 1993-07-28 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH0745610A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02100054A (en) * 1988-10-07 1990-04-12 Fuji Photo Film Co Ltd Positive type photosensitive composition
JPH07106330A (en) * 1993-10-08 1995-04-21 Nippon Precision Circuits Kk Formation of insulating layer in semiconductor device
JPH09102494A (en) * 1995-10-09 1997-04-15 Toshiba Corp Protective film for semiconductor device and forming method therefor
JP2006043813A (en) * 2004-08-04 2006-02-16 Denso Corp Micro-system structure with protective film and manufacturing method thereof
JP2008300678A (en) * 2007-05-31 2008-12-11 Oki Electric Ind Co Ltd Manufacturing method for semiconductor device, and semiconductor device
US20140183720A1 (en) * 2012-12-31 2014-07-03 International Business Machines Corporation Methods of manufacturing integrated circuits having a compressive nitride layer

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02100054A (en) * 1988-10-07 1990-04-12 Fuji Photo Film Co Ltd Positive type photosensitive composition
JPH07106330A (en) * 1993-10-08 1995-04-21 Nippon Precision Circuits Kk Formation of insulating layer in semiconductor device
JPH09102494A (en) * 1995-10-09 1997-04-15 Toshiba Corp Protective film for semiconductor device and forming method therefor
JP2006043813A (en) * 2004-08-04 2006-02-16 Denso Corp Micro-system structure with protective film and manufacturing method thereof
JP2008300678A (en) * 2007-05-31 2008-12-11 Oki Electric Ind Co Ltd Manufacturing method for semiconductor device, and semiconductor device
US20140183720A1 (en) * 2012-12-31 2014-07-03 International Business Machines Corporation Methods of manufacturing integrated circuits having a compressive nitride layer

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