JPH02292826A - Semiconductor device - Google Patents

Abstract

PURPOSE:To form a passivation film in high step coverage which causes no warp of a substrate and suffers no damage such as cracks, etc., by a method wherein the first protective film containing silicon and nitrogen having tensile stress in formed on metallic wirings and then the second protective film containing silicon and nitrogen having compressive stress is formed on the first protective film. CONSTITUTION:Within a semiconductor device wherein a protective film containing silicon and nitrogen is formed on metallic wirings 11, the first protective film 12 containing silicon and nitrogen having tensile stress is formed on the metallic wirings 11 and then the second protective film 13 containing silicon and nitrogen having compressive stress is formed on the first protective film 12. For example, the inner stress of silicon nitride (P-SiN) film to be formed is changed by changing the impressing ratio of high-frequency voltage and low-frequency voltage during plasma CVD process so as to firstly form the P-SiN (T.) film 12 in the tensile stress of 10<9>dyne/cm<2> as the first protective film in thickness of 3000Angstrom on the aluminum wirings 11. Finally, the P-SiN (C.) film 13 in the compressive stress of 2X10<9>dyne/cm<2> as the second protective film in thickness of 7000Angstrom is successively formed on the first protective film.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device in which a protective film is formed on metal wiring.

[Summary of the invention] The present invention provides silicon (Si) and nitrogen (N) on metal wiring.
In a semiconductor device in which a protective film containing silicon (Si) and nitrogen (N) containing tensile stress is formed in a metal wiring ball, A protective film is formed on the first protective film, and a second protective film containing silicon (Si) and nitrogen (N) having compressive stress is formed on the first protective film, thereby reducing the amount of warpage of the semiconductor device. It is designed to improve the crack resistance of the surface.

[Conventional technology] Passivation technology is a process of performing a certain type of treatment on the surface of a semiconductor device in order to stabilize its characteristics.It prevents it from being influenced by the outside world and also eliminates concerns that already exist on the surface of the device. It is a kind of surface passivation treatment method that also removes qualitative factors.

Conventionally, as a semiconductor device in which this type of passivation film is formed, one in which a single layer of silicon nitride SiN (plasma CVD) is formed on a substrate is known.

However, such silicon nitride (P-
As shown in FIG. 8 (in this case, a 4-inch wafer is used), a semiconductor wafer on which a single layer (SiN) film is formed has a problem in that large warpage occurs regardless of the wafer thickness. This causes problems such as stress migration in the aluminum wiring formed on the substrate and cracks in the bottom of the aluminum pad due to large compressive stress, reducing the reliability of the semiconductor device. cause

Therefore, in order to significantly reduce such warping of semiconductor wafers, a structure as shown in FIG. 9 has been adopted. For example, as shown in the figure, an aluminum wiring 2.2 is formed on a silicon substrate 1, which is a semiconductor wafer, a phosphosilicate glass (PSG) film 3 is formed on it, and phosphorous silicate glass (PSG) film 3 is formed on it. A passivation film having a two-layer structure in which a Ride (P-SiN) film 4 is formed is provided.

[Problems to be Solved by the Invention] However, in such a conventional example, although the amount of warpage of the substrate is reduced, in the case of a fine rule that increases the aspect ratio, the PSG film 3 has a step coverage ( Due to poor step coverage), the PSG film 3 could not be formed on the lower side surface of the aluminum wiring 2, or the PSG film may be bent (overhang) on the aluminum wiring 2 as shown in FIG. However, there was a problem in that the P-SiN film 4 could not be formed between the aluminum wiring lines 2 and 2, resulting in a gap 5.

In addition, since PSG is highly hygroscopic, it can be directly connected to aluminum wiring 2.
When it comes into contact with the aluminum wiring 2 side, voids or H t
This has the problem of causing corrosion etc. due to reaction with O, and significantly reducing the reliability of the aluminum wiring 2.

The present invention has been devised by focusing on these conventional problems, and is capable of forming a passivation film with high step coverage without causing warpage on the substrate, and without causing cracks or the like in areas with high aspect ratios. The object is to obtain a semiconductor device that does not cause damage.

[A thousand steps to solve the problem] Therefore, the present invention provides a semiconductor device in which a protective film containing silicon (Si) and nitrogen (N) is formed on a metal wiring.
A first protective film containing silicon (Si) and nitrogen (N) having tensile stress is formed on the metal wiring, and silicon (Si) and nitrogen (N) having compressive stress are formed on the first protective film. A solution to this problem is to form a second protective film containing

[Operation] The first protective film and the second protective film mutually cancel out tensile stress and compressive stress to prevent warpage from occurring in the entire semiconductor device. Therefore, changes in resistance and the like due to, for example, the Viezo effect (piezoelectric effect) are prevented. Further, the first protective film formed on the metal wiring is made of silicon (Si).
Since it is a silicon nitride film produced by plasma CVD, for example, containing nitrogen (N) and nitrogen (N), it does not have the effect of damaging metal wiring.

[Example] Details of the semiconductor device according to the present invention will be described below based on each example shown in the drawings.

In the present invention, the passivation film as a protective film is continuously or divided into two layers with silicon nitride (hereinafter referred to as P-SiN) films having different internal stresses, and plasma
This is formed using the VD method, and the following method is used to control the internal stress of this P-SiN film.

■Frequency control method Plasma CVD uses direct current voltage applied to the raw material gas in a vacuum. High frequency voltage. By applying a low frequency voltage, etc., excited molecules and atoms, called glow discharge plasma, are generated. Ions, radicals. This is a method of forming a thin film by creating a state where electrons coexist.
By changing the applied ratio of the high frequency voltage and the low frequency voltage described above, it is possible to change the internal stress of the P-SiN film to be formed. The graph in FIG. 4 shows the change in stress of the P-SiN film when the proportion of low frequency waves is changed in plasma CVD.

In addition, in the same graph, when stress is a positive value, tensile stress (T) is generated, and when it is negative, compressive stress (C) is generated. Furthermore, FIG. 5 is a graph showing changes in stress as the pressure is changed when both high frequency and low frequency waves are used.

■Narrow gap control method This method attempts to control the internal stress of the deposited P-SiN film by changing the distance between electrodes in plasma CVD.
! ) shows a case in which the degree of vacuum is changed to control the distance between the electrodes, and the graph in FIG. 7 shows a case in which the distance between the electrodes is controlled by changing the output.

■Composition control method During plasma CVD, the internal stress of the P-SiN film is controlled by mixing oxygen into the deposited P-SiN and changing the amount of hydrogen in the P-SiN.
For example, plasma CV under the condition of frequency 13.56MHz
When performing D, tensile stress occurs when no oxygen is mixed, and compressive stress occurs when oxygen is mixed.

(First Example) In this example, as shown in FIGS. 1A and 1B, aluminum wiring 2-2 is placed on a silicon substrate 10, which is a semiconductor wafer.
The present invention is applied to a semiconductor device formed with a fine rule (1 μm).

In this example, as shown in FIG. 18, first, a tensile stress of 1
0 @dyne/cod' P − S i N (
A tensile film 12 is formed as a first protective film. The thickness of this P-SiN (T.) film l2 is 3000 mm.

Next, on the P-SiN (T.) film t2, a P-SiN (compressible film) is formed as a second protective film with a compressive stress of 2
ity) The film 13 is formed to a thickness of 7000.

After the two-layer protective film is formed in this manner, the semiconductor device is completed through ordinary steps such as patterning and pad window opening.

In this embodiment, the frequency control method described above is used. P-SiN (T.) film and P-SiN (C.
．． ) The internal stress of the film was controlled, but the same applies to each of the following examples.

(Second Example) In this example, first, as shown in FIG. 2A, tensile stress l is applied onto the aluminum wiring 11 by plasma CVD.
A P-SiN (T.) film 12 of 0''dyne/cm'' is formed as a first protective film to a thickness of 3000 mm.

Next, a thick tetraethoxysilane (TEOS) film is formed by plasma CVD, etched back, and planarized as shown in FIG. 2B.

Next, p-S i N (T.) film l2 and TEOS
On the film l4, P-SiN (
C. ) A film l3 is formed with a thickness of 7,000 people (Fig. 2C).
).

In addition, although TEOS by plasma CVD was used for planarization in this example, TEOS+ozone (0
, ) or a coated SOG film may also be used.

(Third Embodiment) In this embodiment, first, as shown in FIG. 3A, a TEOS film 14 is formed using plasma CVD and is planarized by etching back.

Next, P-S of tensile stress 1 0 @dyne/am'
An iN(T.) film l2 was formed to a thickness of 3000 mm (FIG. 3B), and then a compressive stress of 2×10” dyne/
A P-SiN (C.) film 13 of "c+a" is formed.

Note that, as the TEOS film 14, another planarization film may be used as in the second embodiment.

As a specific example of the method for controlling the internal stress of the protective film in each of the above embodiments, for example, a low frequency 50%. A method is used in which plasma CVD is started with a high frequency of about 50%, the ratio of low frequency is gradually reduced, and the formation conditions are continuously changed so that the film formation is completed when the low frequency is 25%.

In addition, as another specific example of internal stress control, based on the graph shown in FIG.
．． The method of changing the Torr between 5 and 2.5 Torr is based on the graph shown in FIG. 6. The flow rate is 8 to 4 L/min. Based on the graph shown in Figure 7, the RF
It is possible to take a method such as changing the output from 320W to 400W.

Although the embodiments have been explained above, in the present invention,
Various other design changes are possible, and the first and second protective films may be P-SiN or other films containing silicon (Si) and nitrogen (N).

Further, the thickness of the protective film is not limited to that of the above embodiment.

Furthermore, the material of the metal wiring formed on the substrate is not limited to aluminum, but also tungsten. Polycrystalline silicon or the like may also be used.

Further, the tensile stress of the first protective film is 0 to 10" dyn.
The compressive stress of the second protective film is IO9.
It is possible to set it in the range of ~5×10 “dyne/cm”.

[Effects of the Invention] As is clear from the above description, in the semiconductor device according to the present invention, warping does not occur even when a protective film is formed, and the stepping force coverage of the protective film is improved. effective.

Furthermore, since the first and second protective films mutually relieve stress, there is an effect of preventing damage such as cracks from occurring in portions with a high aspect ratio.

Furthermore, as mentioned above, it is possible to prevent warping, so
This has the effect of preventing inconveniences such as piezo effect from occurring.

Furthermore, since no tensile stress is generated at or near the contact portion between the protective film and the metal wiring, it is possible to create a semiconductor device that is resistant to stress migration.

In addition, since the first protective film in contact with the metal wiring is formed of a material containing silicon and nitrogen, there is an effect of preventing corrosion and bonding from occurring in the metal wiring.

[Brief explanation of the drawing]

FIG. 1A and FIG. 1B are a first diagram of a semiconductor device according to the present invention.
2A to 2C are sectional views showing the manufacturing process of the second embodiment, and FIGS. 3A to 3
Figure C is a cross-sectional view showing the manufacturing process of the third embodiment, Figure 4 is a graph showing the relationship between the ratio of low frequency (relative to high frequency) in plasma CVD and the internal stress of the formed film, and Figure 5 is A graph showing the relationship between reaction gas pressure and formation stress in plasma CVD using low and high frequencies. Figure 6 shows the relationship between the internal stress of the formed film when the spacing between electrodes in plasma CVD is controlled by nitrogen flow m. Graph showing the relationship, Figure 7 is RF
FIG. 8 is a graph showing the relationship between output and internal stress, FIG. 8 is a graph showing a sled hoe, and FIG. 9 is a sectional view showing a conventional example. DESCRIPTION OF SYMBOLS 10... Silicon substrate, 11... Aluminum wiring (metal wiring), 12... P-SiN film (first protection @), 1
3...P-SiN film (second protective film), l4...T
ECCS membrane. 11 11 11 Aluminum West C Line 1
Analytical diagram showing the process of Jitsutei 1 Figure 1B Second Jitsutake! Fig. 2 A (#2 ridge/PIIJ) Fig. 2 C Glass ゛ Medical CvD Te゛ Low Shield ``Book of Friends, J8 and Stress Connection Thread 1 Hosuku Ruff No. 4 Figure 2.0 2.5 3.0 3.5
4.0 Pressure (T(1)R) Can circumference: &K Axuma CVD graph showing the relationship between reaction gas pressure and stress Figure 5 Figure 3 C Output (W) Output and stress Figure 7 shows the relationship between O TOO 200 300 40
0 500 wafer thickness (um)
)

Claims (1)

[Claims] (1) In a semiconductor device in which a protective film containing silicon (Si) and nitrogen (N) is formed on a metal wiring, a first film containing silicon (Si) and nitrogen (N) having tensile stress is formed on the metal wiring. A semiconductor device comprising: a protective film formed thereon; and a second protective film containing silicon (Si) and nitrogen (N) having compressive stress formed on the first protective film.