JP2954297B2 - Resin-sealed semiconductor device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a resin-sealed semiconductor device and a lead frame, and more particularly to a resin-sealed semiconductor device and a lead frame suitable for preventing resin cracks.

[Conventional technology]

Conventionally, in a resin-encapsulated semiconductor device, a semiconductor element is fixed on a tab, which is an element mounting portion, and a plurality of leads are arranged around the tab, and terminals and leads on the semiconductor element are formed of thin metal wires. And a structure in which the surroundings are sealed with a resin.

However, in recent years, there has been a tendency for device dimensions to increase due to higher integration of semiconductor devices. On the other hand, the outer shape of semiconductor devices cannot be freely expanded due to demands for high-density mounting, or conversely, tends to be reduced in size. There is. However, in the conventional structure in which the semiconductor element is mounted on the tab, if the dimensions of the semiconductor element are increased while keeping the external dimensions constant, the length of the portion for fixing the lead to the resin (the resin embedded portion of the inner lead portion) Distance) is insufficient, and a sufficient fixing strength cannot be given to the lead.

Therefore, in order to avoid such a problem, a plurality of inner leads are bonded to the circuit forming surface of the semiconductor element with an insulating member interposed therebetween, and the inner leads and the semiconductor element are electrically connected with a metal auxiliary wire. Japanese Patent Application Laid-Open No. 61-241959 proposes a method of sealing the periphery with a resin. This structure is sometimes called a lead-on-chip.

[Problems to be solved by the invention]

In the lead-on-chip type semiconductor device, it is necessary to devise to insulate the circuit forming surface of the semiconductor element from each lead. In the technology represented by JP-A-61-241959,
An insulating film is interposed between the inner lead and the circuit forming surface as an electrical insulator.

Polyimide or the like is used as a base material for this insulating film, but the insulating film base material generally lacks adhesion to a sealing resin.

On the other hand, since it is necessary to electrically connect the circuit formation surface of the semiconductor element and each lead with a wire or the like, the insulating film is usually used only at a necessary place, that is, an area where the inner is mounted on the upper surface of the semiconductor element. I can't.

By the way, in a resin-encapsulated semiconductor device, since the linear expansion coefficients of the semiconductor elements, inner leads, insulating film, and encapsulating resin that constitute the device are usually different from each other, the device in the process of manufacturing or using the device is not used. Thermal stress occurs inside the device due to temperature changes.

A noble metal coating such as gold (Au) or silver (Ag) is provided on the metal wire joining portion of the inner lead in order to improve the bonding between the inner lead and the metal wire. However, since the adhesiveness between the noble metal film and the sealing resin is poor, the interface between the inner lead provided with the noble metal film and the sealing resin is apt to peel off. Even when the noble metal coating is not provided, the adhesiveness between the inner lead material and the sealing resin is not so high, so that the interface may peel off under the condition of thermal stress.

Originally, if the inner leads were securely bonded and fixed to the circuit forming surface of the semiconductor element via an insulating film, the interface would not peel or would be minimal. However, since the adhesive strength between the end face of the insulating film and the sealing resin, which serves as the adhesive base, also lacks as described above, the interface between the end face of the insulating film and the sealing resin due to the thermal stress generated inside the device. Peeling occurs, and the interface peeling occurs between the inner lead and the sealing resin, and the interface peeling grows more and more.

Such interface delamination becomes a resin crack at the upper end of the inner lead, impairing the appearance of the semiconductor device,
It may cause breaks in the thin metal wires.

Particularly, the inner lead in which this danger is large is a common inner lead (bus bar inner lead) used for power supply and grounding.

The present invention prevents the occurrence of resin cracks from the upper leads of the inner leads for electrical connection, especially the common inner leads,
It is an object of the present invention to provide a resin-encapsulated semiconductor device capable of mounting a semiconductor element as large as possible under limited external dimensions and a lead frame used for the same.

[Means for solving the problem]

In order to achieve the above object, a semiconductor device according to the present invention includes:
A semiconductor element having one principal surface, a first lead having a region along one side of the semiconductor element on the one principal surface of the semiconductor element, and a direction intersecting the region of the first lead. In a semiconductor device having a plurality of second leads arranged, an insulating film interposed between the two leads and the semiconductor element, and a resin sealing the one main surface of the semiconductor element, A feature is provided.

(1) The first lead is formed with regions having different thicknesses.

(2) The thickness of a region of the first lead facing the insulating film is smaller than the thickness of a region not facing the insulating film.

(3) Regions having different thicknesses are formed on the first lead and the second lead.

[Action]

Even if delamination occurs at the interface between the common inner lead and the sealing resin, the amount of resin deformation at the top of the common inner lead is reduced by thinning the common inner lead. Stress decreases.

With the above-described device, a large stress is not generated at the upper end portion of the common inner lead, so that resin cracks can be prevented from being generated from this portion.
Even if a large semiconductor element is mounted, a highly reliable resin-encapsulated semiconductor device can be obtained.

〔Example〕

An embodiment of the present invention will be described below with reference to FIGS. FIG. 1 is a partial cross-sectional perspective view of a resin-sealed semiconductor device according to one embodiment of the present invention, and FIG.
It is sectional drawing cut | disconnected by the A line.

In the figure, the common inner lead 3 and the signal inner lead 4 have one end integrally formed with the outer lead 5, and the outer lead 5 is provided in two directions (longitudinal surface) of the resin-encapsulated semiconductor device. Have been.

The common inner lead 3 has a central portion of the semiconductor element 1 extended in parallel with its long side, and is electrically connected to the semiconductor element 1 on the circuit-shaped surface 1a of the semiconductor element 1 by the thin metal wire 7. I have. Although the circuit forming surface 1a is mostly covered with a passivation film such as PIQ, the circuit forming surface is exposed without the passivation film in the area of the electrical connection portion. In addition, inner lead 4 for signal
Is extended to the center side of the semiconductor element 1 across each long side of the rectangular semiconductor element 1. On the circuit forming surface 1a of the semiconductor element 1, the semiconductor element 1 and its tip end are formed of a thin metal wire. 7 are electrically connected. In this way, the main parts of the two shared inner leads 3 face each other.

Between the lower surface of the common inner lead 3 and the lower surface of the signal inner lead 4 and the circuit forming surface 1a of the semiconductor element 1,
A sheet-like insulating member 2 for electrically insulating the common inner lead 3 and the signal inner lead 4 from the semiconductor element 1 is provided. The insulating member 2 is formed by the semiconductor element 1 and the adhesive 9. Are glued together. In this example, the end portion (opposing surface) 2a of the insulating member 2 has no adhesive 9 and is in direct contact with the sealing resin 8. On the side surface (opposing surface) 3a of the common inner lead 3, a coating film 10 having good adhesion to the sealing resin 8 is formed, and is in contact with the sealing resin 8.

Note that the hatched portions in FIG. 1 indicate regions where the coating 10 is provided.

Common inner lead 3 and inner lead 4 for signal
Are bonded to the insulating member 2 by an adhesive 9.

In this embodiment, a semiconductor device is formed by sealing a semiconductor element 1, an insulating member 2, a common inner lead 3, a signal inner lead 4, and a thin metal wire 7 with a resin 8.

According to the present embodiment, the facing surface 3a of the shared inner lead 3
By forming the coating film 10 having good adhesiveness with the sealing resin 8, it is possible to prevent the peeling generated on the facing surface 2 a of the insulating member 2 from advancing to the facing surface 3 a of the common inner lead 3. it can.

As a result, the amount of deformation of the resin 8 above the common inner lead 3 due to cooling after the resin sealing of the semiconductor device and a decrease in temperature during the temperature cycle test are reduced, and a large stress is generated at the upper end of the common inner lead 3. Because there is no
The occurrence of resin cracks from this portion can be prevented.

Adhesion between the circuit forming surface 1a of the semiconductor element 1 and the insulating member 2,
The bonding between the insulating member 2 and the common inner lead 3, the bonding between the insulating member 2 and the signal inner lead 4, and the bonding between the insulating member 2 and the supporting inner lead 6 are performed using an adhesive 9 as shown in FIG. Further, the common inner lead 3 and the insulating member 2 may not be bonded.

The area where the insulating member 2 is adhered to the semiconductor element 1, the common inner lead 3 or the signal inner lead 4 is such that the connection by the thin metal wire 7 is performed stably and reliably.
It is desirable that the distance be as small as possible within a range that can withstand the external force received in the process of connection by the resin and sealing by the resin 8.

Next, the common inner lead 3 and the signal inner lead 4
And the supporting inner lead 6 with the insulating member 2 interposed therebetween,
A method for bonding to the circuit forming surface 1a of the semiconductor element 1 using the adhesive 9 will be described. Circuit forming surface 1a of semiconductor element 1
The sheet-shaped insulating member 2 is divided and bonded with an adhesive 9 on positions facing the common inner lead 3, the signal inner lead 4, and the supporting inner lead 6, respectively. Then, the common inner lead 3, the signal inner lead 4, and the supporting inner lead 6 are bonded and fixed to the circuit forming surface 1a of the semiconductor element 1 via the insulating member 2 with an adhesive 9.

For the insulating member 2, an epoxy resin, a bismaleimide triazine resin, a phenol resin, a polyimide resin, or the like is used. As the adhesive 9, for example, epoxy,
Materials such as polyetheramide, polyimide precursor, and epoxy-modified polyimide are used.

The common inner lead 3, the signal inner lead 4 and the supporting inner lead 6 are connected to each other until sealed by the resin 8, and form a series of lead frames. -Separated and molded. The lead frame is formed of, for example, an Fe-Ni alloy (such as Fe-42Ni), a Cu alloy, or the like.

As the thin metal wire 7, a thin wire such as aluminum (Al), gold (Au), or copper (Cu) is used.

As the sealing resin 8, for example, an epoxy resin to which a phenol-based curing agent, silicone rubber, and a filler are added is used.

Coating 10 formed on opposing surface 3a of common inner lead 3
Is made of an organic material such as epoxy, polyetheramide, or epoxy-modified polyimide, or a metal such as Cu, and is attached by a thick film forming method such as a plating method, a thin film forming method, or a coating method.

The directions in which the outer leads 5 are drawn out of the resin 8 are not limited to two directions as shown in FIG. 1, that is, one direction or three directions, but are limited to the long side of the resin-encapsulated semiconductor device. That is all. The outer leads 5 may be drawn not only from the side surfaces of the resin 8 but also from the upper surface or the lower surface of the resin 8. Further, in the drawing, the J-bend type in which the outer lead 5 is bent downward and the end thereof is bent to the lower surface of the resin 8 is shown as an example, but the outer lead 5 may be bent in any direction and shape. It is not necessary to bend again.

In the embodiment shown in FIG. 1 and FIG. 2, the coating 10 is adhered to the base material surface of the common inner lead 3.
As shown in the figure, a coating 10 may be adhered on a precious metal coating 11 such as Au or Ag formed on the substrate surface of the inner lead 3.

In the above embodiment, the shared inner lead 3 and the signal inner lead 4 are shown separately, but a semiconductor device in which the shared inner lead 3 and the signal inner lead 4 are not distinguished, or the shared inner lead 3 is provided. The present invention can be applied to a semiconductor device which does not depart from the scope of the present invention.

4 and 5 show another embodiment of the present invention. FIG. 5 is a cross-sectional view of FIG. The difference from the previous embodiments is that the common inner lead 3 provided on the insulating member 2 is provided with a thin portion 3b. By doing so, even if separation occurs at the interface between the common inter-lead facing surface (side surface) 3a and the sealing resin 8, the length of the separated portion is shortened. And the stress generated at the upper end of the common inner lead can be reduced.

The common inner lead thin portion 3b is formed by etching or machining press. Further, the thin portion 3b may be formed of a member other than the common inner lead 3 other than this portion. It is desirable that the thickness of the thin portion 3b be as thin as possible in manufacturing as long as a thin metal wire can be connected.

The connection between the common inner lead 3 and the thin metal wire 7 can be performed on the thin portion 3b.
It is desirable to apply Ag plating.

In the embodiment shown in FIG. 4, an example is shown in which the thin portion 3b is provided continuously over a wide range. However, the thin portion 3b may be provided so as to avoid the connection between the common inner lead 3 and the thin metal wire 7. Absent.

FIG. 6 is a sectional view showing still another embodiment of the present invention. What differs from the previous embodiments is that the common inner lead 3 and the signal inner lead 4 in the resin 8
Are made thinner than the outer leads 5.
As a result, the stress generated at the upper end of the common inner lead can be reduced, and the semiconductor device can be made thinner. It is desirable that the common inner lead 3 and the signal inner lead 4 be made as thin as possible in terms of manufacturing as long as a thin metal wire can be connected.

It goes without saying that the above embodiments may be implemented in combination as appropriate.

FIG. 7 is a partial cross-sectional perspective view of a conventional tabless resin-sealed semiconductor device to which the present invention is directed, and FIG. 8 is a cross-sectional view taken along the line C-A of FIG.

On the circuit forming surface 1a of the semiconductor element 1 supported (adhered and fixed) by the supporting inner leads 6, a shared inner lead (also called a bus bar inner lead) 3 and a signal inner lead 4 are connected to the semiconductor element 1. The common inner lead 3 and the signal inner lead 4 and the semiconductor element 1 are electrically connected to each other by the thin metal wires 7, respectively. These are sealed with the resin 8 to form a package. In addition, a noble metal coating such as gold (Au) or (Ag) is provided on the thin metal wire joint of the common inner lead 3 and the signal inner lead 4 in order to improve the bonding between the inner lead and the thin metal wire. . However,
Since the adhesiveness between the noble metal coating and the sealing resin is poor, the interface between the inner lead provided with the noble metal coating and the sealing resin is easily peeled off. Therefore, the area of the signal inner lead 4 where the noble metal coating 11 is provided is limited to only the thin metal wire joint at the tip of the signal inner lead 4. However, the common inner lead 3 has a large number of thin metal wires and extends over a wider range, so the noble metal coating 11 is applied to the entire surface of the common inner lead 3 existing above the insulating member 2. The seventh
The hatched portion in the figure indicates the region where the noble metal coating 11 is provided.

FIG. 9 is a cross-sectional view schematically showing the mechanism of generation of the resin crack. Common inner lead (linear expansion coefficient 5 × 10 ^-6
/ ° C) and the sealing resin (linear expansion coefficient of about 20 × 10 ⁻⁶ / ° C) have a large difference in linear expansion coefficient. The interface between the common inner lead side surface 3a having poor adhesion and the sealing resin 8 and the interface between the insulating member side surface 2a and the sealing resin 8 are easily separated 13.
Incidentally, the thickness of the semiconductor element 1 is, for example, about 0.4 mm, the thickness of the insulating member 2 is about 0.15 to 0.2 mm, and the thickness of each inner lead is about 0.2 mm. Since the amount of resin deformation at the upper portion of the common inner lead increases due to the occurrence of the peeling 12, a large stress is generated at the upper end portion of the common inner lead 3, and a resin crack 13 is generated at this portion. When the resin crack 13 is generated from the upper end of the common inner lead 3, not only does the appearance of the semiconductor device deteriorate, but also the thin metal wire 7 that electrically connects the common inner lead 3 or the signal inner lead 4 and the semiconductor element 1 is formed. The problem of disconnection also occurs.

In each of the above embodiments of the present invention, generation and growth of such interface delamination can be reliably prevented, and the generated stress can be reduced.

〔The invention's effect〕

According to the present invention, since a large stress does not occur due to cooling after resin sealing of a semiconductor device or a decrease in temperature during a temperature cycle test, it is possible to prevent the occurrence of a resin crack, and to further limit the stress. It is possible to obtain a resin-sealed semiconductor device capable of mounting a semiconductor element as large as possible under the above external dimensions.

[Brief description of the drawings]

FIG. 1 is a partial cross-sectional perspective view showing one embodiment of a resin-sealed semiconductor device of the present invention, FIG. 2 is a cross-sectional view taken along the line II of FIG.
FIG. 3 is an enlarged cross-sectional view showing another example of the embodiment shown in FIG. 1, FIG. 4 is a partial cross-sectional perspective view showing another embodiment of the resin-sealed semiconductor device of the present invention, and FIG. 4 is a cross-sectional view taken along a roll line in FIG. 4, FIG. 6 is a cross-sectional view showing still another embodiment of the resin-sealed semiconductor device of the present invention, and FIG. 7 is an example of a conventional tabless semiconductor device. FIG. 8 is a sectional view taken along the line C--A in FIG. 7, and FIG. 9 is a partial sectional view for explaining the mechanism of resin crack generation. 1 ... Semiconductor element, 1a ... Circuit forming surface of semiconductor element, 2
... insulating member, 3 ... common inner lead, 3a ... common inner lead facing surface, 3b ... thin portion, 4 ... signal inner lead, 7 ... thin metal wire, 8 ... resin, 10 ...
Coating.

──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Ryuji Kono 502 Kandamachi, Tsuchiura City, Ibaraki Prefecture Inside Machinery Research Laboratory, Hitachi, Ltd. Inside the laboratory (72) Inventor Ichiro Yasuo 5-2-1, Josuihonmachi, Kodaira-shi, Tokyo Inside Semiconductor Design and Development Center, Hitachi, Ltd. (72) Gen Murakami 5--20, Josuihoncho, Kodaira-shi, Tokyo No. 1 Semiconductor Design and Development Center, Hitachi, Ltd. (56) References JP-A-61-241959 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H01L 23/50

Claims (3)

(57) [Claims] 1. A semiconductor device having one main surface, a first lead having a region along one side of the semiconductor device on the one main surface of the semiconductor device, and the region of the first lead A semiconductor comprising: a plurality of second leads arranged in a direction intersecting with the semiconductor device; an insulating film interposed between the two leads and the semiconductor element; and a resin sealing the one main surface of the semiconductor element. In the device, the first lead is formed with regions having different thicknesses. 2. A semiconductor device having one main surface, a first lead having a region along one side of the semiconductor device on the one main surface of the semiconductor device, and the region of the first lead. A semiconductor comprising: a plurality of second leads arranged in a direction intersecting with the semiconductor device; an insulating film interposed between the two leads and the semiconductor element; and a resin sealing the one main surface of the semiconductor element. In the device, a thickness of a region of the first lead facing the insulating film is smaller than a thickness of a region not facing the insulating film. 3. A semiconductor device having one main surface, a first lead having a region along one side of the semiconductor device on the one main surface of the semiconductor device, and the region of the first lead. A semiconductor comprising: a plurality of second leads arranged in a direction intersecting with the semiconductor device; an insulating film interposed between the two leads and the semiconductor element; and a resin sealing the one main surface of the semiconductor element. In the device, the first lead and the second lead are formed with regions having different thicknesses.