JP2943773B2 - IC package - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an IC package, and more particularly to a ceramic IC package with an index mark.

[0002]

2. Description of the Related Art Generally, a package for mounting an IC chip is provided with an index mark or a shape for indicating a direction of use. This is to prevent the IC chip from malfunctioning or the occurrence of a safety problem due to a short circuit or the like when the direction of use is wrong, and the same function is provided in the ceramic IC package. Index marks, shapes, or both.

Usually, in the case of a ceramic IC package, the same conductive material as the internal wiring layer (for example, a conductive material mainly containing tungsten) is used as an index mark material.

[0004] When the same material as the internal wiring is used as the index mark material, the material can be easily procured and managed, and the same manufacturing process and equipment as the internal wiring layer can be used. That's why. As a result, the index mark finally obtained has a light milky white color and the base color is slightly transparent. Therefore,
When the ceramic part is white, the index mark cannot be identified from the appearance, and the function as the index mark cannot be performed as it is. In addition, even when the ceramic part is black or reddish-colored, there is a problem that it is difficult to recognize because the base color is slightly seen through.

In order to solve these problems, conventionally,
(1) plating on the surface of the index mark conductor material to differentiate it from the underlying color, (2) having an index shape, or having both of (1) and (2) above.
Such measures are taken. For example, Japanese Utility Model Application 61-46
No. 739 proposes an IC package structure having a plating layer formed by electrolytic plating on the surface of an index mark conductor on the surface of a package.

FIG. 7 shows a conventional index mark manufacturing process using a PGA (pin grid array) type ceramic IC, which is a typical example of a ceramic IC package.
FIG. 4 is a process diagram illustrating a package as an example.

First, a sheet-like ceramic layer (hereinafter, referred to as a "green sheet") 1 mainly composed of an alumina ceramic and a glass component is manufactured and processed to a predetermined size (see FIG. 7A).

Next, the sheet opening 5 is formed in the green sheet 1.
And a through hole 2 for an index mark for electrically connecting the index mark and an electrolytic plating pattern 13 described later are formed using a mold or the like (FIG. 7B).
reference).

Subsequently, a paste-like conductor containing tungsten as a main component is press-fitted into the index mark through hole 2 to form a via 3 (see FIG. 7C).

[0010] Finally, a conductive paste containing tungsten as a main component is printed at a predetermined position on the green sheet 1 to form an index mark pattern 4, and the first green used on the surface of the ceramic IC package is formed. The sheet 6 is obtained (see FIG. 7D). FIG.
FIG. 7D is a sectional view taken along line AA ′ of the plan view of FIG.

Similarly, the other ceramic layers are manufactured through the following steps (a) to (d), and the manufacturing flow is substantially the same as that of the first green sheet 6 described above.

(A) production and processing of green sheets; (b) formation of openings and through holes; (c) formation of vias by press-fitting conductors into through holes; and (d) pattern printing.

The green sheets thus manufactured are laminated and adhered (see FIG. 8B), chamfered 13 to prevent chipping, and then subjected to electrolytic plating pattern 14.
Is printed on the side surface of the sheet to obtain a green sheet laminate 15 (see FIG. 8C).

FIG. 8 shows a ceramic PGA having four laminated layers.
FIG. 8A shows a cross-sectional structure of each of the first to fourth green sheets, and FIG. 8B shows the first to fourth green sheets. 10 illustrates a stacked state of sheets 6 to 9. FIG. 8 (c)
Shows a green sheet laminate 15 obtained by printing a pattern 14 for electrolytic plating on the side surface of the laminate.

Referring to FIG. 8A, the second green sheet 7 has a receiving land 10 for preventing disconnection due to a through hole processing shift and a stacking shift, and the same land as the index mark pattern 4 made of tungsten. Screen printing is performed using a conductive paste as a main component, and vias 3 for connecting to the internal wiring patterns 11 on the lower third green sheet 8 are also formed.

Referring to FIG. 8A, an internal arrangement pattern 11 including a bonding pattern is screen-printed on the third green sheet 8, and is electrically connected to the external terminal connection pattern 12. A via 3 to be formed is also formed.

Referring to FIG. 8 (a-4), the fourth
Receiving lands 10 are screen-printed on the front surface of the green sheet 9, and external terminal connection patterns 12 are screen-printed on the back surface. The receiving lands 10 and the external terminal connection patterns 12 are electrically connected by vias 3.

FIG. 9 is a process sectional view showing a basic manufacturing process after the laminating process of the ceramic PGA type IC package.

The green sheet laminate 15 (see FIG. 8C) is fired in a reducing atmosphere at a temperature of 1000 ° C. or more to obtain a ceramic sintered body 16 (see FIG. 9A).

A nickel plating 17 is applied to the conductor surface of the obtained ceramic sintered body 16 (see FIG. 9B).

Thereafter, the external terminal 18 is arranged at a predetermined position using a jig and is connected to the ceramic sintered body 16 by an Ag-Cu metal brazing material 19 (see FIG. 9C).

After the Ni plating 20 is applied again (FIG. 9)
(See FIG. 9D), and an outer plating 21 such as Au plating is applied (see FIG. 9D).

Finally, the side surface of the package is polished to a predetermined size and the electrolytic plating pattern 14 is removed to obtain a ceramic PGA type IC package 23 (see FIG. 9E). However, in the above description, plating by the electroplating method using the electrolytic plating pattern 14 is all assumed. However, in the case of the electroless plating method not using the electrolytic plating pattern 14, the electrolytic plating pattern 1 is used.
The steps of printing are the same as those in the case of electrolytic plating, except that there is no step of printing 4, a step of polishing the side surface of the package, a step of forming through holes 2 for index marks, and a step of forming vias 3.

When the shape is used as an index,
As shown in FIG. 10, only the index corners 24,
A method of adopting a shape different from those of other corners to identify the external appearance, or a method of asymmetric arrangement of external terminals so that physical mounting cannot be performed in the wrong direction are employed.
That is, in FIG. 10A, a corner portion provided with a notch portion unlike the other three corners is an index corner 24, and in FIG. 10B, unlike the other three corners, the right corner of the drawing is different from the other three corners. An index pin 25 is provided on the inner periphery of the external terminal array at the lower corner. In FIG. 10C, unlike the other three corners, an external terminal on the outer periphery of the lower right corner is not provided as an index corner. Functioning.

[0025]

SUMMARY OF THE INVENTION As described above, an IC
The package needs index marks or shapes to indicate the direction of use, but these basically have no electrical function and do not affect or affect the operation of the IC itself. It is.

Therefore, it can be said that the formation of the index mark or the shape deviates from the original purpose of the IC, and requires extra steps and materials, resulting in an increase in cost.

When the index mark is composed of only the conductor pattern, the visibility is poor, and even when the direction is instructed by changing the shape, the shape cannot be changed greatly from the external terminal arrangement. Cannot be determined.

Further, when the external terminal arrangement is devised, the mounting direction is physically restricted, so that a problem such as a malfunction due to a wrong direction can be avoided. Then, there is a possibility that external damage may be given to the IC package such as deforming or damaging the external terminal, and it is necessary to carry out this in conjunction with the above-mentioned index mark or shape.

Accordingly, the present invention has been made in view of the above-mentioned problems, and has as its object to improve the operability of a ceramic IC package and shorten the manufacturing process to improve productivity and productivity. An object of the present invention is to provide an IC package that improves economy.

[0030]

To achieve the above object, the present invention provides a ceramic IC package having an internal wiring layer , comprising:
A ceramic layer on the surface and one or more ceramics under the ceramic layer
Notches are provided at the corners of the backing layer, and the notches are
The ceramic layer having the internal wiring located below the provided ceramic layer is provided at a corner corresponding to the notch.
The above-mentioned ceramic, in which the internal conductor pattern is
Protrude the cutout of the layer so that it can be seen from the surface side
This is characterized in that it is used as a direction indication mark (hereinafter referred to as "index mark").

[Operation] In the ceramic IC package of the present invention, the outer shape of the ceramic layer having the internal wiring layer is made larger than the ceramic surface layer, and the index mark is formed on the ceramic layer. And the internal wiring pattern printing can be realized in the same screen printing process. For this reason, the printing process of the index mark dedicated pattern is not required, and the manufacturing process can be shortened, so that the manufacturing can be performed at a lower cost than before.

Further, when the exterior plating is carried out by using the electrolytic plating method, since the electrolytic plating pattern printed on the side surface of the ceramic and the internal wiring pattern can be electrically connected in the same layer, the through holes for the index marks are provided. And the step of forming a via are not required, so that the steps can be further reduced and the cost can be reduced. Further, since external plating such as Au plating can be reliably performed, it is easy to distinguish the ceramic color from the ceramic color, and the recognition of the package use direction can be easily performed.

[0033]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of an IC package according to the present invention will be described below with reference to the drawings. 1 to 4 are views showing a manufacturing process according to the embodiment of the present invention.

FIG. 1 shows a first embodiment of the present invention.
It shows a manufacturing process of a green sheet. The first green sheet 6 is manufactured and processed into a green sheet 1 having alumina ceramics and a glass component as main components to a predetermined size (see FIG. 1A). Subsequently, a notch (a lower right corner in FIG. 1C) is formed in a corner portion of the green sheet 1 so that the sheet opening 5 and an index mark described later can be seen using a mold or the like. First green sheet 6 used for ceramic IC package surface
(See FIGS. 1B and 1C). FIG. 1 (b)
FIG. 2 is a sectional view taken along line AA ′ of the plan view of FIG.

The second green sheet 7 (laminated as described in FIG. 3) also has the following (a) to (g).
It is manufactured in the step (b).

(A) Production and processing of green sheets, (b) formation of openings.

FIG. 2 shows a manufacturing flow of the third green sheet 8 (laminated as described in FIG. 3).
A green sheet 1 having alumina ceramics and a glass component as main components is manufactured and processed into a predetermined size (see FIG. 2A), and a sheet opening 5 and a through hole 2 are formed in the green sheet 1 thus obtained by using a mold or the like. (See FIG. 2B).

Subsequently, a paste-like conductor containing tungsten as a main component is press-fitted into the through-hole 2 to form a via 3 (see FIG. 2C).

Finally, a conductive paste containing tungsten as a main component is printed at a predetermined position on the green sheet 1 to form the internal wiring pattern 11 and the index mark pattern 4, which is used for a ceramic IC package. A third green sheet 8 is obtained (see FIG. 2D). FIG. 2E is a plan view of FIG. 2D as viewed from the direction of the index mark, and FIG.
FIG. 3E is a sectional view taken along line AA ′ of FIG.

Similarly, the other ceramic layers are manufactured through the following steps (a) to (d) in substantially the same manner as the third green sheet 8 described above.

(A) production and processing of green sheets; (b) formation of openings and through holes; (c) formation of vias by inserting conductors into through holes; and (d) pattern printing.

The green sheets manufactured in this manner are laminated and adhered, chamfered 13 for preventing chipping, and then an electroplating pattern 14 is printed on the side surface of the sheet to form a green sheet laminate 15. (See FIG. 3).

FIG. 3 shows a ceramic PGA having four laminated layers.
FIG. 3A shows a lamination process / structure of a type IC package. FIG. 3A shows first to fourth green sheets 6 to 9.
3 (b) shows the state of lamination of the first to fourth green sheets 6 to 9, and FIG. 3 (c) shows a pattern obtained by printing the pattern 14 for electrolytic plating on the side surface of the laminate. 2 shows the obtained green sheet laminate 14.

The green sheet laminate 15 is fired in a reducing atmosphere at a temperature of 1000 ° C. or higher to obtain a ceramic sintered body. The external terminal 18 is arranged at a predetermined position by using the Ag-Cu metal brazing material 19 and is connected to the ceramic sintered body.

After the Ni plating 20 is applied again, the outer plating 21 such as Au plating is applied. Finally, the side surface of the package is polished to a predetermined size and the pattern for electrolytic plating is removed to obtain the ceramic PGA type IC package 29 of the present invention (see FIG. 8). However, in the above description, the plating by the electroplating method using the pattern for electroplating is assumed, but in the case of the electroless plating method without the pattern for electroplating, the pattern 14 for electroplating is printed. Other steps are the same as in the case of electrolytic plating, except that there is no step.

In addition to alumina, aluminum nitride, mullite and glass ceramic can be used as the ceramic material. Ni, Pb-S other than Au is used for the outer plating.
n, Sn plating or the like can be used.

FIGS. 4A and 4B are a plan view and a cross-sectional view of the ceramic IC package according to the embodiment of the present invention as viewed from the index direction. The ceramic PGA type IC package 29 has a ceramic surface layer (first surface) having a cutout at one corner so that the index mark 30 formed in the lower layer can be seen from the outside.
A ceramic layer), a second ceramic layer, and a ceramic layer (third ceramic layer in the figure) having an internal wiring having a larger outer shape than the first and second ceramic layers. An index mark 30 which has been subjected to an Au plating process by a plating method or an electroless plating method is provided.

[0048]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of the present invention;

FIG. 5 shows the structure of the first embodiment of the present invention. FIG. 5 (a) is a plan view, and FIG.
It is sectional drawing of the AA 'line of (a). Ceramic PG
The A-type IC package 32 has a ceramic surface layer (first ceramic layer 35) and a second ceramic layer 36 each having a cutout at one corner so that the index mark 30 formed in the lower layer can be seen from the outside. An index mark having a ceramic layer having internal wiring larger in outer shape than the first and second ceramic layers 35 and 36, and having a corner portion of the ceramic layer subjected to an Au plating process by an electrolytic plating method or an electroless plating method. 30.

Thus, in this embodiment, (1) the step of forming the via 3 in the first green sheet 6 to be the first ceramic layer 35, and (2) the index mark pattern 4 2 steps of printing process,
Four steps can be omitted, including (3) a step of forming a via on the second green sheet to be the second ceramic layer 36 and (4) a step of printing the receiving land 10.

In this embodiment, when the index mark 30 is 1
Although an example in which the IC package is provided is shown, it is not always necessary to provide one IC package if the use direction of the IC package can be determined.

FIG. 6 shows the structure of a second embodiment of the present invention. FIG. 6 (a) is a plan view of a first ceramic layer, and FIG. 6 (b) is a plan view of a second ceramic layer. FIG. 6C is a cross-sectional view taken along line AA ′ of FIG. 6A.

Ceramic PGA type IC package 34
Shows a PGA type IC package having a plurality of internal wiring layers. The IC package 34 has a ceramic surface layer (first ceramic layer 35) having a shape such that the index marks 30 formed on the second ceramic layer 36 can be seen in appearance, an internal wiring pattern 33 and an index mark pattern 4. A second ceramic layer 36 provided, a third ceramic layer 37 having the internal wiring pattern 11, and an index mark 30 in which the second ceramic layer 36 is subjected to Au plating by an electrolytic plating method or an electroless plating method. It is configured.

Thus, in this embodiment, the steps of (1) forming the via 3 in the first green sheet 6 to be the first ceramic layer 35 and (2) printing the index mark pattern 4 which are conventionally required Two steps can be omitted.

In this case, although the number of reduction steps is smaller than in the first embodiment, as can be seen from FIG. 10A, the index mark 30 can be set large, so that an IC package excellent in visibility can be provided.

[0056]

As described above, according to the IC package of the present invention, since a part of the conventional manufacturing steps can be reduced, an IC package with lower cost than the conventional one can be provided.

Further, according to the IC package of the present invention, since the exterior plating can be reliably applied to the index mark,
It becomes easy to distinguish the ceramic color from the ceramic color, and it is possible to provide an IC package which is easy to confirm the direction of use and has excellent operability.

[Brief description of the drawings]

FIGS. 1A and 1B are process cross-sectional views illustrating a manufacturing flow of a package surface layer (first green sheet) according to an embodiment of the present invention. FIG. 1C shows the state shown in FIG.
Is a plan view as viewed from the direction of the index mark.

FIGS. 2A to 2D are process cross-sectional views illustrating a manufacturing flow of an internal wiring and an index mark printing layer according to an embodiment of the present invention. (E) is FIG.
FIG. 3A is a plan view of the apparatus viewed from the direction of an index mark.

FIGS. 3A to 3C are process cross-sectional views illustrating a manufacturing flow after lamination of a ceramic PGA type IC package according to an embodiment of the present invention.

FIGS. 4A and 4B are a plan view and a cross-sectional view of the ceramic IC package according to the embodiment of the present invention as viewed from the index direction.

5A and 5B are views for explaining the first embodiment of the present invention, wherein FIG. 5A is a plan view and FIG. 5B is a cross-sectional view.

FIGS. 6A and 6B are views for explaining a second embodiment of the present invention, wherein FIGS. 6A and 6B are plan views, and FIG.

FIGS. 7 (a) to 7 (d) are flow charts (a sectional view taken along line AA ′ in FIG. 7 (e)) of a conventional package surface layer (first green sheet) having an index mark conductor layer,
FIG. 7E is a plan view of FIG. 7D viewed from the index mark direction.

8 (a) is a schematic diagram of a constituent layer of a conventional ceramic PGA type IC package, FIG. 8 (b) is a schematic diagram of a laminated state of each constituent layer, and FIG. 8 (c) is a schematic diagram of a conventional green sheet laminate. It is.

9 (a) to 9 (e) show a conventional ceramic PGA.
FIG. 9 is a process cross-sectional view for describing a manufacturing flow after lamination of the type IC package.

FIGS. 10A to 10C are explanatory diagrams of a conventional index direction instruction by shape change.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Green sheet 2 Index mark through hole 3 Via 4 Index mark pattern 5 Sheet opening 6 First green sheet 7 Second green sheet 8 Third green sheet 9 Fourth green sheet 10 Land 11 Internal wiring pattern 12 External terminal connection Pattern 13 Electroplating pattern 14 Electroplating pattern 15 Green sheet laminate 16 Ceramic sintered body 17 Ni plating 18 External terminal 19 Ag-Cu metal brazing material 20 Ni plating 21 Exterior plating 23 Ceramic PGA type IC package 24 Index Corner 25 Index pin 29 Ceramic PGA type IC package 30 Index mark 32 Ceramic PGA type IC package 35 First ceramic layer 36 Second ceramic layer 3 7 Third ceramic layer

Claims (2)

(57) [Claims] 1. A ceramic IC package having an internal wiring layer, wherein a notch is provided in a surface ceramic layer or a corner portion of the surface ceramic layer and one or more ceramic layers thereunder. An internal conductor pattern provided at a corner portion corresponding to the cutout of the ceramic layer having an internal wiring located below the provided ceramic layer projects from the cutout portion of the ceramic layer above this and is seen from the surface side. And a direction indicating mark (hereinafter referred to as "index mark"). Wherein said index mark, IC package according to claim 1, wherein the are subjected to external plating process by an electrolytic plating method or an electroless plating method.