JP2865054B2 - Circuit board device and method of manufacturing the same - Google Patents
Circuit board device and method of manufacturing the sameInfo
- Publication number
- JP2865054B2 JP2865054B2 JP8106196A JP10619696A JP2865054B2 JP 2865054 B2 JP2865054 B2 JP 2865054B2 JP 8106196 A JP8106196 A JP 8106196A JP 10619696 A JP10619696 A JP 10619696A JP 2865054 B2 JP2865054 B2 JP 2865054B2
- Authority
- JP
- Japan
- Prior art keywords
- resin layer
- protective resin
- circuit board
- thick film
- film resistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明は厚膜導体、厚膜抵抗等が
成形された回路基板を備えた回路基板装置及びその製造
方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board device having a circuit board formed with a thick film conductor, a thick film resistor and the like, and a method of manufacturing the same.
【０００２】[0002]
【従来の技術】厚膜導体や厚膜抵抗が形成された回路基
板を備えた回路基板装置（ハイブリットＩＣ）は公知で
ある。一般に、この種の回路基板装置では、回路基板上
への不純物の侵入による特性劣下等の防止を図るため、
回路基板上を保護樹脂（コ−ト材）で被覆する。2. Description of the Related Art A circuit board device (hybrid IC) including a circuit board on which a thick film conductor and a thick film resistor are formed is known. Generally, in this type of circuit board device, in order to prevent deterioration of characteristics due to intrusion of impurities onto the circuit board,
The circuit board is covered with a protective resin (coat material).
【０００３】[0003]
【発明が解決しようとする課題】ところで、このように
保護樹脂で回路基板上を保護する場合に、回路基板上の
特定の箇所（例えば厚膜抵抗）を他の箇所とは異なる樹
脂で被覆したい場合がある。又、その特定箇所の保護樹
脂の厚みを十分に確保したい場合がある。従来では、こ
れに対する工夫は特にされていなかったため、異なる樹
脂を良好に区分して被覆すること、及び保護樹脂の厚み
を十分に確保することが困難であった。When a protective resin is used to protect the circuit board, it is desired to cover a specific portion (for example, a thick film resistor) on the circuit board with a resin different from other portions. There are cases. Further, there is a case where it is desired to secure a sufficient thickness of the protective resin at the specific portion. Conventionally, no special measures have been taken for this, and it has been difficult to satisfactorily separate and coat different resins and to ensure a sufficient thickness of the protective resin.
【０００４】そこで、本発明は特定箇所の第１の保護樹
脂層を十分な厚みに形成することができ且つ特定箇所以
外の第２の保護樹脂層を第１の保護樹脂層と区分して形
成することができる回路基板装置及びその製造方法を提
供することを目的とする。Accordingly, the present invention is capable of forming the first protective resin layer at a specific location to a sufficient thickness and forming the second protective resin layer other than the specific location separately from the first protective resin layer. And a method for manufacturing the same.
【０００５】[0005]
【課題を解決するための手段】上記目的を達成するため
の本発明は、絶縁性基板と、前記絶縁性基板の上に配設
された回路素子と、前記回路素子を被覆せずに包囲する
ように前記基板の上に形成されたオ−バコ−トガラス膜
と、前記オ−バコ−トガラス膜で被覆されていない前記
回路素子を被覆している第１の保護樹脂層と、前記オ−
バコ−トガラス膜を被覆している第２の保護樹脂層とを
備えた回路基板装置に係わるものである。なお、請求項
２に示すように第１及び第２の保護樹脂層を被覆する樹
脂被覆体を設け、第１の保護樹脂層の樹脂被覆体に対す
る接着力を第２の保護樹脂層の樹脂被覆体に対する接着
力よりも低くすることが望ましい。また、請求項３に示
すように、回路素子として厚膜抵抗を形成し、第１の保
護樹脂層を樹脂の滴下又は印刷によって形成し、第２の
保護樹脂層を第１の保護樹脂層と親和性の悪い樹脂によ
って形成することが望ましい。In order to achieve the above object, the present invention provides an insulating substrate, a circuit element disposed on the insulating substrate, and surrounding the circuit element without coating. An overcoat glass film formed on the substrate, a first protective resin layer covering the circuit element which is not covered with the overcoat glass film,
The present invention relates to a circuit board device provided with a second protective resin layer covering a coated glass film. According to a second aspect of the present invention, there is provided a resin coating for covering the first and second protective resin layers, and the adhesive strength of the first protective resin layer to the resin coating is reduced by the resin coating of the second protective resin layer. Desirably, it is lower than the adhesion to the body. Further, as set forth in claim 3, a thick film resistor is formed as a circuit element, a first protective resin layer is formed by dropping or printing a resin, and a second protective resin layer is formed with the first protective resin layer. It is desirable to form with a resin having poor affinity.
【０００６】[0006]
【発明の作用及び効果】各請求項の発明によれば、オ−
バコ−トガラス膜によって回路素子又は厚膜抵抗は被覆
せず、オ−バコ−トガラス膜は回路素子又は厚膜抵抗を
包囲するように形成する。従って、オ−バコ−トガラス
膜は第１及び第２の保護樹脂層の選択的被覆のための領
域の特定層として機能し、特に第１の保護樹脂層を特定
領域に容易に形成することが可能になる。また、回路素
子又は厚膜抵抗はオ−バコ−トガラス膜で被覆されない
ので、この領域の全体の厚さの制限がある場合にはオ−
バコ−トガラス膜を省いた分だけ第１の保護樹脂層を厚
くすることができる。請求項２の発明によれば、第１の
保護樹脂層の樹脂被覆体への接着力が第２の保護樹脂層
の樹脂被覆体への接着力よりも低くしたので、第１の保
護樹脂層が樹脂被覆体によって上方向に引張られ、これ
により厚膜抵抗も上方向に引張られた時に、厚膜抵抗が
第１の保護樹脂層によってさほど強く引張られない。こ
のため、厚膜抵抗の基板からの剥離や断線が生じ難くな
る。第１の保護樹脂層の樹脂被覆体に対する接着力が弱
くても、第１の保護樹脂層を平面的に見て囲むように配
設した第２の保護樹脂層の樹脂被覆体に対する接着力が
高いので、厚膜抵抗の形成領域への水や不純物の侵入を
防ぐことができる。また、樹脂被覆体と保護樹脂層との
間の剥離は外周側から内周側に進行しやすいので、外周
側に接着力の強い第２の保護樹脂層を設けることにより
剥離の発生及び進行を抑制することができる。また、請
求項３の発明によれば、第１の保護樹脂層を樹脂の滴下
によって特定領域に容易に形成することができる。ま
た、第２の保護樹脂層を形成する時に第１の保護樹脂層
に対して親和性の悪い樹脂を選択することによって第１
の保護樹脂層を特別にマスクしないで第２の保護樹脂層
を形成することが可能になる。According to the invention of each claim,
The circuit element or the thick-film resistor is not covered with the barcote glass film, and the overcoat glass film is formed so as to surround the circuit element or the thick-film resistor. Therefore, the overcoat glass film functions as a specific layer in a region for selectively covering the first and second protective resin layers, and in particular, the first protective resin layer can be easily formed in the specific region. Will be possible. Further, since the circuit element or the thick film resistor is not covered with the overcoat glass film, if there is a limit on the total thickness of this region, the circuit element or the thick film resistor is not covered.
The thickness of the first protective resin layer can be increased by the amount corresponding to the omission of the baked glass film. According to the second aspect of the present invention, the adhesive strength of the first protective resin layer to the resin coating is lower than the adhesive strength of the second protective resin layer to the resin coating. Is pulled upward by the resin coating, and when the thick film resistance is also pulled upward, the thick film resistance is not pulled so strongly by the first protective resin layer. For this reason, peeling or disconnection of the thick film resistor from the substrate hardly occurs. Even if the adhesive strength of the first protective resin layer to the resin coating is weak, the adhesive strength of the second protective resin layer disposed so as to surround the first protective resin layer in a plan view is small. Since it is high, it is possible to prevent water and impurities from entering the region where the thick film resistor is formed. Further, since the separation between the resin coating and the protective resin layer easily proceeds from the outer peripheral side to the inner peripheral side, the occurrence and progress of the separation can be prevented by providing the second protective resin layer having a strong adhesive force on the outer peripheral side. Can be suppressed. According to the third aspect of the present invention, the first protective resin layer can be easily formed in the specific region by dropping the resin. In addition, when the second protective resin layer is formed, a resin having low affinity for the first protective resin layer is selected so that the first protective resin layer has a low affinity.
It is possible to form the second protective resin layer without specially masking the protective resin layer.
【０００７】[0007]
【実施例】次に、図１〜図３を参照して、本発明の１実
施例に係わる回路基板装置としてのハイブリッドＩＣを
説明する。このハイブリッドＩＣは、アルミナ（Ａｌ2
Ｏ3 ）等から成る絶縁性回路基板１と、厚膜抵抗２と、
配線導体３と、オ−バコ−トガラス膜４と、第１及び第
２の保護樹脂層５、６と、樹脂被覆体７と、放熱板を兼
ねる金属支持板８とを有する。なお、回路基板１の主面
には回路素子として厚膜抵抗２以外にコンデンサ、半導
体素子、コイル素子等が配置されるが、これ等の図示は
省略されている。また、図３に概略的に示すようにこの
実施例では金属支持板８の上に電力用半導体素子１０が
固着され、樹脂被覆体７で被覆される。また、回路基板
１には厚膜導体から成る端子１１が設けられており、こ
の端子１と外部リ−ド１２とがリ−ド細線１３で接続さ
れている。DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, a hybrid IC as a circuit board device according to an embodiment of the present invention will be described with reference to FIGS. This hybrid IC uses alumina (Al 2
An insulating circuit board 1 made of O 3 ), a thick film resistor 2,
It has a wiring conductor 3, an overcoat glass film 4, first and second protective resin layers 5, 6, a resin coating 7, and a metal support plate 8 also serving as a heat sink. A capacitor, a semiconductor element, a coil element, and the like are arranged on the main surface of the circuit board 1 as circuit elements in addition to the thick film resistor 2, but these are not shown. Further, as schematically shown in FIG. 3, in this embodiment, a power semiconductor element 10 is fixed on a metal support plate 8 and covered with a resin coating 7. The circuit board 1 is provided with a terminal 11 made of a thick film conductor, and this terminal 1 is connected to an external lead 12 by a thin lead wire 13.
【０００８】回路基板１は四角形の平面形状を有してお
り、この周辺部よりも内側に厚膜抵抗２が配置されてい
る。厚膜抵抗２を電気的に接続するための配線導体３
は、厚膜導体ペ−ストを周知のスクリ−ン印刷によって
所定パタ−ンに印刷した後にこれを焼成することによっ
て形成したものである。厚膜抵抗２は、例えば酸化ルテ
ニウム系ガラス粉末と有機バインダとから成る厚膜抵抗
ペ−ストをスクリ−ン印刷にして向い合う２つの配線導
体の上面に跨がるように印刷した後にこれを焼成するこ
とによって形成したものである。従って、厚膜抵抗２の
両端部は対向する２つの配線導体３の上面に被着されて
おり、その他の部分は回路基板１の一方の主面に被着さ
れている。本実施例では、ほぼ四角形の平面形状を有す
るように厚膜抵抗２が形成されている。尚、図示は省略
されているが厚膜抵抗２には、周知のレ−ザトリミング
法によって例えばＬ字状に欠損部が形成され、抵抗値の
調整が図られている。The circuit board 1 has a quadrangular planar shape, and the thick film resistor 2 is arranged inside the peripheral portion. Wiring conductor 3 for electrically connecting thick film resistor 2
Is formed by printing a thick film conductor paste in a predetermined pattern by well-known screen printing and then firing the paste. The thick film resistor 2 is formed by printing a thick film resistor paste made of, for example, ruthenium oxide glass powder and an organic binder so as to straddle the upper surfaces of two opposing wiring conductors by screen printing. It is formed by firing. Therefore, both ends of the thick film resistor 2 are attached to the upper surfaces of the two opposing wiring conductors 3, and the other portions are attached to one main surface of the circuit board 1. In this embodiment, the thick film resistor 2 is formed so as to have a substantially quadrangular planar shape. Although not shown in the drawings, the thick film resistor 2 is formed with, for example, an L-shaped defect portion by a known laser trimming method to adjust the resistance value.
【０００９】オ−バコ−トガラス膜は、図２に示すよう
に、回路基板１の一方の主面のうち厚膜抵抗２が形成さ
れた特定領域を除くほぼ全面を被覆するように形成され
ている。即ち厚膜抵抗２が形成された特定領域に対応し
て開口即ち窓９が生じるようにオ−バコ−トガラス膜４
が形成されているいる。この窓９から回路基板１の主面
の一部及び配線導体３の一部さらに厚膜抵抗２の全体が
露出している。オ−バコ−トガラス膜４は例えば鉛系の
ガラスを回路基板１の一方の主面に窓９が生じるように
スクリ−ン印刷した後、これを焼成することにより形成
したものである。なお、オ−バコ−トガラス膜４によっ
て厚膜抵抗２以外の回路素子及び配線導体を被覆するこ
とができる。As shown in FIG. 2, the overcoat glass film is formed so as to cover almost the entire surface of one main surface of the circuit board 1 except for the specific region where the thick film resistor 2 is formed. I have. That is, the overcoat glass film 4 is formed so that an opening or a window 9 is formed corresponding to a specific region where the thick film resistor 2 is formed.
Is formed. A part of the main surface of the circuit board 1, a part of the wiring conductor 3, and the entire thick film resistor 2 are exposed from the window 9. The overcoat glass film 4 is formed, for example, by screen-printing lead-based glass so as to form a window 9 on one main surface of the circuit board 1 and then firing the screen. Note that circuit elements other than the thick film resistor 2 and the wiring conductor can be covered with the overcoat glass film 4.
【００１０】第１の保護樹脂層５は、例えば流動性を有
するシリコ−ン樹脂を窓９の中に滴下又はスクリ−ン印
刷し、窓９の内側のみに選択的に形成したものであり、
厚膜抵抗２の上面全体と窓９に露出した配線導体３及び
回路基板１の一方の主面を被覆している。なお、図示は
省略しているが、第１の保護樹脂層５は厚膜抵抗２のト
リミングによる欠損部の内側も被覆している。第１の保
護樹脂層５の上面はオ−バコ−トガラス膜４の上面より
も下側もしくはほぼ同一平面上に設けるのが望ましい
が、オ−バ−コ−トガラス膜４の上面よりも若干上方に
あってもよい。The first protective resin layer 5 is formed by, for example, dropping or screen-printing a silicone resin having fluidity into the window 9 and selectively forming it only inside the window 9.
The entire upper surface of the thick film resistor 2, the wiring conductor 3 exposed in the window 9, and one main surface of the circuit board 1 are covered. Although not shown, the first protective resin layer 5 also covers the inside of a defect caused by trimming of the thick film resistor 2. The upper surface of the first protective resin layer 5 is desirably provided below or substantially on the same plane as the upper surface of the overcoat glass film 4, but slightly above the upper surface of the overcoat glass film 4. It may be.
【００１１】第２の保護樹脂層６は、第１の保護樹脂層
５に対して親和性の悪い例えばポリイミド系ワニスを回
路基板１の一方の主面上の全体即ちオ−バコ−トガラス
膜４の上のみならず窓９の上に塗布することによって形
成したものである。第２の保護樹脂層６を形成するため
のポリイミド系ワニスが第１の保護樹脂層５の上に塗布
されても、これとの親和性が悪いためにワニスが第１の
保護樹脂層５に弾かれてこの上には第２の保護樹脂層６
が形成されない。The second protective resin layer 6 is made of, for example, a polyimide-based varnish having low affinity for the first protective resin layer 5 on the entire main surface of the circuit board 1, that is, the overcoat glass film 4. It is formed by coating not only on the window 9 but also on the window 9. Even if a polyimide-based varnish for forming the second protective resin layer 6 is applied on the first protective resin layer 5, the varnish is applied to the first protective resin layer 5 because of poor affinity with the varnish. The second protective resin layer 6 is
Is not formed.
【００１２】樹脂被覆体７は、例えばエポキシ系合成樹
脂から成り、第１の保護樹脂層５及び第２の保護樹脂層
６の上面、さらには支持版８の一方の主面の回路基板１
が固着されていない領域も被覆している。ここで、樹脂
被覆体７と回路基板１とを直接に接着した場合における
両者の接着力（両者を引き剥がすに要する力）をＡkgｆ
／ｃｍ2 、第１の保護樹脂層５と樹脂被覆体７との接着
力Ｂkgｆ／ｃｍ2 、第２の保護樹脂層６と樹脂被覆体と
の接着力Ｃkgｆ／ｃｍ2 とした時にこれ等の間にはＢ＜
Ａ＜Ｃの関係がある。これによって、厚膜抵抗２の剥離
や断線が生じ難くなる。即ち、樹脂被覆体７が熱膨張等
によって回路基板１の主面から浮き上がっても、この実
施例では、樹脂被覆体７と第１の保護樹脂層５との接着
力が劣っているため、第１の保護樹脂層５が樹脂被覆体
７に引張られて浮き上がることがない。従って、厚膜抵
抗２に剥離が生じることがない。一方、厚膜抵抗２の上
面以外は第１の保護樹脂層５よりも樹脂被覆体７との接
着性に優れた第２の保護樹脂層６によって被覆されてい
るので、リ−ド細線１３の剥離や回路基板１の上面への
不純物侵入等も防止される。なお、リ−ド細線１３の接
続部分も第１の保護樹脂層５で被覆しても厚膜抵抗２の
剥離や断線は同様に防止できる。しかし、このようにす
ると、リ−ド細線１３の接続部分の近くにおいて第１の
保護樹脂層５と樹脂被覆体７との界面で剥離が生じ易
く、万一剥離が生じると、これに伴う応力がリ−ド細線
１３に加わって、リ−ド細線１３を端子１１から剥離さ
せかねない。また、保護樹脂層５と樹脂被覆体７との剥
離はその周辺側即ち回路基板１の外周側から内側に向か
って進行するので、回路基板１の外周側の保護樹脂の樹
脂被覆体７に対する接着性が悪いと、この剥離の進行が
早期に生じ、リ−ド細線１３の剥離を早期に招き易い。
また、回路基板１の外周側を含めてそのほぼ全面を被覆
する保護樹脂層が回路基板１との接着性が良くないと、
回路基板１と保護樹脂の剥離も生じ易く、保護樹脂の本
来の機能である不純物侵入防止効果が損なわれる。この
実施例では、リ−ド細線１３の接続部分や回路基板１の
外周側を含む回路基板のほぼ全面が第１の保護樹脂層５
に比較して樹脂被覆体７や回路基板への接着性に優れた
第２の保護樹脂層６によって被覆されているので、この
ような問題が生じない。The resin coating 7 is made of, for example, an epoxy-based synthetic resin, and is formed on the upper surface of the first protective resin layer 5 and the second protective resin layer 6, and on the circuit board 1 on one main surface of the support plate 8.
Are also covered with the areas not fixed. Here, when the resin coating 7 and the circuit board 1 are directly bonded to each other, the adhesive strength between them (the force required to peel them off) is represented by Akgf.
/ Cm 2 , the adhesive strength between the first protective resin layer 5 and the resin coating 7 Bkgf / cm 2 , and the adhesive strength between the second protective resin layer 6 and the resin coating Ckgf / cm 2 . Between B <
There is a relationship of A <C. Thereby, peeling or disconnection of the thick film resistor 2 is less likely to occur. That is, even if the resin coating 7 rises from the main surface of the circuit board 1 due to thermal expansion or the like, in this embodiment, the adhesive strength between the resin coating 7 and the first protective resin layer 5 is inferior. The first protective resin layer 5 is not lifted by being pulled by the resin coating 7. Therefore, the thick film resistor 2 does not peel off. On the other hand, since the portion other than the upper surface of the thick film resistor 2 is covered with the second protective resin layer 6 having better adhesion to the resin coating 7 than the first protective resin layer 5, the lead thin wire 13 Separation and intrusion of impurities into the upper surface of the circuit board 1 are also prevented. Even if the connection portion of the lead thin wire 13 is covered with the first protective resin layer 5, peeling and disconnection of the thick film resistor 2 can be similarly prevented. However, in this case, peeling is likely to occur at the interface between the first protective resin layer 5 and the resin coating 7 near the connection portion of the lead thin wire 13, and if peeling occurs, the stress accompanying the peeling will occur. May be added to the lead thin wire 13 to peel the lead thin wire 13 from the terminal 11. Further, since the separation between the protective resin layer 5 and the resin coating 7 proceeds from the peripheral side thereof, that is, from the outer peripheral side of the circuit board 1 to the inner side, adhesion of the protective resin on the outer peripheral side of the circuit board 1 to the resin coating 7 is performed. If the property is poor, the peeling proceeds at an early stage, and the lead thin wire 13 is likely to be peeled at an early stage.
Also, if the protective resin layer covering almost the entire surface including the outer peripheral side of the circuit board 1 has poor adhesion to the circuit board 1,
Separation of the protective resin from the circuit board 1 is also likely to occur, and the effect of preventing the entry of impurities, which is the original function of the protective resin, is impaired. In this embodiment, almost the entire surface of the circuit board including the connection portion of the lead thin wire 13 and the outer peripheral side of the circuit board 1 is covered with the first protective resin layer 5.
Such a problem does not occur because the second protective resin layer 6 is covered with the resin coating 7 and the second protective resin layer 6 which is superior in adhesion to the circuit board.
【００１３】また、この実施例では、回路基板上に第１
の保護樹脂層５と第２の保護樹脂層６とを容易に且つ確
実に塗り分けることができる。即ち、第１の保護樹脂層
５を選択的に塗布すべき領域はオ−バコ−トガラス膜４
によって包囲された窓９即ち凹状領域となっているた
め、この凹状領域に保護樹脂を滴下又はスクリ−ン印刷
するだけで容易に厚膜抵抗の全面を含む小面積領域のみ
を選択的に第１の保護樹脂層５によって被覆することが
できる。また、第１の保護樹脂層５と第２の保護樹脂層
６とは互いに親和性の悪い樹脂から成るので、第２の保
護樹脂層６の選択的形成が容易になる。なお、第１の保
護樹脂層５と第２の保護樹脂層６との接着力をＤとした
場合には、Ｄ＜Ｂ、及びＤ＜Ｃに設定されている。上記
Ｂ、Ｃは前述したように樹脂被覆体７に対する第１及び
第２の保護樹脂層５、６の接着力を示す。この様に、第
２の保護樹脂層６の第１の保護樹脂層５に対する接着力
が極めて小さいので、第２の保護樹脂層６を形成するた
めにワニスを全表面に塗布した時に第１の保護樹脂層５
で弾かれないものが残存したとしても、第１の保護樹脂
層５の上からこれを容易に除去し、第２の保護樹脂層６
を所定領域のみに形成することができる。In this embodiment, the first substrate is mounted on a circuit board.
The protective resin layer 5 and the second protective resin layer 6 can be easily and reliably applied separately. That is, the region where the first protective resin layer 5 is to be selectively applied is the overcoat glass film 4.
Window, that is, a recessed area surrounded by the above, the protection resin is simply dropped or screen-printed on this recessed area, and only the small area area including the entire surface of the thick film resistor can be selectively selectively used as the first area. Of the protective resin layer 5. Further, since the first protective resin layer 5 and the second protective resin layer 6 are made of resins having low affinity with each other, the selective formation of the second protective resin layer 6 is facilitated. When the adhesive strength between the first protective resin layer 5 and the second protective resin layer 6 is D, D <B and D <C are set. B and C indicate the adhesive strength of the first and second protective resin layers 5 and 6 to the resin coating 7 as described above. As described above, since the adhesive strength of the second protective resin layer 6 to the first protective resin layer 5 is extremely small, when the varnish is applied to the entire surface to form the second protective resin layer 6, the first protective resin layer 6 has the first protective resin layer 6. Protective resin layer 5
Even if there is any material that is not repelled by the above, it is easily removed from the first protective resin layer 5 and the second protective resin layer 6 is removed.
Can be formed only in a predetermined region.
【００１４】[0014]
【変形例】本発明は、上述の実施例に限定されるもので
なく、例えば次の変形が可能なものである。 （１） 第１及び第２の保護樹脂層５、６を共に接着力
の互いに異なるポリイミド系ワニスで形成することがで
きる。 （２） 厚膜抵抗２をＡｇ−Ｐｄ抵抗ペ−スト等で形成
することもできる。 （３） 厚膜抵抗２以外の類似の回路素子を基板１上に
形成する場合にも本発明を適用することができる。 （４） 接着力Ａ、Ｂ、Ｃの大小に関係なく、特定領域
に第１及び第２の保護樹脂層５、６を設ける場合にも本
発明を適用することができる。[Modifications] The present invention is not limited to the above-described embodiment, and for example, the following modifications are possible. (1) Both the first and second protective resin layers 5 and 6 can be formed of polyimide varnishes having different adhesive strengths. (2) The thick film resistor 2 may be formed of an Ag-Pd resistor paste or the like. (3) The present invention can be applied to a case where similar circuit elements other than the thick film resistor 2 are formed on the substrate 1. (4) The present invention can be applied to the case where the first and second protective resin layers 5 and 6 are provided in a specific region regardless of the magnitude of the adhesive strengths A, B and C.
【図１】本発明の実施例に係わるハイブリッドＩＣの一
部を示す断面図である。FIG. 1 is a sectional view showing a part of a hybrid IC according to an embodiment of the present invention.
【図２】図１のハイブリッドＩＣのＡ−Ａ線断面図であ
る。FIG. 2 is a sectional view taken along line AA of the hybrid IC of FIG. 1;
【図３】ハイブリッドＩＣ全体の形状を一部省略して示
す平面図である。FIG. 3 is a plan view showing a part of the entire hybrid IC with its shape omitted;
１ 基板 ２ 厚膜抵抗 ４ オ−バコ−トガラス膜 ５、６ 第１及び第２の保護樹脂層 ７ 樹脂被覆体 ８ 金属支持板 DESCRIPTION OF SYMBOLS 1 Substrate 2 Thick film resistance 4 Overcoat glass film 5, 6 First and second protective resin layers 7 Resin coating 8 Metal support plate
Claims (3)
に形成されたオ−バコ−トガラス膜と、 前記オ−バコ−トガラス膜で被覆されていない前記回路
素子を被覆している第１の保護樹脂層と、 前記オ−バコ−トガラス膜を被覆している第２の保護樹
脂層と、を備えた回路基板装置。1. An insulating substrate; a circuit element disposed on the insulating substrate; and an overcoat glass formed on the substrate so as to surround the circuit element without covering the circuit element. A film, a first protective resin layer covering the circuit element not covered with the overcoat glass film, and a second protective resin layer covering the overcoat glass film. , A circuit board device comprising:
２の保護樹脂層の上を被覆している樹脂被覆体を備え、
前記第１の保護樹脂層の前記樹脂被覆体に対する接着力
が前記第２の保護樹脂層の前記樹脂被覆体に対する接着
力よりも低いことを特徴とする請求項１記載の回路基板
装置。2. The method according to claim 1, further comprising a resin covering body covering the first protective resin layer and the second protective resin layer.
2. The circuit board device according to claim 1, wherein an adhesive force of the first protective resin layer to the resin cover is lower than an adhesive force of the second protective resin layer to the resin cover. 3.
程と、 前記厚膜抵抗を被覆せずに包囲するように前記基板上に
オ−バコ−トガラス膜を形成する工程と、 流動性を有する樹脂を滴下又は印刷することによって前
記オ−バコ−トガラス膜で被覆されていない前記厚膜抵
抗を被覆して第１の保護樹脂層を形成する工程と、 前記第１の保護樹脂層に対する親和性の悪い樹脂によっ
て前記オ−バコ−トガラスを被覆して第２の保護樹脂層
を形成する工程とを備えた回路基板装置の製造方法。Forming a thick film resistor on the insulating substrate; forming an overcoat glass film on the substrate so as to surround the thick film resistor without covering the thick film resistor; Forming a first protective resin layer by dropping or printing a resin having a property to cover the thick film resistor not covered with the overcoat glass film, and forming the first protective resin layer; Forming a second protective resin layer by coating the overcoat glass with a resin having low affinity for the circuit board device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8106196A JP2865054B2 (en) | 1996-04-03 | 1996-04-03 | Circuit board device and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8106196A JP2865054B2 (en) | 1996-04-03 | 1996-04-03 | Circuit board device and method of manufacturing the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH09275163A JPH09275163A (en) | 1997-10-21 |
| JP2865054B2 true JP2865054B2 (en) | 1999-03-08 |
Family
ID=14427429
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8106196A Expired - Fee Related JP2865054B2 (en) | 1996-04-03 | 1996-04-03 | Circuit board device and method of manufacturing the same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2865054B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI720851B (en) * | 2020-03-20 | 2021-03-01 | 南茂科技股份有限公司 | Chip package structure and manufacturing method thereof |
-
1996
- 1996-04-03 JP JP8106196A patent/JP2865054B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH09275163A (en) | 1997-10-21 |
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