JP2824890B2 - SCSI protocol controller - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a SCSI protocol controller, and more particularly, to an ECA (Extended Conting
The present invention relates to an improvement of a SCSI protocol control device that also supports an ent Allegiance) function.

[0002]

2. Description of the Related Art The SCSI protocol is one of the rules concerning a bus for connecting a plurality of devices by a bus and communication between devices using the bus. FIG. 3 shows a bus (SCSI-
BUS) 10 through the controllers 1, 2, FDD 3,
1 shows an example of a system in which devices such as an HDD 4 and a CD-ROM 5 are combined. These devices are provided on the bus 10 side, respectively.
SI protocol control circuit (PC) 11, 12, 13, 1
4, 15 and so on, and entrusts these circuits with processing corresponding to the SCSI protocol. SCSI in this specification
The protocol control device refers to a device having such a SCSI protocol control circuit and performing communication or the like compatible with the SCSI protocol.

[0003] Under this protocol, a device that has secured the right to use a bus line becomes an initiator only until the device relinquishes the right, and a device selected as a communication partner by this initiator becomes a target. For example,
At a certain timing, the controller 1 becomes the initiator and the FDD 3 becomes the target and they communicate with each other. At another timing, the controller 2 becomes the initiator and the HDD 4 becomes the target and they communicate with each other. That is, the bus 10 is shared by time sharing. In this example, the controllers 1 and 2 can be both initiators and targets, whereas FDDs 3 and HDs, depending on the characteristics of the device.
D4 and CD-ROM 5 are only targets.

FIG. 4 is a block diagram of the HDD 4 which is a SCSI protocol control device, focusing on the SCSI protocol control circuit 14. When the HDD 4 is selected as a target by the controller 1 serving as the initiator, this is detected in the circuit 14 by the selection detection circuit 16 via the bus interface 10a, and the selection detection signal A is output.
Then, the ID of the controller 1 at that time is latched in the initiator ID latch 17, the selection detection signal A is held in the selected flag 18, and these are input to the microcomputer 19.

[0005] Then, in the microcomputer 19, the communication program 19c receives a command from the controller 1 and performs processing according to the content of the command.
For example, the communication program 19c gives an instruction to the control program 19 in response to a command, and the control program 19
The read / write processing of data is performed by controlling the DD main body 4a. When this process is completed, transfer data including data such as a process result is set in the buffer 19a by the communication program 19c and transmitted to the initiator indicated by the latch 17 via the bus 10. Thus, the target HDD 4 performs a process according to the command from the controller 1 as the initiator, and responds with a response including a processing result and the like.

[0006]

SUMMARY OF THE INVENTION Such a conventional SC
In an SI protocol control device, an initiator and a target are dynamically replaced, and one device is often controlled by a plurality of devices at different times. For example, the HDD 4 receives the first access from the controller 1, then the second access from the controller 2, and the third access from the controller 1. In such a case, it may be desired to save the result of the first access until the third access of the same controller. Specifically, when an error occurs in the first access, three times for recovery processing or the like.
Error information must be returned on the second access.

FIG. 5 shows a communication diagram and a process of the communication program 19c in this case. HDD4 SCSI
When an error occurs, the protocol control circuit 14 responds to the controller 1, which is the initiator at that time, with a check condition and a response of the initiator cover. Then, for the second access from the controller 2 different from the controller 1 at the time of occurrence of the error, if the actual processing is performed, the recovery processing from the error becomes impossible. . On the other hand, 3
For the third access, actual processing is performed according to a response including error sense data in response to the command. This function is the ECA function in the SCSI protocol.

The bus is occupied by the initiator until the initiator secures the right to use the bus and relinquishes the right to use after exchanging commands and responses. During this time, other devices cannot perform processing using the bus. However, in order for the SCSI protocol controller to support the ECA function, it is necessary to respond not only to the initiator at the time of occurrence of an error with an error status response but also to other initiators with a busy status response.

For this reason, if it takes a long time to process such a response, the bus is occupied for a long time for communication that is ineffective or does not involve any actual processing (double broken line in FIG. 5). Parts 10a, 10
b, 10c). This is inconvenient because the efficiency of actual processing is not good for the apparent use efficiency. An object of the present invention is to solve such a problem of the related art, and to realize a SCSI protocol control device that efficiently supports an ECA function in a SCSI protocol.

[0010]

In order to achieve this object, the configuration of the SCSI protocol control device of the present invention is as follows.
In a SCSI protocol controller for performing bus control according to a CSI (Small Computer System Interface) protocol, a transmission buffer in a RAM area and the SCSI
A microcomputer having a protocol-compatible communication program, a selection detection circuit for detecting selection as a target and generating a selection detection signal, and an ECA state (first state) and a non-ECA state controlled by the communication program. A flag such as a flip-flop that is set to any one of the states (second states), and an ID (Identifi) of a first initiator that is controlled by the communication program and is an initiator at that time.
cation) and SC when receiving a start signal
A busy status return circuit for issuing a fixed format busy status response according to the SI protocol; a mismatch detection circuit for generating a mismatch signal when accessed from a second initiator different from the first initiator; Upon receiving the mismatch signal and the state value of the flag, when the flag is in the non-ECA state (second state), the selection detection signal is sent to the microcomputer regardless of the presence or absence of the mismatch signal, and the flag is set in the ECA state ( When the mismatch signal is received in the (first state), the transmission of the selection detection signal to the microcomputer is suppressed, the start signal is issued to activate the busy status return circuit, and the flag is set in the ECA state (the first state). 1) and the mismatch signal is generated. A logic circuit for sending the selection detection signal to the microcomputer when the communication program is not executing the first command when the communication program generates an error during processing in response to the first command from the third initiator. The transfer data including the error sense data is set in the transmission buffer in response to the check condition and the response of the initiator cover in response to the above command, the flag is set to the ECA state (first state), and the latch is controlled by controlling the latch. The third initiator is used as the first initiator, and its ID is latched by the latch. When the second command of the request sense is received from the third initiator, the error sense data is transmitted based on the transfer data of the transmission buffer. Depending on the response, including the third From Initiator and receiving a third command Lillies recover the flag is to the non-ECA state (second state).

[0011]

In the SCSI protocol control device according to the present invention having such a configuration, the processing of the ECA function for the initiator other than the initiator at the time of occurrence of the error is performed by the busy status return circuit which has received the start signal. There is no need for slow communication programs. Therefore, this processing in response to the busy status response can be immediately completed in a short time.
In the ECA function, the processing for the initiator when an error occurs requires the intervention of a communication program, but the communication program only needs to respond to the specific initiator.

In this case, since the transmission buffer is not used for other communications, a time-consuming preparation operation of setting transfer data in the transmission buffer can be completed in advance. As a result, the process of responding to the initiator at the time of occurrence of the error with the response of the error status can be immediately completed in a short time. Therefore, the bus is occupied for a short period of time for communication with little effect or without any actual processing, and the ECA function in the SCSI protocol is efficiently supported.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a block diagram of the HDD 4 as a SCSI protocol control device, focusing on the SCSI protocol control circuit 140. The difference from the SCSI protocol control circuit 14 in the conventional example is that an ECA dedicated circuit 141 is added and the communication program 19d is partially modified. Therefore, the same components as those of the conventional example are denoted by the same reference numerals as those of the conventional example, and the description will focus on differences from the conventional example.

The ECA dedicated circuit 141 includes an ECA-ID latch 142 as a latch, an ECA flag 143 as a flag, a mismatch detection circuit 144, a busy status return circuit 146, a gate 145, and a gate 14
7 and a logic circuit having The flag 143 is
It is composed of an S flip-flop and the like, and is set or reset under the control of the communication program 19d of the microcomputer 19. As a result, one of the ECA state (first state) and the non-ECA state (second state) is set.

The ECA-ID latch 142 is a latch that receives, as a data input, the ID of the initiator held by the initiator ID latch 17 and receives a control signal from the microcomputer 19. And communication program 1
It is controlled by the control of 9d, and holds the ID of the initiator at that time. Since this control of the communication program 19d is performed when an error occurs, the initiator of this ID, that is, the first initiator, is the initiator when an error occurs.

The busy status return circuit 146
It is composed mainly of a ROM and a readout circuit. This R
The OM stores transfer data of a fixed format busy status according to the SCSI protocol, and a read circuit sequentially reads out the transfer data from the ROM and sends it to the bus 10 via the bus interface 10a. This performs the processing when receiving the start signal B. Thereby, without the intervention of the communication program 19d,
Issues a busy status response. In other words, EC
In the function A, processing is performed on initiators other than the initiator at the time of occurrence of an error.

The mismatch detecting circuit 144 is mainly composed of an EOR gate and the like, and is provided with an initiator ID latch 17.
And the output of the ECA-ID latch 142 as a data input. And the initiator ID from these
Are compared to detect whether these IDs do not match. If they do not match, a mismatch signal is generated. That is,
The current initiator held by the initiator ID latch 17 is used as a second initiator, and the first
A mismatch signal is generated when accessed from a second initiator different from the one of the first initiator.

Gate 145 is AND in the logic of this example.
The value of the flag 143 and the mismatch detection circuit 14 may be used.
4 and receives the disagreement signal, and calculates a logical product of them to generate a start signal B. This start signal B is sent to the busy status return circuit 146 described above. Thus, when a mismatch signal is received when the flag 143 is in the ECA state, the activation signal B is issued to activate the busy status return circuit 146.

The gate 147 is connected to the selection detection circuit 1
6 is a modified AND gate which receives the selection detection signal A from 6 at its non-inverting input and receives the activation signal B at its inverting input.
Note that this may be configured by a combination of an AND gate and a NOT gate. The output of the gate 147 is sent to the selected flag 18 instead of the conventional selection detection signal A. As a result, the flag 143 becomes non-EC
In the state A, regardless of the presence or absence of the mismatch signal B, the selection detection signal A is sent to the microcomputer 19 when the flag 143 is in the ECA state and no mismatch signal is generated. The flag 14
If the mismatch signal is generated when 3 is in the ECA state,
The selection detection signal A is not sent to the microcomputer 19.

When the communication program 19d receives a first command from a device selected as a target of the HDD 4 in order to perform some processing, that is, a third initiator, the communication program 19d executes processing corresponding to the first command. And so on. Then, if an error occurs during this processing, the ECA function is responsible for processing the initiator when an error occurs. However, since the ECA dedicated circuit 141 responds to other initiators, it is improved so that only the processing for the initiator when an error occurs is performed efficiently.

Specifically, for the first command,
It responds with the check condition and the response of the initiator cover. In addition, transfer data including error sense data is set in the transmission buffer 19a, and the flag 143 is set to the ECA state. further,
Controls the latch 142 and the ID of the initiator at that time
Latch. That is, the third initiator is connected to the first
The ID is latched by the latch 142 as the initiator of the. As a result, the ECA dedicated circuit 141 responds to the second initiator, which is another initiator.

When receiving a second command of request sense from the third initiator, the transmission buffer 1
Based on the transfer data 9a, a response including error sense data is responded. The access from the third initiator, which is the first initiator, is possible because the selection detection signal A is transmitted to the microcomputer 19 by the function of the logic circuit of the ECA dedicated circuit 141. Upon receiving a release recovery third command from the third initiator, the flag 143 is reset from the ECA state to the non-ECA state.
This returns to the normal processing state.

The HDD 4 having such a configuration, that is, the SCS
The operation of the I protocol control device will be described. FIG. 2 shows a correspondence diagram between the communication diagram and the processing of the communication program 19d. It is assumed that the controller 1 is an initiator and the HDD 4 is a target in a normal state. The communication program 19 of the HDD 4 includes the controller 1
In response to the command from the control unit 19, an initiator determination is made, and the control program 19b controls the HDD. If an error occurs at this time, the controller responds to the controller 1 as the initiator at that time with a check condition and a response of the initiator cover. Further, error information is prepared in the buffer 19a in advance.

Thereafter, when the error occurs, the controller 1
When there is a second access from the controller 2 different from the above, the busy status return circuit 141 immediately responds to this with a busy status response instead of the communication program 19d. As a result, processes such as initiator determination and transfer data setting, which are conventionally performed by the communication program, become unnecessary, and the bus occupation time during this period can be reduced (see the double broken line 10b '). Further, the data in the transmission buffer 19a is not destroyed.

Then, when there is a third access from the controller 1 at the time of occurrence of an error, since this is normally a request sense command, the error sense is immediately performed based on the transfer data prepared in the transmission buffer 19a. It can respond with a response including data (see double dashed line 10c '). Thus, this HDD 4
Can efficiently support the ECA function in the SCSI protocol.

Although the above description has been made with reference to an example of an apparatus serving only as a target, the present invention is also effective for an apparatus that can serve as both an initiator and a target. In such a case, similar improvements may be made to the circuit and the program serving as the target. Thereby, when the target is selected, the same operation and effect can be exhibited.

[0027]

As can be understood from the above description, in the SCSI protocol control device of the present invention, the SCS
Regarding the ECA function of the I protocol, an ECA dedicated circuit that responds with a busy status response to an initiator other than the initiator in the event of an error in the ECA function is added, and the communication program processes the initiator in the ECA function when an error occurs. Only carry. Thereby, there is an effect that a SCSI protocol control device that efficiently supports the ECA function can be realized.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment of a SCSI protocol control device according to the present invention, focusing on its protocol control circuit.

FIG. 2 is a communication diagram for explaining the operation.

FIG. 3 is an example of a system in which a plurality of devices are connected via a SCSI bus.

FIG. 4 is a block diagram mainly showing a protocol control circuit of a conventional SCSI protocol control device.

FIG. 5 is a communication diagram for explaining the operation.

[Explanation of symbols]

1, 2 controller 3 FDD 4 HDD 4a HDD main body 5 CD-ROM 10 bus (SCSI-BUS) 11, 12, 13, 14, 15 SCSI protocol control circuit (PC) 10a bus interface 16 selection detection circuit 17 initiator ID latch 17 18 Selected flag 18 19 Microcomputer 19a Transmission buffer 19b Control program 19c Communication program 19d Communication program 141 ECA dedicated circuit 142 ECA-ID latch 143 ECA flag 144 Mismatch detection circuit 145 AND gate 146 Busy status return circuit 147 AND gate

Claims (1)

(57) [Claims] (1) SCSI (Small Computer System Interface)
ace) In a SCSI protocol control device that performs bus control according to a protocol, a microcomputer having a transmission buffer in a RAM area and a communication program compatible with the SCSI protocol, and detecting selection as a target to generate a selection detection signal A selection detection circuit, a flag such as a flip-flop that is set to one of a first state and a second state by control of the communication program, and a second control unit that is controlled by the communication program and is an initiator at that time. Initiator ID of 1
(Identification), a busy status return circuit that issues a fixed format busy status response according to the SCSI protocol when receiving a start signal, and a mismatch signal when accessed from a second initiator different from the first initiator. Receiving the selection detection signal, the non-coincidence signal, and the state value of the flag, and when the flag is in the second state, outputs the selection detection signal to the microcomputer regardless of the presence or absence of the non-coincidence signal. When the flag is in the first state and the non-coincidence signal is received, the transmission of the selection detection signal to the microcomputer is suppressed, and the start signal is issued to start the busy status return circuit. Is the first
And a logic circuit for transmitting the selection detection signal to the microcomputer when the mismatch signal is not generated, wherein the communication program responds to a first command from a third initiator. When an error occurs during processing, the transfer data including the error sense data is set in the transmission buffer in response to the check condition and the response of the initiator cover in response to the first command, and the flag is set to the first command.
And controls the latch to cause the latch to latch the ID of the third initiator as the first initiator and to receive the second command of request sense from the third initiator. A SCSI protocol control apparatus, wherein the flag is set to a second state when a third command for release recovery is received from the third initiator in response to a response including the error sense data based on the transfer data. .