JP2820263B2 - Method for manufacturing semiconductor device - Google Patents

Description

The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming an interlayer insulating film.

[Conventional technology]

Conventionally, a method of manufacturing a semiconductor device including this kind of interlayer insulating film will be described with reference to a manufacturing process diagram shown in FIG.

First, a field oxide film 2 is formed on a non-active region of a Si substrate 1 by the LOCOS method. Thereafter, a gate electrode 3 having, for example, a tungsten polycide structure is formed in a predetermined portion of the active region of the substrate 1. Next, in order to obtain a transistor having an LDD structure, an n ⁻ diffusion layer 4 and an n ⁺ diffusion layer 5 are formed by ion implantation, respectively. Thereafter, for example, 50
0Å thick NSG (non-doped silicate glass) films 6 and 65
An interlayer insulating film 8 is formed by sequentially depositing a BPSG (boron phosphine silicate glass) film 7 having a thickness of 00 mm.
In this case, the NSG film 6 is formed by the normal pressure CVD method (FIG. 3A).

Next, by annealing at 1000 ° C. for 15 minutes, the interlayer insulating film 8 is made to glass-flow and smoothed. After that, the interlayer insulating film 8 on the n ⁻ · n ⁺ diffusion layers 4 and 5 is partially removed by etching using a known photolithography technique to form a contact hole 9. Then, phosphorus ions are implanted into the contact holes 9 (FIG. 3B).

Thereafter, N ₂ annealing is performed at 900 ° C. for 15 minutes to activate the implanted phosphorus and to form contact holes 9.
Is formed in a tapered shape. Next, a W (tungsten) layer 10 is buried in the contact holes 9 by a selective CVD method. The conditions of the selective CVD at this time are as follows, using the SiH ₄ reduction method,
At a substrate temperature of 270 ° C, the flow rates of SiH ₄ gas and WF ₆ gas are each 5SCC
Perform 100 seconds with M and 10 SCCM. Subsequently, an Al material containing 1.5% Si is deposited to a thickness of 1.0 μm by a sputtering method, and then patterned to form an Al—Si layer 11 on a predetermined portion including the W layer 10.
Was formed to complete the device (FIG. 3c).

[Problems to be solved by the invention]

However, in the conventional manufacturing method, in the step of forming the W layer 10 by the selective CVD method, as shown in FIG.
The W material 10a penetrates into the horizontal interface (Si interface) between the substrate 1 and the NSG film 6, and the diffusion layers 4 and 5 are destroyed by a heat treatment in a later process.
There is a problem that a junction leak current occurs.

In addition, since the BPSG film 7 is thick during the contact flow, the contact opening has an overhang shape. For this reason, uniform growth of the W layer 10 is hindered, and the surface of the W layer 10 is not formed flat, and the Al-
There is a problem that the step coverage of the Si layer 11 is not improved.

In view of the above problems, an object of the present invention is to provide a method for manufacturing a semiconductor device having an interlayer insulating film capable of preventing the W material from entering the Si interface and achieving a good taper of the contact opening. .

[Means for solving the problem]

In order to achieve the above-mentioned object, the present invention provides a step of forming an impurity layer on a predetermined surface of an active region of a semiconductor substrate, and a step of forming a first oxide film containing hydrogen and a thin film having a flow effect by heat treatment on the entire surface of the semiconductor substrate. Forming an interlayer insulating film formed by sequentially laminating an insulating film; smoothing the interlayer insulating film; and selectively etching the interlayer insulating film to form a hole on the impurity layer. Forming a second oxide film on the impurity layer in the opening portion by smoothing the end portion of the interlayer insulating film around the opening portion in a tapered shape by a heat treatment; Forming a third oxide film thicker than the second oxide film by oxidizing a surface of the impurity layer adjacent to the first oxide film on the impurity layer other than the portion; Removing the second oxide film , Consisting of a step of embedding the refractory metal in said opening.

(Operation)

In the present invention, since the Si interface of the contact portion is located higher than the Si interface of the active region other than the contact portion,
Tungsten does not enter the Si interface in the active region other than the contact portion. Further, since the insulating film having the glass flow effect is formed in a thin film, overhang of the opening of the contact portion during the contact flow is prevented. Therefore, the tungsten is formed flat, and the step coverage of the Al wiring and the like formed thereon is improved.

〔Example〕

One embodiment of the production method of the present invention will be described with reference to FIG. 1 showing a process diagram and FIG. 2 showing an oxidation rate characteristic diagram.

First, a field oxide film 22 is formed on the non-active area of the Si substrate 21 by the LOCOS method. Thereafter, a gate electrode 23 having a tungsten polycide structure is formed on a predetermined portion of the active area of the substrate 21.
Is formed, an n ⁻ diffusion layer 24 and an n ⁺ diffusion layer 25 serving as the source / drain of the LDD transistor are formed by ion implantation, respectively. Next, the substrate temperature is 100 ° C., and the deuterium lamp is irradiated with the Si ₂ H ₆ / O ₂ gas flow ratio being 0.11. As a result, an SiO ₂ film having 6 × 10 ⁻³ % of Si—H groups remaining on the entire surface of the substrate 21
Deposit 26. Further, a BPSG film 27 having a thickness of 0.2 μm is deposited thereon by a normal pressure CVD method at a substrate temperature of 400 ° C. afterwards,
Anneal in N ₂ gas at 1000 ° C. for 15 minutes to cause the BPSG film 27 to glass-flow. Next, the SiO ₂ film 26 and the BPS
The interlayer insulating film 28 made of the G film 27 is partially etched away to form a contact hole 29 on the n ⁻ .n ⁺ diffusion layers 24 and 25. Then, phosphorus is supplied from the contact hole 29 to the substrate.
Ion implantation is performed on the surface 21 (FIG. 1a). The SiO ₂ film 26
Is not limited to the optical CVD method, but may be formed by a plasma CVD method.

Next, annealing is performed for 30 minutes in O ₂ gas at 900 ° C.
This activates the implanted ions and smoothes the shape of the contact hole 29 into a tapered shape. Further, at this time, SiO ₂ films 30 and 31 are simultaneously formed on the contact portions of the diffusion layers 24 and 25 and on the diffusion layers 24 and 25 other than the contact portions. in this case,
Since the oxidation rate becomes higher on the diffusion layers 24 and 25 other than the contact portions, the SiO ₂ film 31 is formed to be thicker than the SiO ₂ film 30. This is because the hydrogen contributes to an increase in the oxidation rate due to the presence of the SiO ₂ film 26 containing hydrogen on the diffusion layers 24 and 25 other than the contact portions, and the diffusion layers 24 and
This is because the surface of 25 is oxidized more rapidly than the diffusion layer of the contact portion. Furthermore, a BPSG film deposited on the SiO ₂ film 26
Since 27 also contains a small amount of Si-H groups, the BPSG film 27 also increases the oxidation rate as shown in FIG. 2 (FIG. 1b).

Next, the SiO ₂ film 30 is removed with diluted hydrofluoric acid to obtain a structure in which the Si interface 32 of the contact portion is positioned higher than the Si interface 33 other than the contact portion. After that, the W
A layer 34 is buried in the contact hole 29 to the extent of the thickness of the SiO ₂ film 26 (FIG. 1c).

Thereafter, an Al-Si film 35 is formed on a predetermined portion including the W layer 34 to complete the device (FIG. 1d).

Thus, according to the present invention, since the Si interface 32 is located higher than the Si interface 33, the W material is prevented from entering the Si interface 33. Further, since the BPSG film 27 is formed thin, the contact hole 29 does not have an overhang shape at the time of contact flow, and the opening becomes smooth. In addition, since the embedded W layer 34 is embedded up to the interface between the BPSG film 27 and the SiO ₂ film 26, the step coverage of the Al—Si film 35 is improved.

〔The invention's effect〕

According to the present invention described above, by utilizing the difference in oxidation rate between the second SiO ₂ film and the third SiO ₂ film, Si interface of the active area Si interface other than the contact portion of the contact portion Since the height is higher, the penetration of the tungsten (W) into the Si interface in the active region other than the contact portion can be suppressed. Further, since the insulating film having the flow effect is formed in a thin film, the contact hole can be tapered well without overhanging the contact hole during the contact flow. Therefore, the embedding time of the W layer can be reduced,
The above-mentioned problem can be solved by a unique effect such that the surface of the W layer can be flattened and the step coverage of Al wiring and the like can be improved.

[Brief description of the drawings]

1 and 2 show an embodiment of the method of the present invention. FIG. 1 shows a manufacturing process, FIG. 2 shows an oxidation rate characteristic, and FIGS. 3 and 4 show a conventional example. FIG. 3 is a manufacturing process diagram, and FIG. 4 is a sectional view of the device. 21 ... Si substrate, 22 ... Field oxide film, 23 ... Gate electrode, 24 ... n ^- diffusion layer, 25 ... n ⁺ diffusion layer, 26 ... SiO
₂ film, 27… BPSG film, 28… interlayer insulating film, 29… contact hole, 30, 31… SiO ₂ film, 34… W layer, 35… Al
-Si film.

Claims (1)

(57) [Claims] A step of forming an impurity layer on a predetermined surface of an active region of a semiconductor substrate; sequentially stacking a first oxide film containing hydrogen and a thin insulating film having a flow effect by heat treatment on the entire surface of the semiconductor substrate. Forming an interlayer insulating film comprising: forming the interlayer insulating film; smoothing the interlayer insulating film; selectively etching the interlayer insulating film to form an opening on the impurity layer; Forming an end portion of the interlayer insulating film in the vicinity of the opening portion in a tapered shape, forming a second oxide film on the impurity layer in the opening portion, and forming the impurity layer other than the opening portion; Forming a third oxide film thicker than the second oxide film by oxidizing a surface of the impurity layer adjacent to the first oxide film on the second oxide film; A step of removing the film; The method of manufacturing a semiconductor device, which comprises a step of embedding a metal.