JP2713744B2 - Magnetoelectric conversion element - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a magnetoelectric conversion element that detects a magnetic field and outputs a signal.

[Prior Art] Several structures are known for a Hall element using a group III-V compound semiconductor. For example, i) III- such as GaAs
A structure in which an element such as Si is directly implanted on a group V compound semiconductor single crystal substrate by an ion implantation method to form a magnetically sensitive portion to form an element, a single crystal substrate of a III-V compound such as GaAs or a single crystal such as sapphire. There is a structure in which a magneto-sensitive part of a group III-V compound semiconductor thin film is formed by MBE or vacuum deposition on a substrate of crystal, glass, ceramics, or the like, and an electrode is formed thereon to form an element. Ii) A thin film formed by vapor-depositing a group III-V compound semiconductor on a smooth surface such as mica is adhered on a support such as ferrite or alumina with an adhesive as an organic insulating layer, After removal of mica, and a structure in which the semiconductor layer of i) is mounted on ferrite or the like to obtain a large hole output. In particular, the structure ii) has an advantage that excellent performance (for example, a large hole output can be obtained by using ferrite or the like) by appropriately selecting the material of the support, and is widely used. ing. However, these Hall elements are going to be used in various fields including the automobile field beyond the range of household appliances which have been used recently. In these new fields, use conditions are becoming stricter, such as a requirement for heat resistance.

The Hall element of the type ii) in which the compound semiconductor layer and the support are bonded to each other with an organic insulating layer is desired to be used in a high-temperature region because of its characteristics such as high sensitivity. The general consideration of the adhesive and the compound semiconductor layer, such as the method of using the adhesive, is insufficient, and there is no problem in the normal temperature range.However, if the element is excessively heated, the unbalanced voltage and resistance will increase. Fluctuating phenomena, stability at high temperature,
Not reliable enough.

[Problems to be Solved by the Invention] The thermosetting resin adhesive used as an organic insulating layer, which has been used for bonding the Hall element, has a high adhesive strength, moisture resistance,
Responsibility and the like are considered important, and resins having a glass transition point of about 150 ° C. to 180 ° C. are widely used due to their chemical structures. However, in these resins, the elastic modulus decreases from a temperature 20 to 30 ° C lower than the glass transition point, and when exposed to a temperature of 130 ° C to 150 ° C, unbalanced voltage changes and development in which the resistance fluctuates are also observed. I have. Further, when the adhesive exceeds the glass transition point, the coefficient of thermal expansion becomes several times larger. Therefore, at such a high temperature, the above-mentioned problem becomes more serious. Therefore, when an adhesive having a low glass transition temperature is used, the element is heated during the assembly (wire bonding) of the element.
When a shock load is applied by a capillary or a large horizontal vibration is applied by an ultrasonic wave, a large displacement is generated on the fragile resin surface, and the chip on the resin tends to crack, which is acceptable. At present, the range of operating conditions is narrowing, which is a major problem during mass production.

An object of the present invention is to improve stability and reliability at a high temperature in a Hall element having a structure in which a compound semiconductor chip on which a Hall element is formed is bonded on a support with an adhesive as an organic insulating layer. Another object of the present invention is to provide an extremely large Hall element that is industrially mass-produced.

[Means for Solving the Problems] The present inventors have made intensive efforts to solve the above-mentioned drawbacks, and have reached the present invention.

That is, in the present invention, a III-V compound semiconductor layer in which a Hall element is formed is formed on a support having an organic insulating layer on the surface, and the organic insulating layer has a glass transition temperature of 230 ° C. or higher. It is a curable resin.

The compound semiconductor layer is formed by forming a compound semiconductor thin film of InAs, InSb, GaAs, or the like on mica by MBE or vapor deposition, and further forming a passivation layer thereon to remove the mica, a thin film of GaAs, sapphire, Compound semiconductors such as InAs, InSb, and GaAs are deposited on a substrate such as silicon by MBE, LPE, CV
A thin film formed by D method, MOCVD method or evaporation method,
Further, an ion-implanted GaAs substrate is used.

The support on which the semiconductor layer is placed is not particularly limited. For example, magnetic oxides such as Mn-Zn ferrite and Ni-Zn ferrite, high-permeability metal materials such as permalloy, alumina, aluminum nitride, silica And the like, an amorphous material such as glass, and a single crystal such as sapphire.

The thermosetting resin used as the organic insulating layer of the present invention has a glass transition point of 230 ° C. or higher, and more preferably has a minimum viscosity of 1 poise or less during thermosetting.
The thickness of the organic insulating layer is not particularly limited, but is 60 μm or less, preferably 20 μm or less. There is no particular limitation on the structure of the thermosetting resin, but preferred examples include a polyimide resin, an imide-modified epoxy resin, an alicyclic epoxy resin, and a glycidylamine epoxy resin. The passivation layer may be any as long as it has an effect of preventing intrusion of moisture and halogen from the outside, and preferably, an inorganic thin film such as Al ₂ O ₃ , SiO _x , Si ₃ N ₄ is used. In some cases, an organic polymer such as polyimide may be used.

[Operation] According to the present invention, the adhesive resin, which is an organic insulating layer between the compound semiconductor chip and the support on which the compound semiconductor is mounted, has a glass transition temperature of 230 ° C. or higher, and more preferably a thermosetting resin. By using a resin with a minimum viscosity of 1 poise or less, a thin heat-resistant adhesive layer is possible, and even when used at high temperatures where heat resistance is required, there is little change in unbalanced voltage and resistance value, and stable And a highly reliable Hall element can be manufactured. Furthermore, by using a resin having the above characteristics, the operation at the time of wire bonding can be performed at a temperature equal to or lower than the glass transition point of the resin, and the reliability of industrially mass-produced elements can be further improved. When the compound semiconductor layer on which the Hall element is formed is a compound semiconductor thin film, by applying a passivation film to the lower portion of the thin film, even if the resin having the above characteristics has poor moisture resistance, it can be used at high temperature and high humidity. Can be used for Examples are shown below, but the present invention is not limited to these examples.

[Example] Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

Embodiment 1 FIG. 1 shows a cross section of an embodiment of the present invention.

A semiconductor film 14 was formed by forming an InAs thin film on mica having a smooth surface by MBE evaporation. Further, an Al ₂ O ₃ (thickness 0.3 μm) thin film 13 was formed thereon as a passivation layer by a vacuum evaporation method. A polyimide resin 12 having a glass transition temperature of 250 ° C. (Toshiba Chemical CT430) is applied to the surface of the Al ₂ O ₃ thin film, and is adhered to a ferrite substrate 11 having a thickness of 0.3 mm and a square of 50.8 mm on a side. The mica was removed. Thereafter, an electrode 15 was formed using a photoresist by a commonly used method, and a pattern of a magnetically sensitive portion was formed. Thereafter, a thin film of Al ₂ O ₃ (thickness: 0.3 μm) was formed by a vacuum evaporation method as a passivation layer 16 for protecting the magnetically sensitive portion, and a silicon resin was further applied. Next, the wafer was cut with a dicing cutter to produce chips. The chip was bonded to the lead frame 22 with a die bond resin 50, and the electromagnetic portion 15 of the pellet and the lead frame 22 were joined by wire bonding. Subsequently, molding was performed with the resin 23 to form a Hall element. Table 1 shows the change (average) and deviation of the unbalance voltage Vu before and after the soldering heat test of the Hall element. The soldering heat resistance test here refers to a change in characteristics before and after the element 4 terminal is immersed in a solder bath at each temperature for 10 seconds. Table 2 shows the defect rate of the element at the time of the solder heat resistance test.

Comparative Example 1 The adhesive resin 12 in Example 1 was changed to a polyimide resin (Toshiba Chemical TVB2703A: glass transition temperature 172 ° C.)
Other than that produced the element similarly to Example 1. Tables 1 and 2 show the results of the heat resistance test.

As shown in Tables 1 and 2, in the device according to the present invention, both the change in the unbalanced voltage after the heat resistance test and the defective rate are small.

Example 2 A Hall element was prepared in the same manner as in Example 1 except that the ferrite substrate in Example 1 was changed to an alumina substrate, and the ferrite chip 42 was not mounted. Table 3 shows changes and deviations of the unbalanced voltage before and after the soldering heat test of the Hall element.

Comparative Example 2 An element was produced in the same manner as in Example 2 but using the same adhesive resin as in Comparative Example 1. Table 3 shows the results of the heat resistance test.

Example 3 A device was prepared in the same manner as in Example 1 except that alumina was changed to SiO _x (thickness 0.5 μm) as the passivation layer in Example 1. Table 4 shows the results of the soldering heat test of this Hall element, and Table 5 shows the element failure rate.

Comparative Examples 3 to 5 In the same manner as in Example 3, devices were formed using adhesive resins having different glass transition points. Table 4 shows the results of the solder heat resistance test of the Hall element, and Table 5 shows the element failure rate.

As shown in Tables 3 to 5, the device of the present invention shows better heat resistance than the comparative example even when the ferrite for magnetic focusing is not used and regardless of the type of the passivation film.

Example 4 On a GaAs single crystal substrate having a mirror-finished surface (a square having a side of 50.8 mm), an In film having a thickness of 1 μm and an electron mobility of 10,000 cm ² / Vsec
As thin films were heteroepitaxially grown by MBE to produce semiconductor thin films. Next, a polyimide resin having a glass transition temperature of 250 ° C. is applied to the GaAs substrate surface, and a thickness of 0.3 μm is applied.
It was bonded to a square ferrite substrate with a side of 50.8 mm. Thereafter, the InAs method is used in the same manner as in the second embodiment.
A Hall element was created. As a result of the soldering heat test of this Hall element, the difference (average) ± deviation of the unbalanced voltages at 300 ° C. was 0.51 ± 0.43 mV / 3V.

Example 5 The semiconductor film formed on mica in Example 1 was changed to InSb.
An Sb Hall element was created. The result of the soldering heat test using this device shows the unbalanced voltage change at 300 ° C (average).
The deviation was 0.91 ± 0.48mV / 3V.

Example 6 As passivation layer 16 in Example 1, Si ₃ N ₄
Was formed by a 0.5 μm thick PCVD method.
An InAs Hall element was prepared in the same manner as described above. As a result of a soldering heat test using this device, the unbalanced voltage change (average) ± deviation at 300 ° C. was 0.60 ± 0.25 mV / 3V.

Example 7 Al ₂ O ₃ was used as the passivation layer 16 in Example 1.
(0.3 μm) and SiO ₂ (0.3 μm) thin films were formed by a vacuum evaporation method.
As Hall element was created. A high-temperature conduction test (150 ° C., 20 mA, 500 hours) was performed using this device. The results are shown in Table 6.

Comparative Example 6 A device was prepared in the same manner as in Example 7 except that the adhesive resin in Example 7 was changed to a polyimide resin (Toshiba Chemical, TVB2703A, curing agent Percure HV106, glass transition temperature 172 ° C.). Using this device, a high-temperature energization test was performed. The results are shown in Table 6.

Example 8 A semiconductor layer in which Si ions were implanted by an ion implantation method was formed on a GaAs single crystal substrate having a square side of 50.8 mm and a mirror surface. Next, a glass transition temperature of 25
Apply polyimide resin at 0 ℃, thickness 0.3mm, side is 50.8m
It was adhered to a ferrite substrate having a square shape of m. Thereafter, a GaAs Hall element was manufactured in the same manner as in Example 2. The result of the soldering heat test of this Hall element is 300
The difference (average) ± deviation of the unbalanced voltage is 0.45 ± 0.41
mV / 3V.

[Effects of the Invention] As described above, according to the present invention, excellent heat resistance is obtained regardless of the type of compound semiconductor, the type of passivation film, and the type of substrate, and regardless of the presence or absence of a ferrite chip for magnetic focusing. And use at high temperatures is possible.

[Brief description of the drawings]

 FIG. 1 is a sectional view of one embodiment of the present invention. 11 ... substrate, 12 ... organic insulating layer (adhesive), 13 ... lower passivation layer, 14 ... semiconductor film, 15 ... electrodes, 16 ... upper passivation layer, 22 ... lead frame, 23 ... Mold resin, 41: Silicon resin (adhesive), 42: Ferrite chip, 50: Die bond adhesive resin layer.

Claims (1)

(57) [Claims] 1. On a support having an organic insulating layer on the surface,
A III-V compound semiconductor layer on which a Hall element is formed is formed, and the organic insulating layer has a glass transition temperature of 23.
A thermoelectric resin, which is a thermosetting resin having a temperature of 0 ° C. or higher.