JPH0462474B2 - - Google Patents

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Publication number
JPH0462474B2
JPH0462474B2 JP60099395A JP9939585A JPH0462474B2 JP H0462474 B2 JPH0462474 B2 JP H0462474B2 JP 60099395 A JP60099395 A JP 60099395A JP 9939585 A JP9939585 A JP 9939585A JP H0462474 B2 JPH0462474 B2 JP H0462474B2
Authority
JP
Japan
Prior art keywords
layer
substrate
thickness
electrode
thin film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60099395A
Other languages
Japanese (ja)
Other versions
JPS61256776A (en
Inventor
Takashi Kajino
Ichiro Shibazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Asahi Chemical Industry Co Ltd
Original Assignee
Asahi Chemical Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Asahi Chemical Industry Co Ltd filed Critical Asahi Chemical Industry Co Ltd
Priority to JP60099395A priority Critical patent/JPS61256776A/en
Priority to DE3590792A priority patent/DE3590792C2/de
Priority to KR1019870700006A priority patent/KR910002313B1/en
Priority to NLAANVRAGE8520325,A priority patent/NL188488C/en
Priority to DE19853590792 priority patent/DE3590792T/de
Priority to PCT/JP1985/000572 priority patent/WO1986006878A1/en
Publication of JPS61256776A publication Critical patent/JPS61256776A/en
Priority to US07/325,129 priority patent/US4908685A/en
Publication of JPH0462474B2 publication Critical patent/JPH0462474B2/ja
Granted legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01023Vanadium [V]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Description

【発明の詳細な説明】[Detailed description of the invention]

〔産業上の利用分野〕 本発明はホール素子、磁気抵抗効果素子など磁
界ないし磁束を電気信号に変換する磁電変換素子
に関するものである。 〔従来の技術〕 従来、−族化合物半導体を用いた磁電変換
素子の電極構造は半導体層にオーミツクコンタク
ト層を形成後、蒸着法等によりAu,Al等のワイ
ヤーボンデイング性の良好な金属層を形成し、こ
れを300〜400℃付近に加熱して圧着もしくは超音
波と圧着の並用によりAu,Al等の細線を接続す
る方法が用いられている。しかるに、表面に有機
物絶縁層を有する基板上に形成された化合物半導
体膜上にこの方法を適用しようとすると、つぎの
ような2つの問題を生じる。 その第一は、ボンデイング時に温度を十分に上
げられないことである。通常行われているように
電極部の温度を300〜400℃に上げると、ボンデイ
ング時に有機物絶縁層と半導体膜との間での剥離
が生ずる。この原因は、絶縁層と化合物半導体層
とは熱膨張率が異なるため、電極部の温度を上昇
させると絶縁層と半導体膜との界面に熱応力が集
中することにあると推定される。 第2は、有機物絶縁層がやわらかく、Siなどの
結晶にくらべて、超音波の圧着がむずかしいこと
である。このため、通常行われているような大き
な超音波パワーを印加すると、絶縁層と半導体膜
との間で剥離を生じてしまう。 〔発明が解決しようとする問題点〕 そこで、本発明の目的は、絶縁性の基板、すな
わち基板自体が絶縁材もしくは表面に絶縁層を有
する基板上に形成された厚さ0.1〜10μmの化合物
半導体薄膜に低温で低いエネルギーの超音波で高
収率かつ強固で高信頼性のワイヤーボンデイング
を可能にし、ワイヤーボンデイングの収率を大幅
に改善し、磁電変換素子の信頼性を飛躍的に増大
するとともに、工業的に量産性の極めて大なる磁
電変換素子を提供することにある。 〔問題点を解決するための手段〕 本発明者らは、上述の如き従来技術の欠点を除
くため広汎な電極構造と材質についての検討を行
つた結果、オーミツク電極であるCu層の上に、
Niの層を介在させ、更にその上部にAuのボンデ
イング層を形成する三層の構造とし、Cu,Niの
層をそれぞれ0.5μm以上、好ましくは、それぞれ
1.0μm以上厚くつけることにより、下部の有機物
絶縁層の弾力又はへこみをおさえることによるワ
イヤーボンデイング時の超音波印加を効率化し得
ることを見い出し、信頼性の大なる、強固なワイ
ヤーボンデイング電極を有する磁電変換素子を製
作し、本発明を完成した。 すなわち、本発明は、表面に厚さ30μm以下の
有機物絶縁層を有する基板上に厚さ0.1〜10μm、
電子移動度が2000〜80000cm2/V・secの−族
化合物半導体膜が形成され、半導体膜上の所要の
部分にCu層が形成されその上にNi層が形成され、
Ni層の上にAu層が形成されて電極が構成された
ことを特徴とする。 〔作 用〕 本発明によれば、表面に有機物絶縁層を有する
基板上に厚さが0.1〜10μm、電子濃度が5×1015
〜5×1018cm-3の範囲内にあり、室温で電子移動
度が、2000〜80000cm2/V・secの−族の高移
動度化合物半導体膜が形成され、その半導体膜上
の所要の部分に電極が形成されるが、その電極は
半導体層の上にCu層が形成され、その上にNi層
が形成され、その上にAu層が形成されてなる。 〔実施例〕 本発明の磁電変換素子の1つであるホール素子
の1例を第1図に示す。第1図において、ホール
素子の基板12上に有機物絶縁層13が形成さ
れ、該層上に化合物半導体薄膜から成るホール素
子が形成されている。即ち、感磁部を構成する高
電子移動度の半導体膜14が基板11上に形成さ
れ、半導体膜14の所要の部分にワイヤーボンデ
イング用電極15が形成されている。この電極1
5は半導体膜14とオーミツク接触するCu層1
6、このCu層16上のNi層17、更にその上の
Au層18の3層から成る。電極間の中央部の半
導体膜14はホール素子感磁部19を形成する。
この感磁部19を覆つてシリコーン樹脂41を付
着する。このようなワイヤーボンデイング電極を
有する本発明の磁電変換素子においては、電極1
5はAu,Al,Al−Si合金等の細線21でリード
フレーム22にワイヤーボンデイングによつて接
続される。基板12は接着樹脂層50を介してリ
ードフレーム22に接着される。更に、リードフ
レーム22の端部を残して基板11、細線21な
どは樹脂のモールド体23内に埋込まれて、パツ
ケージ又はモールドされる。 第2図は第1図示のホール素子を上面からみた
状態を示す。 第3図および第4図は本発明のホール素子をリ
ードフレーム22を介することなく、プリント配
線用基板に直接取付けた例である。すなわち、プ
リント基板24に形成された配線25に細線21
が接続される。 第5図は、フエライト基板12′とフエライト
による磁気収束チツプ42で磁電変換素子の感磁
部をサンドイツチした構造を有する本発明のホー
ル素子の例である。 第6図は半導体層14と有機物絶縁層13との
中間に無機質の絶縁層26が形成されている本発
明の磁電変換素子であるホール素子の例である。 以上のように、本発明では、ワイヤーボンデイ
ング用電極15はCu層16、Ni層17、Au層1
8の3層より成る。この3層構造の電極を形成す
ることにより、絶縁性基板11上の半導体薄膜1
4に対し、低いパワーの超音波印加でかつ低温で
高信頼性のワイヤーボンデイング接合を形成する
ことが可能となる。 Au層、Ni層あるいはCu層の形成には、無電解
メツキ法、電解メツキ法、蒸着またはスパツタリ
ングによるリフトオフ法等の通常の半導体素子の
電極形成に用いる方法が用いられる。Au層18、
Ni層17、Cu層10の層厚は特に限定されない
が、通常は0.1〜30μm、好ましくは0.1〜10μmが
よい。 本発明磁電変換素子の基板12は、一般の磁電
変換素子に用いられているものでよく、単結晶も
しくは焼結フエライト基板、セラミツク基板、ガ
ラス基板、シリコン基板、サフアイア基板、耐熱
性の樹脂基板、強磁性体である鉄、パーマロイ等
の基板等が用いられる。 基板の表面の有機物絶縁層13は有機物である
樹脂の絶縁体層が好ましく用いられる。 樹脂の絶縁体層13は、通常、基板11と高移
動度半導体膜14との接着層として好ましく用い
られているものであり、通常用いられている熱硬
化性のエポキシ樹脂、フエノールエポキシ樹脂や
東芝セラミツク製のTVB樹脂等が用いられる。
又、その絶縁体層13の厚さは、特に限定されな
いが、60μm以下であり、好ましくは30μm以下
である。 本発明磁電変換素子では、第6図に示すよう
に、感磁部の半導体層と有機物絶縁層の中間に無
機質のうすい絶縁層が形成されることも行われ
る。この場合、無機質の絶縁層は、SiO2,SiO,
Al2O3,Si3N4などのうすい被膜から成り、通常
その厚みは2μm以下、好ましくは500Å〜10000
Åの範囲である。 図示はしていないが、本発明の磁電変換素子で
は、半導体膜14の上面に無機質の薄い絶縁層が
パシベーシヨン層として形成されてもよい。この
場合の無機質の絶縁層は、SiO2,SiO,Al2O3
Si3N4などの被膜からなり、通常その厚みは2μm
以下、好ましくは500〜100000Åの範囲である。 感磁部半導体膜14は、通常の磁電変換素子と
して用いられる高移動度の−族化合物半導体
膜がよく、更に、In又はAsのいずれか、又は両
方を同時に含む−族の化合物半導体の二元、
三元の半導体は好ましいものである。特にInSb,
InAsが高い移動度を示すため好ましく用いられ
る。用いられる半導体膜の電子移動度は2000〜
80000cm2/V・secの範囲内にあり、単結晶もしく
は多結晶の薄膜が用いられる。 半導体膜の形成には、LPE法、CVD法、
MOCVD法、蒸着法、MBE法等通常の半導体薄
膜の形成法であれば何でもよい。特に、MBE法
は、結晶性の良好な半導体膜が得られ、高電子移
動度の膜ができ、しかもまた磁電変換素子の感度
に非常に大きな影響を持つ因子である膜厚の制御
性が良いので好ましい。また半導体薄膜の形成に
は、単結晶もしくは多結晶の半導体ウエーハより
研磨法により、薄膜化する方法も用いられてい
る。 磁電変換素子の電極15はAu,Al,Al−Si合
金等の通常ワイヤーボンデイングに用いられる細
線21により、リードフレーム22又はプリント
基板上に形成された配線パターン25等の導体に
電気的に結合される。 プリント基板24上に結線する場合において、
用いるプリント基板24は通常の電子部品の配線
に用いられるものでよい。その配線導体上にAu,
Ag等のボンデイング性の良好な薄層を形成する
ことも好ましく行なわれる。 本発明磁電変換素子は、通常樹脂モールドによ
り形成される。 モールド樹脂23の材質は、一般に電子素子の
モールドに使用されている樹脂でよい。好ましい
ものは、熱硬化性樹脂で、エポキシ樹脂、フエノ
ールエポキシ樹脂等がある。そのモールド方法
は、通常の電子部品で行われている方法でよく、
例えば、注型モールド、トランスフアーモール
ド、固形ペレツトを素子上に置き加熱溶融後、硬
化してモールドする等の方法がある。 以上、本発明の磁電変換素子の1例としてホー
ル素子を例にとり説明してきたが、他の素子、例
えば磁気抵抗効果素子についても、ホール素子と
は、その電極形状、端子電極の個数、感磁部のパ
ターンが異なるが、ホール素子と同く同様に電極
形成がなされ、基本構成については同一である。 以下、本発明を具体例をもつて説明するが、本
発明はこれらの例のみに限定されるものではな
く、先に述べた基本構造を持つ全ての磁電変換素
子に及ぶものである。 第1例 表面が平滑な単結晶マイカ基板上に、厚さ1μ
m、電子移動度30000cm2/V・secのInSb薄膜を
真空蒸着により形成して半導体膜14を作つた。
このInSb薄膜の表面にエポキシ樹脂を塗布し、
厚さ0.3mm、一辺が45mmの正方形をしたセラミツ
ク基板12上に接着した。ついで前記マイカを除
去した。その後フオトレジストを使用し、通常行
われている方法でInSb薄膜の感磁部の表面上に
フオトレジスト被膜を形成した。次に、無電解メ
ツキを行い、銅を厚さ0.3μm所要の部位のみに付
着させた。さらに銅の厚付けを行う為、電解銅メ
ツキを行い、厚さ2μm、Cu層16を形成した。
次に上記のフオトレジストを再度用い、電極部の
みに厚さ2μmのNi層17を電解メツキ法により
形成した。さらにその上に電解メツキにより厚さ
2μmのAu層18を形成した。次に上記のフオト
レジストを再度用い、フオトリソグラフイーの手
法により、不要なInSb薄膜及び、一部の不要な
銅を塩化第2鉄の塩酸々性溶液でエツチング除去
し、ホール素子の感磁部および4つの電極部を形
成した。ついでシリコーン樹脂により感磁部の真
上にコーテイングを行い、保護膜を形成した。次
に、このウエーハをダイシングカツターにかけ、
1.1×1.1mmの方形のホール素子に切断した。次に
これをリードフレーム22のアイランド51上に
接着した。次にペレツトの電極15とリードフレ
ーム22とを高速ワイヤーボンダーを用い、Au
細線21で結合した。ついでエポキシ樹脂により
トランスフアーモールド法でパツケージ化した。 このようにして製作したこの発明を適用したホ
ール素子のワイヤーボンデイング時の不良率は第
1表中のの如くであつた。
[Industrial Application Field] The present invention relates to a magneto-electric conversion element, such as a Hall element or a magnetoresistive element, which converts a magnetic field or magnetic flux into an electric signal. [Conventional technology] Conventionally, the electrode structure of a magnetoelectric transducer using a - group compound semiconductor involves forming an ohmic contact layer on a semiconductor layer, and then applying a metal layer with good wire bondability such as Au or Al using a vapor deposition method. A method is used in which fine wires of Au, Al, etc. are connected by forming a wire, heating the wire to around 300 to 400° C., and then crimping or using a combination of ultrasonic waves and crimping. However, when this method is applied to a compound semiconductor film formed on a substrate having an organic insulating layer on the surface, the following two problems occur. The first problem is that the temperature cannot be raised sufficiently during bonding. If the temperature of the electrode portion is raised to 300 to 400°C, as is commonly done, separation will occur between the organic insulating layer and the semiconductor film during bonding. The reason for this is presumed to be that since the insulating layer and the compound semiconductor layer have different coefficients of thermal expansion, increasing the temperature of the electrode portion causes thermal stress to concentrate at the interface between the insulating layer and the semiconductor film. The second problem is that the organic insulating layer is soft and difficult to apply ultrasonic pressure to, compared to crystals such as Si. For this reason, when a large ultrasonic power is applied as is usually done, separation occurs between the insulating layer and the semiconductor film. [Problems to be Solved by the Invention] Therefore, an object of the present invention is to provide a compound semiconductor with a thickness of 0.1 to 10 μm formed on an insulating substrate, that is, the substrate itself is an insulating material or has an insulating layer on the surface. It enables high-yield, strong, and highly reliable wire bonding to thin films using low-temperature, low-energy ultrasonic waves, greatly improving the yield of wire bonding and dramatically increasing the reliability of magnetoelectric conversion elements. The object of the present invention is to provide an extremely large magnetoelectric conversion element that can be industrially mass-produced. [Means for Solving the Problems] The present inventors investigated a wide range of electrode structures and materials in order to eliminate the drawbacks of the prior art as described above, and found that
A three-layer structure with a Ni layer interposed and an Au bonding layer formed on top of the Ni layer is used, and the Cu and Ni layers are each 0.5 μm or more thick, preferably each.
It was discovered that by applying a layer thicker than 1.0 μm, the elasticity or denting of the lower organic insulating layer can be suppressed, thereby increasing the efficiency of applying ultrasonic waves during wire bonding. A conversion element was manufactured and the present invention was completed. That is, the present invention provides a substrate having an organic insulating layer with a thickness of 0.1 to 10 μm on the surface,
A − group compound semiconductor film with an electron mobility of 2000 to 80000 cm 2 /V·sec is formed, a Cu layer is formed at a required portion on the semiconductor film, and a Ni layer is formed on it,
A feature is that an electrode is formed by forming an Au layer on a Ni layer. [Function] According to the present invention, a substrate having an organic insulating layer on the surface has a thickness of 0.1 to 10 μm and an electron concentration of 5×10 15 .
~5×10 18 cm -3 and an electron mobility of 2,000 to 80,000 cm 2 /Vsec at room temperature. An electrode is formed on the semiconductor layer, and the electrode is formed by forming a Cu layer on top of the semiconductor layer, forming a Ni layer on top of the Cu layer, and forming an Au layer on top of the Cu layer. [Example] FIG. 1 shows an example of a Hall element which is one of the magnetoelectric conversion elements of the present invention. In FIG. 1, an organic insulating layer 13 is formed on a substrate 12 of a Hall element, and a Hall element made of a compound semiconductor thin film is formed on this layer. That is, a semiconductor film 14 with high electron mobility constituting a magnetically sensitive part is formed on the substrate 11, and wire bonding electrodes 15 are formed in required portions of the semiconductor film 14. This electrode 1
5 is a Cu layer 1 in ohmic contact with the semiconductor film 14;
6. Ni layer 17 on this Cu layer 16, and further above it
It consists of three layers: Au layer 18; The semiconductor film 14 in the center between the electrodes forms a Hall element magnetic sensing part 19.
Silicone resin 41 is attached to cover this magnetically sensitive portion 19 . In the magnetoelectric transducer of the present invention having such a wire bonding electrode, the electrode 1
5 is connected to a lead frame 22 by wire bonding with a thin wire 21 made of Au, Al, Al-Si alloy, etc. The substrate 12 is bonded to the lead frame 22 via the adhesive resin layer 50. Further, the substrate 11, the thin wires 21, etc., except for the ends of the lead frame 22, are embedded in a resin mold body 23 and packaged or molded. FIG. 2 shows the Hall element shown in FIG. 1 viewed from above. FIGS. 3 and 4 show examples in which the Hall element of the present invention is directly attached to a printed wiring board without using a lead frame 22. FIG. That is, the thin wire 21 is connected to the wiring 25 formed on the printed circuit board 24.
is connected. FIG. 5 shows an example of the Hall element of the present invention having a structure in which the magnetic sensing part of the magnetoelectric transducer is sandwiched between a ferrite substrate 12' and a magnetic convergence chip 42 made of ferrite. FIG. 6 shows an example of a Hall element, which is a magnetoelectric conversion element of the present invention, in which an inorganic insulating layer 26 is formed between a semiconductor layer 14 and an organic insulating layer 13. As described above, in the present invention, the wire bonding electrode 15 includes a Cu layer 16, a Ni layer 17, an Au layer 1
It consists of three layers of 8. By forming this three-layer structure electrode, the semiconductor thin film 1 on the insulating substrate 11
In contrast to No. 4, it is possible to form a highly reliable wire bonding joint at a low temperature and by applying low power ultrasonic waves. For forming the Au layer, Ni layer, or Cu layer, methods used for forming electrodes of ordinary semiconductor devices, such as electroless plating method, electrolytic plating method, and lift-off method using vapor deposition or sputtering, are used. Au layer 18,
The layer thicknesses of the Ni layer 17 and the Cu layer 10 are not particularly limited, but are usually 0.1 to 30 μm, preferably 0.1 to 10 μm. The substrate 12 of the magnetoelectric transducer of the present invention may be one used in general magnetoelectric transducers, such as a single crystal or sintered ferrite substrate, a ceramic substrate, a glass substrate, a silicon substrate, a sapphire substrate, a heat-resistant resin substrate, A substrate made of ferromagnetic material such as iron or permalloy is used. The organic insulating layer 13 on the surface of the substrate is preferably an insulating layer made of an organic resin. The resin insulating layer 13 is normally preferably used as an adhesive layer between the substrate 11 and the high mobility semiconductor film 14, and is made of commonly used thermosetting epoxy resin, phenol epoxy resin, or Toshiba resin. Ceramic TVB resin or the like is used.
Further, the thickness of the insulating layer 13 is not particularly limited, but is 60 μm or less, preferably 30 μm or less. In the magnetoelectric transducer of the present invention, as shown in FIG. 6, a thin inorganic insulating layer is also formed between the semiconductor layer and the organic insulating layer of the magnetically sensitive portion. In this case, the inorganic insulating layer is made of SiO 2 , SiO,
It consists of a thin film of Al 2 O 3 , Si 3 N 4 , etc., and its thickness is usually 2 μm or less, preferably 500 Å to 10,000
It is in the range of Å. Although not shown, in the magnetoelectric transducer of the present invention, a thin inorganic insulating layer may be formed as a passivation layer on the upper surface of the semiconductor film 14. In this case, the inorganic insulating layer is SiO 2 , SiO, Al 2 O 3 ,
It consists of a film such as Si 3 N 4 , and its thickness is usually 2 μm.
The thickness is preferably in the range of 500 to 100,000 Å. The magnetically sensitive semiconductor film 14 is preferably a high-mobility - group compound semiconductor film used as a normal magnetoelectric transducer, and may also be a binary - group compound semiconductor film containing either In or As, or both at the same time. ,
Ternary semiconductors are preferred. Especially InSb,
InAs exhibits high mobility and is therefore preferably used. The electron mobility of the semiconductor film used is 2000~
It is within the range of 80000 cm 2 /V·sec, and a single crystal or polycrystalline thin film is used. For forming semiconductor films, LPE method, CVD method,
Any conventional method for forming semiconductor thin films such as MOCVD, vapor deposition, MBE, etc. may be used. In particular, the MBE method allows the production of semiconductor films with good crystallinity, high electron mobility, and good controllability of film thickness, which is a factor that has a very large effect on the sensitivity of magnetoelectric conversion elements. Therefore, it is preferable. In addition, a method of forming a thin semiconductor film by polishing a single crystal or polycrystalline semiconductor wafer is also used. The electrode 15 of the magnetoelectric conversion element is electrically coupled to a conductor such as a lead frame 22 or a wiring pattern 25 formed on a printed circuit board by a thin wire 21 made of Au, Al, Al-Si alloy, etc., which is usually used for wire bonding. Ru. When connecting on the printed circuit board 24,
The printed circuit board 24 used may be one used for normal wiring of electronic components. Au on the wiring conductor,
It is also preferable to form a thin layer of Ag or the like having good bonding properties. The magnetoelectric transducer of the present invention is usually formed by resin molding. The material of the mold resin 23 may be a resin generally used for molding electronic devices. Preferred are thermosetting resins, such as epoxy resins and phenol epoxy resins. The molding method can be the same as that used for ordinary electronic components.
For example, there are methods such as cast molding, transfer molding, placing a solid pellet on the element, heating and melting it, and then hardening and molding. The Hall element has been described above as an example of the magnetoelectric transducer of the present invention, but other elements, such as magnetoresistive elements, may also be used. Although the part pattern is different, the electrodes are formed in the same way as the Hall element, and the basic configuration is the same. Hereinafter, the present invention will be explained using specific examples, but the present invention is not limited to these examples, but extends to all magnetoelectric transducers having the above-mentioned basic structure. First example: 1μ thick on a single crystal mica substrate with a smooth surface.
The semiconductor film 14 was fabricated by forming an InSb thin film having an electron mobility of 30,000 cm 2 /V·sec and an electron mobility of 30,000 cm 2 /V·sec.
Apply epoxy resin to the surface of this InSb thin film,
It was bonded onto a square ceramic substrate 12 with a thickness of 0.3 mm and a side of 45 mm. The mica was then removed. Thereafter, a photoresist film was formed on the surface of the magnetically sensitive part of the InSb thin film using a conventional method. Next, electroless plating was performed to deposit copper only on the required portions to a thickness of 0.3 μm. Furthermore, in order to thicken the copper, electrolytic copper plating was performed to form a Cu layer 16 with a thickness of 2 μm.
Next, using the above photoresist again, a Ni layer 17 having a thickness of 2 μm was formed only on the electrode portion by electrolytic plating. Furthermore, the thickness is increased by electrolytic plating on top of that.
A 2 μm Au layer 18 was formed. Next, using the above photoresist again, the unnecessary InSb thin film and some unnecessary copper were removed by etching with a hydrochloric acid solution of ferric chloride using photolithography, and the magnetically sensitive part of the Hall element was removed. And four electrode parts were formed. Next, silicone resin was coated directly above the magnetically sensitive part to form a protective film. Next, put this wafer through a dicing cutter,
It was cut into a rectangular Hall element of 1.1 x 1.1 mm. Next, this was adhered onto the island 51 of the lead frame 22. Next, the electrode 15 of the pellet and the lead frame 22 are bonded using a high-speed wire bonder.
They were connected using a thin wire 21. Then, it was packaged using epoxy resin using a transfer molding method. The failure rate of the Hall element manufactured in this manner to which the present invention was applied was as shown in Table 1 during wire bonding.

【表】 第1表において、はInSb薄膜上に直接2μm
のAu層を形成した場合である。 それぞれの場合においてボンデイング時の素子
の温度は100℃である。また、超音波エネルギー
はそれぞれの場合について不良率が最小になるよ
うに選んである。さらに、サンプル数は各2000個
である。不良率は1接合あたりの値である。電極
とAu細線21との間の引張り強度が2g以下のも
のは不良とした。 この結果より明らかなごとく、基板の表面に有
機絶縁層を有する磁電変換素子に於いて、強固
で、かつ収率の良いワイヤーボンデイングができ
ることが明らかになり、しかも工業的な寄与も大
である。 第2例 表面が平滑なマイカ基板上に厚さ1.2μm、電子
移動度10000cm2/V・secのInAs薄膜をMBE法
(分子線エピタキシー法)により形成した。 次に、第1例と同様の方法でInAs薄膜を厚さ
0.3mm一辺が45mmの正方形をしたセラミツク基板
上に接着した。この後は第1例と全く同一の方法
でホール素子を組立てた。この様にして作成した
ホール素子のワイヤーボンデイング時の不良率は
第2表の如くであつた。
[Table] In Table 1, 2 μm is applied directly onto the InSb thin film.
This is the case when an Au layer of In each case, the temperature of the device during bonding was 100°C. Also, the ultrasonic energy was selected to minimize the defective rate in each case. Furthermore, the number of samples is 2000 each. The defective rate is a value per one junction. If the tensile strength between the electrode and the Au thin wire 21 was 2 g or less, it was judged as defective. As is clear from these results, it has become clear that strong and high-yield wire bonding can be performed in magnetoelectric transducers having an organic insulating layer on the surface of the substrate, and the present invention also makes a great contribution to industry. Second Example An InAs thin film having a thickness of 1.2 μm and an electron mobility of 10000 cm 2 /V·sec was formed on a mica substrate with a smooth surface by the MBE method (molecular beam epitaxy method). Next, in the same manner as in the first example, the InAs thin film was
It was glued onto a ceramic substrate with a square shape of 0.3 mm and 45 mm on each side. After this, the Hall element was assembled in exactly the same manner as in the first example. The failure rates of the Hall elements thus produced during wire bonding were as shown in Table 2.

【表】 第2表において、はこの発明を適用したも
の、はInAs薄膜上に直接2μmのAu層を形成し
た場合である。 第3例 表面が平滑な単結晶マイカ基板上に、厚さ1μ
m、電子移動度30000cm2/V・secのInSb薄膜を
真空蒸着により形成して半導体膜14を作つた。
このInSb薄膜の表面にエポキシ樹脂を塗布し、
厚さ0.3mm、一辺が45mmの正方形をしたフエライ
ト基板12上に接着した。ついで前記マイカを除
去した。その後フオトレジストを使用し、通常行
われている方法でInSb薄膜の感磁部の表面上に
フオトレジスト被膜を形成した。次に、無電解メ
ツキを行い、銅を厚さ0.3μm所要の部位のみに付
着させた。さらに銅の厚付けを行う為、電解銅メ
ツキを行い、厚さ2μmのCu層16を形成した。
次に上記のフオトレジストを再度用い、電極部の
みに厚さ2μmのNi層17を電解メツキ法により
形成した。さらにその上に電解メツキにより厚さ
2μmのAu層18を形成した。次に上記のフオト
レジストを再度用い、フオトリソグラフイーの手
法により、不要なInSb薄膜および、一部の不要
な銅を塩化第2鉄の塩酸々性溶液でエツチング除
去し、ホール素子の感磁部及び4つの電極部を形
成した。ついで、シリコーン樹脂により感磁部の
真上に磁気収束用のフエライトのチツプを接着し
た。次に、このウエーハをダイシングカツターに
かけ、1.1×1.1mmの方形のホール素子に切断し
た。次にこれをリードフレーム22のアイランド
51上に接着した。次にペレツトの電極15とリ
ードフレーム22とを高速ワイヤーボンダーを用
い、Au細線21で接合した。エポキシ樹脂によ
りトランスフアーモールド法でパツケージ化し
た。 このようにして製作したこの発明を適用したホ
ール素子のワイヤーボンデイング時の不良率は第
3表中のの如くであつた。
[Table] In Table 2, indicates the case where the present invention is applied, and indicates the case where a 2 μm Au layer is directly formed on the InAs thin film. 3rd example: 1μ thick on a single crystal mica substrate with a smooth surface.
The semiconductor film 14 was fabricated by forming an InSb thin film having an electron mobility of 30,000 cm 2 /V·sec and an electron mobility of 30,000 cm 2 /V·sec.
Apply epoxy resin to the surface of this InSb thin film,
It was adhered onto a square ferrite substrate 12 with a thickness of 0.3 mm and a side of 45 mm. The mica was then removed. Thereafter, a photoresist film was formed on the surface of the magnetically sensitive part of the InSb thin film using a conventional method. Next, electroless plating was performed to deposit copper only on the required portions to a thickness of 0.3 μm. Furthermore, in order to thicken the copper, electrolytic copper plating was performed to form a Cu layer 16 with a thickness of 2 μm.
Next, using the above photoresist again, a Ni layer 17 having a thickness of 2 μm was formed only on the electrode portion by electrolytic plating. Furthermore, the thickness is increased by electrolytic plating on top of that.
A 2 μm Au layer 18 was formed. Next, using the above photoresist again, the unnecessary InSb thin film and some unnecessary copper were removed by etching with a hydrochloric-acidic solution of ferric chloride by photolithography, and the magnetically sensitive part of the Hall element was removed. and four electrode parts were formed. Next, a ferrite chip for magnetic convergence was glued directly above the magnetically sensitive part using silicone resin. Next, this wafer was placed on a dicing cutter and cut into rectangular Hall elements of 1.1×1.1 mm. Next, this was adhered onto the island 51 of the lead frame 22. Next, the pellet electrode 15 and the lead frame 22 were bonded with a thin Au wire 21 using a high-speed wire bonder. Packaged using epoxy resin using transfer molding method. The failure rate of the Hall element manufactured in this manner to which the present invention was applied during wire bonding was as shown in Table 3.

【表】 第3表において、はInSb薄膜上に直接2μm
のAu層を形成した場合である。 それぞれの場合においてボンデイング時の素子
の温度は100℃である。また、超音波エネルギー
はそれぞれの場合について不良率が最小になるよ
うに選んである。さらにまた、サンプル数は各
2000個である。不良率は1接合あたりの値であ
る。電極とAu細線21との間の引張り強度が2g
以下のものは不良とした。 第4例 表面が平滑なマイカ基板上に厚さ1.2μm、電子
移動度10000cm2/V・secのInAs薄膜をMBE法
(分子線エピタキシー法)により形成した。この
InAs薄膜を厚さ0.3mm、一辺が45mmの正方形をし
たフエライト基板上に接着した。この後は第1例
と全く同一の方法でホール素子を組立てた。この
様にして作成したホール素子のワイヤーボンデイ
ング時の不良率は第4表の如くであつた。
[Table] In Table 3, 2 μm is applied directly onto the InSb thin film.
This is the case where an Au layer of In each case, the temperature of the device during bonding was 100°C. Also, the ultrasonic energy was selected to minimize the defective rate in each case. Furthermore, the number of samples is
There are 2000 pieces. The defective rate is a value per one junction. The tensile strength between the electrode and the Au thin wire 21 is 2g.
The following items were considered defective. Fourth Example An InAs thin film having a thickness of 1.2 μm and an electron mobility of 10000 cm 2 /V·sec was formed on a mica substrate with a smooth surface by the MBE method (molecular beam epitaxy). this
An InAs thin film was bonded onto a square ferrite substrate with a thickness of 0.3 mm and a side of 45 mm. After this, the Hall element was assembled in exactly the same manner as in the first example. The failure rate of the Hall elements thus prepared during wire bonding was as shown in Table 4.

【表】 第4表において、はこの発明を適用したも
の、はInAs薄膜上に直接2μmのAu層を形成し
た場合で、それぞれの場合においてボンデイング
時の素子の温度は100℃である。また、超音波エ
ネルギーはそれぞれの場合について不良率が最小
になるように選んである。さらにまた、サンプル
数は各々2000個であり、不良率は1接合あたりの
値である。また、電極とAu細線間の引張り強度
が2g以下のものは不良とした。 このように、本発明の磁電変換素子は、極めて
強固なワイヤーボンデイングが可能であり、収率
が良く、工業的な量産技術とした有用であること
は明らかである。 第5例 表面が平滑な単結晶マイカ基板上に、厚さ1μ
m、電子移動度30000cm2/V・secのInSb薄膜を
真空蒸着により形成して半導体膜14を作つた。
次に、この上に真空蒸着法により、厚さ3000Åの
Al2O3膜を形成した。このAl2O3薄膜の表面にエ
ポキシ樹脂を塗布し、厚さ0.3mm、一辺が45mmの
正方形をしたフエライト基板12上に接着した。
ついで前記マイカを除去した。その後フオトレジ
ストを使用し、通常行われている方法でInSb薄
膜の感磁部の表面上にフオトレジスト被膜を形成
した。次に、無電解メツキを行い、銅を厚さ0.3μ
m所要の部位のみに付着させた。さらに銅の厚付
けを行う為、電解銅メツキを行い、厚さ2μmの
Cu層16を形成した。次に上記のフオトレジス
トを再度用い、電極部のみに厚さ2μmのNi層1
7を電解メツキ法により形成した。さらにその上
に電解メツキにより厚さ2μmのAu層18を形成
した。次に上記のフオトレジストを再度用い、フ
オトリソグラフイーの手法により、不要なInSb
薄膜および、一部の不要な銅を塩化第2鉄の塩
酸々性溶液でエツチング除去し、ホール素子の感
磁部及び4つの電極部を形成した。後にシリコー
ン樹脂により感磁部の真上に磁気収束用のフエラ
イトのチツプを接着した。次に、このウエーハを
ダイシングカツターにかけ、1.1×1.1mmの方形の
ホール素子に切断した。次にこれをリードフレー
ム22のアイランド51上に接着した。次にペレ
ツトの電極15とリードフレーム22とを高速ワ
イヤーボンダーを用い、Au細線21で接合した。
エポキシ樹脂によりトランスフアーモールド法で
パツケージ化した。 このようにして製作したこの発明を適用したホ
ール素子のワイヤーボンデイング時の不良率は第
5表中のの如くであつた。
[Table] In Table 4, indicates the case where the present invention is applied, and indicates the case where a 2 μm Au layer is directly formed on the InAs thin film, and in each case, the temperature of the device during bonding is 100°C. Also, the ultrasonic energy was selected to minimize the defective rate in each case. Furthermore, the number of samples was 2000 each, and the defective rate was the value per one junction. In addition, those with a tensile strength of 2 g or less between the electrode and the Au thin wire were judged to be defective. As described above, it is clear that the magnetoelectric transducer of the present invention allows extremely strong wire bonding, has a good yield, and is useful as an industrial mass production technique. 5th example: 1μ thick on a single crystal mica substrate with a smooth surface.
The semiconductor film 14 was fabricated by forming an InSb thin film having an electron mobility of 30,000 cm 2 /V·sec and an electron mobility of 30,000 cm 2 /V·sec.
Next, a film with a thickness of 3000 Å was deposited on top of this using a vacuum evaporation method.
An Al 2 O 3 film was formed. Epoxy resin was applied to the surface of this Al 2 O 3 thin film, and it was adhered onto a square ferrite substrate 12 with a thickness of 0.3 mm and a side of 45 mm.
The mica was then removed. Thereafter, a photoresist film was formed on the surface of the magnetically sensitive part of the InSb thin film using a conventional method. Next, conduct electroless plating to coat the copper to a thickness of 0.3μ.
m was attached only to the required areas. Furthermore, in order to thicken the copper, we performed electrolytic copper plating to a thickness of 2 μm.
A Cu layer 16 was formed. Next, the above photoresist was used again, and a Ni layer 1 with a thickness of 2 μm was applied only to the electrode part.
No. 7 was formed by electrolytic plating. Furthermore, an Au layer 18 having a thickness of 2 μm was formed thereon by electrolytic plating. Next, the above photoresist was used again and unnecessary InSb was removed by photolithography.
The thin film and some unnecessary copper were removed by etching with a hydrochloric-acidic solution of ferric chloride to form a magnetic sensing part and four electrode parts of the Hall element. Later, a ferrite chip for magnetic convergence was glued with silicone resin directly above the magnetically sensitive part. Next, this wafer was placed on a dicing cutter and cut into rectangular Hall elements of 1.1×1.1 mm. Next, this was adhered onto the island 51 of the lead frame 22. Next, the pellet electrode 15 and the lead frame 22 were bonded with a thin Au wire 21 using a high-speed wire bonder.
Packaged using epoxy resin using transfer molding method. The failure rates of the Hall elements manufactured in this manner to which the present invention was applied during wire bonding were as shown in Table 5.

【表】 第5票において、はInSb薄膜上に直接2μm
のAu層を形成した場合である。 それぞれの場合においてボンデイング時の素子
の温度は100℃である。また、超音波エネルギー
はそれぞれの場合について不良率が最小になるよ
うに選んである。さらにまた、サンプル数は各
2000個であり、不良率は1接合あたりの値であ
る。電極とAu細線21との間の引張り強度が2g
以下のものは不良とした。 上記の素子の断面構造を第6図に示す。第6図
において、エポキシ樹脂層13とInSbの薄膜1
4の中間にアルミナ層26が形成されている。
[Table] In vote 5, 2μm of film is directly applied to the InSb thin film.
This is the case when an Au layer of In each case, the temperature of the device during bonding was 100°C. Also, the ultrasonic energy was selected to minimize the defective rate in each case. Furthermore, the number of samples is
2000 pieces, and the defective rate is the value per 1 junction. The tensile strength between the electrode and the Au thin wire 21 is 2g.
The following items were considered defective. The cross-sectional structure of the above element is shown in FIG. In Figure 6, the epoxy resin layer 13 and the InSb thin film 1
An alumina layer 26 is formed between the layers 4 and 4.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明による磁電変換素子の一実施例
を示す断面図、第2図は第1図の平面図、第3図
は更に他の実施例を示す平面図、第4図は第3図
の断面図、第5図は本発明の第3例のホール素子
を示す断面図、第6図は本発明の第5例のホール
素子を示す断面図である。 11……絶縁性基板、12……基板、12′…
…フエライト基板、13……絶縁層、14……半
導体膜、15……電極、16……Cu層、17…
…Ni層、18……Au層、19……感磁部、21
……ワイヤーボンデイングされた金属細線、22
……リードフレーム、23……モールド樹脂、2
4……プリント基板、25……プリント基板上の
配線パターン、26……うすい無機質絶縁層、4
1……シリコーン樹脂、42……フエライト磁気
収束チツプ、50……ダイボンド接着樹脂層、5
1……アイランド。
FIG. 1 is a sectional view showing one embodiment of the magnetoelectric conversion element according to the present invention, FIG. 2 is a plan view of FIG. 1, FIG. 3 is a plan view showing still another embodiment, and FIG. 5 is a cross-sectional view showing a Hall element according to a third example of the present invention, and FIG. 6 is a cross-sectional view showing a Hall element according to a fifth example of the present invention. 11... Insulating substrate, 12... Substrate, 12'...
... Ferrite substrate, 13 ... Insulating layer, 14 ... Semiconductor film, 15 ... Electrode, 16 ... Cu layer, 17 ...
...Ni layer, 18...Au layer, 19...Magnetic sensitive part, 21
... wire-bonded metal wire, 22
...Lead frame, 23 ...Mold resin, 2
4...Printed board, 25...Wiring pattern on printed board, 26...Thin inorganic insulating layer, 4
DESCRIPTION OF SYMBOLS 1...Silicone resin, 42...Ferrite magnetic convergence chip, 50...Die bond adhesive resin layer, 5
1...Island.

Claims (1)

【特許請求の範囲】[Claims] 1 表面に厚さ30μm以下の有機物絶縁層を有す
る基板上に厚さ0.1〜10μm、電子移動度が2000〜
80000cm2/V・secの−族化合物半導体膜が形
成され、該半導体膜上の所要の部分にCu層が形
成されその上にNi層が形成され、該Ni層の上に
Au層が形成されて電極が構成され、さらに該電
極上に金線の一端が直接接続されていることを特
徴とする磁電変換素子。
1. A substrate with a thickness of 0.1 to 10 μm and an electron mobility of 2000 to 30 μm on the surface of an organic insulating layer with a thickness of 30 μm or less
A − group compound semiconductor film of 80000 cm 2 /V·sec is formed, a Cu layer is formed on the required part of the semiconductor film, a Ni layer is formed on top of the Cu layer, and a Ni layer is formed on the Ni layer.
A magnetoelectric transducer characterized in that an Au layer is formed to constitute an electrode, and one end of a gold wire is directly connected to the electrode.
JP60099395A 1985-05-10 1985-05-10 Magnetoelectric device Granted JPS61256776A (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP60099395A JPS61256776A (en) 1985-05-10 1985-05-10 Magnetoelectric device
DE3590792A DE3590792C2 (en) 1985-05-10 1985-10-14
KR1019870700006A KR910002313B1 (en) 1985-05-10 1985-10-14 Magneto-electric converting element
NLAANVRAGE8520325,A NL188488C (en) 1985-05-10 1985-10-14 MAGNETO-ELECTRIC TRANSDUCENT.
DE19853590792 DE3590792T (en) 1985-05-10 1985-10-14
PCT/JP1985/000572 WO1986006878A1 (en) 1985-05-10 1985-10-14 Magneto-electric converter element
US07/325,129 US4908685A (en) 1985-05-10 1989-03-15 Magnetoelectric transducer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60099395A JPS61256776A (en) 1985-05-10 1985-05-10 Magnetoelectric device

Publications (2)

Publication Number Publication Date
JPS61256776A JPS61256776A (en) 1986-11-14
JPH0462474B2 true JPH0462474B2 (en) 1992-10-06

Family

ID=14246305

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60099395A Granted JPS61256776A (en) 1985-05-10 1985-05-10 Magnetoelectric device

Country Status (1)

Country Link
JP (1) JPS61256776A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63226084A (en) * 1987-03-13 1988-09-20 Matsushita Electric Ind Co Ltd Magnetoresistance element
JP2008020402A (en) * 2006-07-14 2008-01-31 Asahi Kasei Electronics Co Ltd Electric current detection mechanism

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58153384A (en) * 1982-03-05 1983-09-12 Asahi Chem Ind Co Ltd Magnetoelectricity conversion element and manufacture thereof

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58153384A (en) * 1982-03-05 1983-09-12 Asahi Chem Ind Co Ltd Magnetoelectricity conversion element and manufacture thereof

Also Published As

Publication number Publication date
JPS61256776A (en) 1986-11-14

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