JP2712401B2 - Method for manufacturing semiconductor device - Google Patents

Description

The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming a wiring contact on a silicon surface.

[Conventional technology]

2. Description of the Related Art Conventionally, in a wafer manufacturing process of a power MOS transistor or an IC, there are a process of making a wiring contact directly with a silicon surface and a process of making a wiring contact with polysilicon used for a gate, a wiring, a resistor, and the like. in this case,
An interlayer insulating film covering the silicon surface and the polysilicon surface is formed, a required portion of the interlayer insulating film is etched to form an opening, and a metal such as aluminum or a laminated structure of polysilicon and aluminum is formed in a region including the opening. By forming the wiring described above, electrical connection to silicon or polysilicon is made.

[Problems to be solved by the invention]

In the above-described conventional manufacturing method, since the surface of silicon or polysilicon doped with a high concentration of impurities is very active, the influence of the storage time and storage atmosphere after opening the opening by etching the interlayer insulating film. In some cases, a natural oxide film grows abnormally on the surface of silicon or polysilicon. In particular, the growth is remarkable in polysilicon. For this reason,
Wiring will be connected via this natural oxide film,
The resistance at the contact portion increases, causing variations in characteristics such as an increase in the delay time with respect to a design value.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a manufacturing method that eliminates a variation in characteristics and a decrease in yield caused by a contact abnormality.

[Means for solving the problem]

The method for manufacturing a semiconductor device of the present invention includes a step of subjecting a silicon surface doped with an impurity to a surface treatment with a substance which reacts with moisture and a hydroxyl group on the silicon surface to generate an organic silicon oxide, and thereafter, deposits and forms a wiring. Contains.

[Action]

In the above-described manufacturing method, the organic silicon oxide suppresses the growth of the natural oxide film on the silicon surface to prevent a contact failure due to the oxide film, and the organic silicon oxide is scattered and removed when the wiring is deposited, and the silicon surface and the wiring are removed. Ensure a good connection with.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

FIG. 1 shows an embodiment in which the present invention is applied to the manufacture of a MOS transistor.

In the figure, first, a field oxide film 2 is formed on a silicon substrate 1 to define an element region, a gate oxide film 3 is formed, and a polysilicon film doped with phosphorus at a high concentration is formed. The polysilicon gate 4 is formed by etching into a pattern. Using the polysilicon gate 4, the silicon substrate 1 is doped with impurities to form source / drain regions 5. Then, an interlayer insulating film 6 is formed on the entire surface.

Next, the interlayer insulating film 6 is selectively etched using a photoresist (not shown) as a mask, and a contact hole 7 is opened. At this time, ion etching is often performed, but final finishing is performed by wet etching for both removal of the damaged layer and removal of contamination from the etching chamber.

After removing the photoresist, the wafer is allowed to react with a vapor such as trimethylchlorosilanehexamethylsilazane, and then dried as it is or after washing with water. By this step, the surface of the source / drain region 5 of the silicon substrate 1 reacts with moisture and hydroxyl groups to form a very thin monomolecular layer 8 of an organic silicon oxide of about 5 to 20 °. This layer is extremely stable because it is a layer generated by reacting with silicon.

Thereafter, aluminum is deposited on the entire surface including the contact hole 7 and is patterned to form the wiring 9. After the formation of the wiring 9, hydrogen annealing is performed. Due to the heat treatment during the deposition of aluminum, the organic silicon oxide monomolecular layer 8 is disconnected from the organic layer and is scattered.

In the MOS transistor manufactured as described above, a thin layer of the organic silicon oxide 8 is formed on the surface of the source / drain region 5 of the silicon substrate 1 so that a natural oxide film is formed on the surface in a subsequent process. Is prevented. And then, the aluminum wiring 9
Since the film of the organic silicon oxide 8 is removed at the time of forming the silicon oxide film, a connection can be made by suitably contacting the wiring 9 and the silicon substrate 1 without interposing an oxide film between them. Will be possible.

As a result, as shown in FIG. 2, it is possible to reduce the variation of the transmission delay time in the MOS transistor to approximately 100%, thereby stabilizing the characteristics and improving the production yield.

Here, the above embodiment shows an example in which the present invention is applied to the impurity-doped surface on the surface of the silicon substrate. However, the same applies to the case where wiring is connected to the surface of polysilicon doped with impurities at a high concentration. The invention can be applied.

Alternatively, aluminum may be evaporated after polysilicon for preventing aluminum alloy spikes is attached to the contact surface. Even if polysilicon is thus attached, abnormal growth of the oxide film can be suppressed, and the same effect can be obtained.

〔The invention's effect〕

As described above, according to the present invention, the surface of the silicon doped with impurities is treated with a substance that reacts with moisture and hydroxyl groups to generate organic silicon oxide. In this case, it is possible to obtain an effect that a good connection between the silicon surface and the wiring can be ensured, a variation in characteristics of the semiconductor device can be eliminated, and a manufacturing yield can be improved.

[Brief description of the drawings]

FIG. 1 is a longitudinal sectional view showing one embodiment of the manufacturing method of the present invention,
FIG. 2 is a diagram for comparing the characteristics of the present invention and the conventional transmission delay time. 1 ... silicon substrate, 2 ... field oxide film, 3 ...
Gate oxide film, 4 ... Polysilicon gate, 5 ... Source / drain region, 6 ... Interlayer insulating film, 7 ... Contact hole, 8 ... Organic silicon oxide film, 9 ... Aluminum wiring.

Claims (1)

(57) [Claims] 1. A process for exposing an impurity-doped silicon surface and connecting a wiring to the exposed surface, wherein the exposed silicon surface reacts with water and hydroxyl groups on the silicon surface to produce an organic silicon oxide. A method of manufacturing a semiconductor device, comprising: performing a surface treatment on a substrate;