JP2699444B2 - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JP2699444B2 JP2699444B2 JP63225203A JP22520388A JP2699444B2 JP 2699444 B2 JP2699444 B2 JP 2699444B2 JP 63225203 A JP63225203 A JP 63225203A JP 22520388 A JP22520388 A JP 22520388A JP 2699444 B2 JP2699444 B2 JP 2699444B2
- Authority
- JP
- Japan
- Prior art keywords
- tape
- semiconductor device
- internal leads
- present
- internal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a semiconductor device.
従来、この種の半導体装置は第３図に示すように、固
定部３に半導体素子１を接着し、金属細線２を用いて半
導体素子１の電極と内部リード４を接続している。内部
リード４には内部リード４の変形を防止するためポリイ
ミド等のテープ5cを貼り付けてある。これらをエポキシ
等の樹脂で封入し、半導体装置１を完成させる。Conventionally, in this type of semiconductor device, as shown in FIG. 3, a semiconductor element 1 is bonded to a fixing portion 3 and an electrode of the semiconductor element 1 is connected to an internal lead 4 using a thin metal wire 2. A tape 5c of polyimide or the like is attached to the internal lead 4 in order to prevent deformation of the internal lead 4. These are sealed with a resin such as epoxy to complete the semiconductor device 1.
上述した従来の半導体装置では半導体素子の接着、金
属細線による半導体素子と内部リードとの接続などの製
造工程で受ける熱履歴のためテープが収縮してしまう。In the above-described conventional semiconductor device, the tape shrinks due to heat history received in a manufacturing process such as bonding of the semiconductor element and connection between the semiconductor element and the internal lead by a thin metal wire.
このため、内部リードの先端が全体に浮き上がる方向
に変形してしまう。For this reason, the tip of the internal lead is deformed in a direction in which it is entirely lifted.
このため内部リードの変形を防止するという所期の目
的を十分にはたせないという欠点がある。For this reason, there is a drawback that the intended purpose of preventing deformation of the internal leads cannot be sufficiently achieved.
上述した従来の半導体装置に対し、本発明は変形防止
用テープにスリットを設ける等により伸縮性のある形状
を有するという相違点を有する。The present invention has a different point from the above-described conventional semiconductor device in that the present invention has an elastic shape by providing a slit in a deformation preventing tape or the like.
本発明の半導体装置は、内部リードに貼り付けるテー
プの内部リード間にスリットを入れるかもしくはテープ
をジグザグ形状としている。この場合、スリットはテー
プに千鳥状に設ける。In the semiconductor device of the present invention, a slit is formed between the internal leads of the tape to be attached to the internal leads, or the tape is formed in a zigzag shape. In this case, the slits are provided on the tape in a staggered manner.
図を参照して本発明の実施例について説明する。 An embodiment of the present invention will be described with reference to the drawings.
第１図は本発明の第１の実施例の半導体装置の樹脂封
止内部の平面図である。同図において、半導体素子１は
固定部３に接着されており、半導体素子１の電極と内部
リード４が金属細線２で接続されている。FIG. 1 is a plan view showing the inside of a resin seal of a semiconductor device according to a first embodiment of the present invention. In FIG. 1, a semiconductor element 1 is bonded to a fixing portion 3, and electrodes of the semiconductor element 1 and internal leads 4 are connected by thin metal wires 2.
内部リード４にはテープ5aが貼り付けられている。 A tape 5a is attached to the internal lead 4.
本実施例ではテープ5aにスリットを設けたため、伸縮
性を有し、熱履歴によるテープの収縮を吸収できる。こ
のため、テープの収縮による内部リードの変形を防止す
ることができる。In this embodiment, since the tape 5a is provided with a slit, the tape 5a has elasticity and can absorb the contraction of the tape due to heat history. For this reason, it is possible to prevent the deformation of the internal leads due to the contraction of the tape.
第２図は本発明の第２の実施例の半導体装置の樹脂封
止内部の平面図である。FIG. 2 is a plan view showing the inside of the resin sealing of the semiconductor device according to the second embodiment of the present invention.
本実施例ではテープ5bをジグザグの平面形状にするこ
とにより伸縮性を有し、第１の実施例と同様に内部リー
ドの変形を防止することができる。In this embodiment, the tape 5b is formed in a zigzag plane shape to have elasticity, and the deformation of the internal leads can be prevented similarly to the first embodiment.
以上説明したように本発明は、内部リードに貼り付け
るテープを伸縮性のある形状にすることにより、テープ
の収縮による内部リードの変形を防止することができ
る。As described above, the present invention can prevent deformation of the internal lead due to contraction of the tape by forming the tape to be attached to the internal lead into an elastic shape.
第１図は本発明の第１の実施例の半導体装置の樹脂封止
内部の平面図、第２図は本発明の第２の実施例の半導体
装置の樹脂封止内部の平面図、第３図は従来の半導体装
置の樹脂封止内部の平面図である。 １……半導体素子、２……金属細線、３……固定部、４
……内部リード、5a,5b,5c……テープ。FIG. 1 is a plan view showing the inside of a resin seal of a semiconductor device according to a first embodiment of the present invention. FIG. 2 is a plan view showing the inside of a resin seal of a semiconductor device according to a second embodiment of the present invention. FIG. 1 is a plan view of the inside of a resin seal of a conventional semiconductor device. 1 ... semiconductor element, 2 ... thin metal wire, 3 ... fixed part, 4
…… Internal lead, 5a, 5b, 5c …… Tape.
Claims (2)
ド間を接続する高分子材料のテープと、前記複数の内部
リードが接続された半導体素子とを有する半導体装置に
おいて、前記高分子材料のテープは、当該テープの前記
内部リード間にスリットが設けられ、これらスリットが
千鳥状に配置されていることを特徴とする半導体装置。1. A semiconductor device comprising: a plurality of internal leads; a tape of a polymer material connecting between the plurality of internal leads; and a semiconductor element to which the plurality of internal leads are connected. A semiconductor device, wherein a slit is provided between the internal leads of the tape, and the slits are arranged in a staggered manner.
ド間を接続する高分子材料のテープと、前記複数の内部
リードが接続された半導体素子とを有する半導体装置に
おいて、前記高分子材料のテープはジグザグ形状である
ことを特徴とする半導体装置。2. A semiconductor device comprising: a plurality of internal leads; a tape of a polymer material connecting the plurality of internal leads; and a semiconductor element to which the plurality of internal leads are connected. A semiconductor device, wherein the tape has a zigzag shape.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63225203A JP2699444B2 (en) | 1988-09-07 | 1988-09-07 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63225203A JP2699444B2 (en) | 1988-09-07 | 1988-09-07 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0272657A JPH0272657A (en) | 1990-03-12 |
| JP2699444B2 true JP2699444B2 (en) | 1998-01-19 |
Family
ID=16825595
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63225203A Expired - Lifetime JP2699444B2 (en) | 1988-09-07 | 1988-09-07 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2699444B2 (en) |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61106038U (en) * | 1984-12-18 | 1986-07-05 | ||
| JPS6327042A (en) * | 1986-07-18 | 1988-02-04 | Nec Corp | Lead frame having inner leads fixed with heatresistant tape |
-
1988
- 1988-09-07 JP JP63225203A patent/JP2699444B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0272657A (en) | 1990-03-12 |
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