JP2658019B2 - Method for manufacturing semiconductor device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a semiconductor device in which a nitride is formed on a high melting point metal or a high melting point metal compound. The method for manufacturing a semiconductor device according to the present invention can be used, for example, specifically as a method for forming a barrier metal on a gate electrode of a VLSI.

[Summary of the Invention]

The present invention relates to a method for manufacturing a semiconductor device,
Forming anneal (Forming Anneal) performed to reduce interface traps, especially on the method of forming a nitride used as a barrier metal on a refractory metal or refractory metal compound used as a gate electrode of I
al) is performed in a nitrogen atmosphere, so that a nitride (TiN or the like) as a barrier metal is formed in a self-aligning manner on the surface of only the refractory metal silicide as a gate electrode.

[Conventional technology]

Conventionally, polysilicon has been used as the gate electrode material for VLSI.Recently, however, the necessity of new materials such as various refractory metals with significantly lower resistivity than polysilicon and silicide has been recognized. ing. In particular, the use of a new material having a low resistivity is indispensable in a dRAM process that requires strong integration and high speed. For example, 256KdR
In AM, the gate structure of MoSi ₂ has already been adopted for high-speed operation.In addition, as the integration density of 1MDRAM and further 4M and 16MdRAM advances, the resistivity of the gate electrode and wiring will increase the operation speed of the device. Will be the most important factor to determine. Therefore, there is a strong demand for lowering the resistance of the gate electrode material.

As such a low-resistance material, a high-melting metal silicide having a low resistivity, for example, titanium silicide (TiSi ₂ ) is considered promising. When TiSi ₂ is used as a gate electrode, it is necessary to form titanium nitride TiN or the like on the electrode by a vapor deposition device or the like after the electrode is formed, as a barrier metal for preventing a reaction with a metal wiring such as aluminum. .

FIGS. 7A, 7B and 7C show a conventional method of forming a barrier metal of TiN. First, as shown in FIG. 7 (a), a gate electrode 3 of TiSi ₂ is provided in an opening 2a formed in the SiO ₂ layer 2 laminated on the semiconductor substrate 1, Is deposited with TiN4 for barrier metal by CVD or the like. Subsequently, as shown in FIG. 7 (b), the barrier metal 4 is formed by performing etching such as wet etching (ammonia-hydrogen etching or the like) or plasma etching so that TiN remains only on the gate electrode 3. . (C) shows a state in which the formation of the Al wiring 5 has been completed.

However, according to such a conventional method, a process for forming the barrier metal itself and a TiN vapor deposition apparatus are required, so that the process is complicated and the equipment cost is increased. Further, it has not been easy to deposit a TiN film accurately on a place having a small surface area.

References related to the above prior art include JP-A-57-1313.
No. 3683, No. 58-157172, No. 59-171171, No. 60-1004
No. 64, forming of TiN / TiSi ₂ / p ⁺ −Si / n−
Si high rapid thermal annealing (RTA)
Silicon Implanted with Boron Through Titanium (Forming of TiN / TiSi ₂ / p ⁺ −Si / n−Si by
Rapid Thermal Annealing (RTA) Silicon Implanted w
ith Boron Through Titanium) "IEEE ELECTRON DEVICE
LETTERS "(VOL.EKL-6. NO.NOVEMBER 1985).

The above-mentioned paper "Forming of TiN / TiSi ₂ /
p ⁺ -Si / n-Si, High Rapid Thermal Annealing (RTA) Silicon Implanted with Boron Through Titanium " No effect due to RTA was observed, and it was shown that RTA effect was obtained by annealing at 900 ° C. for 10 seconds at a high temperature for a short time. (6-10, left column, page 592 of the same paper)
Line, and graph on the same column).

[Problems to be solved by the invention]

As described above, the conventional technique has problems such as complicated processes and difficulty in depositing a TiN film in a narrow place.
An object of the present invention is to provide a refractory metal or a compound thereof (Ti) without using a special process for forming a barrier metal.
A barrier metal (TiN, etc.) can be formed in a self-aligned and reliable manner on a gate electrode, etc. of Si ₂ etc. to achieve higher product quality, lower cost, shorter process time, and higher yield. It is an object of the present invention to provide a method for manufacturing a semiconductor device.

[Means for solving the problem]

The method for manufacturing a semiconductor device according to the present invention includes the steps of:
In a method of manufacturing a semiconductor device in which a laminated film composed of a refractory metal silicide layer and a refractory metal nitride film formed thereon is formed, a step of forming an insulating film on a semiconductor substrate and a step of providing an opening in the insulating film Depositing a film of a high melting point metal or a high melting point metal compound, and IR-annealing the high melting point metal or high melting point metal compound to silicide, and a stoichiometrically stable high melting point metal silicide in the opening. A step of selectively forming a silicide layer; a step of removing unreacted high-melting metal; and a stoichiometric process by nitriding the high-melting metal or the high-melting metal compound by heat treatment at 400 ° C. in a nitrogen atmosphere. Forming a refractory metal nitride film of a refractory metal nitride film comprising a refractory metal silicide layer, wherein the refractory metal silicide layer is stoichiometrically stable. Consists, it is to form a laminated film in which the refractory metal nitride film is composed of stoichiometrically stable refractory metal nitride film. With this configuration of the present invention, the above object can be achieved. Where IR
(Infrared radiation) annealing means heat treatment using IR.

[Action]

That is, the present invention deposits a high melting point metal or a high melting point metal compound on a semiconductor substrate, selectively forms a silicide layer only in an opening, and then includes the high melting point metal or the high melting point metal compound containing nitrogen. Since nitriding is performed by IR heat treatment in an atmosphere, when this is applied to the barrier metal manufacturing process, the barrier metal is applied to a desired position on the gate electrode over a desired range at a desired position on the gate electrode during forming annealing forming one step. It can be formed selectively. For this reason, the conventional process of vapor-depositing the barrier metal is not required, and the processing can be performed quickly. Further, even when a TiN film or the like is formed, a device for vapor-depositing the TiN film or the like is not particularly required, so that costs can be reduced and manufacturing costs can be reduced. Further, in the present invention, since the formed laminated film is composed of a stoichiometrically stable refractory metal silicide and a stoichiometrically stable refractory metal nitride film, a high quality and stable film quality is obtained. This is advantageous when used as a barrier metal structure.

〔Example〕

Hereinafter, a method for manufacturing a semiconductor device according to the present invention will be described in detail with reference to an embodiment thereof.

FIG. 1 is a flow chart when the method of the present invention is applied, and FIG.
(A), (b) and (c) are process explanatory diagrams showing the principle of the method of the present invention with reference to this embodiment.

First, FIG. 2A shows a silicon dioxide (SiO ₂ ) layer 11 and a polySi (polysilicon) layer 12 sequentially laminated on a Si substrate 10.
A state where a high melting point metal or a high melting point metal compound, for example, a titanium (Ti) layer 13 is formed by vapor deposition is shown above. Next, by performing IR annealing in FIG.
The TiN layer 14 is formed on the TiSi ₂ layer 13 by turning the layer 13 into Ti silicide (TiSi ₂ ) and subsequently performing forming annealing in an atmosphere containing nitrogen in FIG.

FIGS. 3 (a) to 3 (e) are diagrams showing a case where the above principle is applied to a specific embodiment. In this example, TiN is used as a barrier metal on the silicided gate electrode.
FIG. 3 is an explanatory view of the manufacturing process. First, in the Ti depositing step shown in FIG. 3 (a), the Ti is deposited on the Si substrate 10 and the opening 11a is formed.
The Ti layer 12 is deposited on the SiO ₂ layer 11 having Third
In the IR annealing step shown in FIG.
Part of the i reacts with the Si substrate 10 to form a TiSi ₂ layer (gate electrode) 13
Becomes Part of the TiSi ₂ layer 13 is diffused and arranged in the substrate 10. In the etching step of FIG. 3 (c), all Ti12 is removed by etching using H ₂ O ₂ . FIG. 3 (d) shows a forming method for preventing an interface trap.
In the annealing step, heat treatment is performed in a nitrogen atmosphere,
_{On the} upper surface of the Si ₂ layer 13, a TiN layer 14 is formed in a self-aligned and selective manner. That becomes the barrier metal. FIG. 3 (e) shows Al
This is a step of forming the wiring layer 15.

FIGS. 4A to 4C show modified examples of the above example. 4th
The figure shows the step of forming a TiN layer (barrier metal) 14 only on a part of the upper surface of the gate electrode 13 made of TiSi _2. This example is common up to the etching step of FIG. Are different, and the subsequent steps will be described with reference to the drawings. First, a small hole 16 is formed in the PSG layer 16 laminated in the phosphorus silicate glass (PSG) laminating step shown in FIG. 4 (a) by the forming / annealing step shown in FIG. 4 (b).
a, and heat-treated in a nitrogen atmosphere to form a barrier metal Ti on the upper surface of the TiSi ₂ layer 13 exposed in the holes 16a.
The N layer 14 is formed, and finally, metal wiring such as Al is performed in the wiring step of FIG. 4 (c). In the steps shown in FIGS. 4A to 4C, the barrier metal layer 14 can be formed in an extremely small area on the gate electrode.

Next, FIGS. 5 and 6 show the laminated structure (before forming annealing) formed by the steps up to FIG. 3 (b) and the laminated structure formed by the steps up to FIG. 3 (c). FIG. 3 is a diagram illustrating comparison of Auger intensities in the depth direction of a body (after forming and annealing).

First, FIG. 5 shows that the laminated structure shown in FIG. 2 (a), Ti (500 °) / PolySi (2500 °) / SiO ₂ / Si, is subjected to IR annealing, as shown in FIG. 2 (b). Each layer [Si (92e
V), Ti (393 eV), Ti + N (418 eV), 0 (518 eV)]. As understood from this graph, a stable TiSi ₂ layer is formed inside, and a TiN layer is formed on the surface. (Note that the depth is indicated by the sputtering time (minute), but in FIG. 5, the depth is about 650 ° in 40 minutes).

FIG. 6 is a cross-sectional view of the laminated structure Ti shown in FIG.
(300A) / the _{PolySi (2500A) / SiO 2 /} Si, after siliciding the Ti layer 13 as in the second diagram is subjected to IR annealing (b), 400 ° C. in a nitrogen atmosphere, 60 minutes forming annealing Each layer (Si (92 eV), Ti (393 e
V), Ti + N (418 eV), and 0 (518 eV)]. Compared to the state before forming annealing in FIG. 5, similarly stable TiSi ₂ is formed inside (indicated by reference numeral II in FIG. 6), but completely 1: 1 in the vicinity of the surface. It is understood that a stable TiN having a composition is formed (indicated by reference numeral I in FIG. 6). Thus, stoichiometrically stable TiSi ₂ is formed,
Further, it can be seen that stoichiometrically stable TiN was formed. This indicates that the barrier metal layer formed on the surface of the TiSi ₂ layer is stable. (Note that this sixth
In the figure, the sputtering time is about 150 ° in 100 min.)

As described above, when the semiconductor manufacturing method of the present invention is applied, a barrier metal is selectively formed at a desired position on a gate electrode over a desired range during forming / annealing, which is one step of manufacturing a semiconductor device. be able to. For this reason, the conventional process of vapor-depositing the barrier metal is not required, so that a rapid processing can be performed. In addition, since a device for depositing a nitride film is not particularly required, costs can be reduced and manufacturing costs can be reduced.

In the above example, the nitriding was performed by a long-term heat treatment at a low temperature of 400 ° C. for 60 minutes in a nitrogen atmosphere containing no oxygen, but the above-mentioned paper “Forming of TiN / TiSi ₂ / p ⁺ −Si / n−
Si high rapid thermal annealing (RTA)
Similarly, a stoichiometrically stable refractory metal nitride film can also be obtained by high-temperature short-time annealing at 900 ° C. for 10 seconds described in “Silicon Implanted with Boron Through Titanium”.

〔The invention's effect〕

As described above, according to the present invention, a barrier metal is formed in a self-aligned and reliable manner without using a special process for forming a barrier metal or the like, thereby improving product quality.
Cost reduction, reduction in process time, and improvement in yield can be achieved.

[Brief description of the drawings]

FIG. 1 is a flowchart illustrating the steps of the method of the present invention, FIGS. 2 (a) to (c) are explanatory diagrams showing the principle of the method of the present invention using one embodiment, and FIGS. 3 (a) to (c). e) is an explanatory view of a process in an embodiment to which the method of the present invention is applied, FIGS. 4 (a) to 4 (c) are explanatory views of a process in a modification of the embodiment, and FIGS. 5 and 6 are before forming annealing. 7 is a graph for comparing the Auger intensity of each layer after and after. 7 (a) to 7 (c) are explanatory views of a conventional manufacturing method by vapor deposition. 1 ... semiconductor substrate, 2 ... SiO ₂ layer, 3 ... gate electrode,
4 ... barrier metal, 5 ... metal wiring, 10 ... Si substrate,
11: Silicon dioxide (SiO ₂ ) layer, 12: PolySi layer, 13:
… High melting point metal or high melting point metal compound (Ti layer), 14 ……
Barrier metal, 15 ... metal wiring layer, 16 ... PSG layer.

Claims (1)

(57) [Claims] A method of manufacturing a semiconductor device in which a laminated film composed of a refractory metal silicide layer and an overlying refractory metal nitride film is formed on a semiconductor substrate, wherein an insulating film is formed on the semiconductor substrate. Providing an opening in the insulating film, depositing a film of a high melting point metal or a high melting point metal compound, IR-annealing the high melting point metal or the high melting point metal compound to silicide, and stoichiometry in the opening. Selectively forming a silicide layer composed of an electrically stable refractory metal silicide; removing unreacted refractory metal; and repelling the refractory metal or refractory metal compound in a nitrogen atmosphere at 400 ° C. Nitriding by heat treatment to form a refractory metal nitride film composed of a stoichiometrically stable refractory metal nitride film, whereby the refractory metal silicide layer is stoichiometric. A method of manufacturing a semiconductor device, comprising forming a laminated film composed of a stoichiometrically stable high melting point metal nitride film and a stoichiometrically stable high melting point metal nitride film.