JP2653092B2 - Complementary thin film transistor and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to flat, display and SOI devices (Semicon
The present invention relates to a structure of a semiconductor device used for ductor on insulator) and a method for manufacturing the same.

[Conventional technology]

Conventionally, for example, Conference Record of the 1985 I
nternational Display Research Conference, P, 9-1
3 (1985), a CMOS structure (complementary M
As a method for forming the OS structure), an ion implantation method was generally used.

[Problems to be solved by the invention]

However, in the above-mentioned prior art, since the dopant is introduced using the ion implantation method, the use of an expensive ion implantation apparatus is indispensable, and the processing capability is small.

In addition, since it is necessary to maintain a high temperature to activate the dopant after ion implantation, there is a disadvantage that expensive quartz glass must be used as an insulating substrate.

Therefore, the present invention solves the above-mentioned drawbacks, and an object of the present invention is to provide a CMOS structure that can be formed by an inexpensive glass substrate as an insulating substrate and can be formed by a mass production method. is there.

Another object is to provide a highly reliable manufacturing method for achieving the above object.

[Means for solving the problem]

(1) In a complementary thin film transistor of the present invention, one thin film transistor has a source electrode portion and a drain electrode formed of a first conductivity type semiconductor, and a channel formed of a semiconductor so as to connect between the source electrode portion and the drain electrode. Part, a gate insulating film is formed on the channel part, a gate electrode made of a second conductivity type semiconductor is formed on the gate insulating film, and the other thin film transistor is A gate electrode made of a semiconductor of one conductivity type is formed, a gate insulating film is formed on the gate electrode, and a channel portion made of a semiconductor layer is formed on the gate insulating film; A source electrode and a drain electrode made of a second conductivity type semiconductor are formed on the layer.

The method of manufacturing a complementary thin film transistor according to the present invention further includes a step of attaching a first conductive type silicon thin film on an insulating substrate, and processing the first silicon thin film into an island shape to form a source electrode portion and a drain electrode of one of the thin film transistors. Forming a portion, simultaneously forming a gate electrode of the other thin film transistor, and attaching a semiconductor thin film between the gate electrode and the drain electrode of the one thin film transistor,
Forming a silicon oxide film to be a gate insulating film of the one thin film transistor and the other thin film transistor, and forming a gate electrode of the one thin film transistor by depositing a second conductive type silicon thin film, and simultaneously forming the other thin film transistor Forming a source electrode portion and a drain electrode portion.

〔Example〕

FIG. 1 is a diagram showing an inverter (inverting amplifier) as one embodiment manufactured by using the structure and the manufacturing method according to the present invention, where (a) is a top view and (b) is (a) FIG. 'Is a cross-sectional view of FIG.

A source electrode portion and a drain electrode portion 2 of a P-channel field-effect thin film transistor made of a P-type semiconductor are formed on an insulating substrate 1, and a channel portion 4 is formed by a semiconductor containing no dopant so as to connect the two electrode portions. Are formed. A gate insulating film 5 is formed thereon, and a gate electrode 6 made of an N-type semiconductor is further formed thereon.
Are formed to constitute a P-channel field effect thin film transistor.

A gate electrode 3 made of a P-type semiconductor is formed on the insulating substrate, and a gate insulating film 5 is formed thereon. A source electrode portion and a drain electrode portion 7 of an N-channel field effect thin film transistor formed of an N-type semiconductor are formed thereon. Further, a channel portion 8 is formed of a semiconductor containing no dopant so as to connect the source and drain electrode portions, thereby constituting an N-channel field effect thin film transistor.

Further, a contact hole 9 and a wiring 10 are formed to electrically couple the P-channel field-effect thin film transistor and the N-channel field-effect thin film transistor, thereby forming an inverter having a CMOS structure.

One example of a manufacturing process of the semiconductor device having the structure shown in FIG. 1 will be described in more detail with reference to FIG.

First, a P-type Si thin film is deposited on the insulating substrate 1 using a deposition method such as a low pressure CVD method, a normal pressure CVD method, or a plasma CVD method, and the thin film is processed into an island shape using a photolithography method. A source electrode portion and a drain electrode portion 2 of the P-channel field effect transistor are formed. At the same time, the gate electrode 3 of the N-channel field effect transistor is formed. (FIG. 2A) Next, in order to form the channel portion 4 of the P-channel field-effect transistor, a Si thin film containing no dopant is deposited by using the above-mentioned deposition method, and photolithography is used. (FIG. 2 (b)) An SiO ₂ film serving as the gate insulating film 5 of both the P-channel field-effect thin film transistor and the N-channel field-effect thin film transistor is formed by using the deposition method. (FIG. 2 (c)) Next, an N-type Si thin film is deposited using the above-described deposition method, and the gate electrode 6 of the P-channel field-effect thin film transistor and the N-channel field-effect thin film transistor are formed using the photolithography method. The source electrode part and the drain electrode part 7 are formed. (FIG. 2 (d)) The insulating film 5 formed in the previous step plays an important role in this step.

(I) when the N-type Si thin film is deposited by using the deposition method, the N-type dopant acts on the P-type Si thin film and prevents the P-type dopant from interdiffusion on the N-type Si thin film; It is possible to prevent the N-type Si thin film and the P-type Si thin film from increasing in resistance due to mutual diffusion.

(Ii) When an N-type Si thin film is processed into an island shape by a photolithography method, the insulating film functions as an etching stopper, and it becomes possible to perform stable etching over the entire surface of a large-area substrate.

(Iii) The biggest reason for using a glass substrate is that it is easy to increase the area of the substrate. However, the effects of (i) and (ii) are stable, and both the N-type channel and the P-type channel can be used. Thin film transistors can be formed over a large area,
A glass substrate can be used.

In the next step, the channel portion 8 of the N-channel field-effect thin film transistor is obtained by depositing a dopant-free Si thin film by the above-mentioned deposition method and processing it by photolithography. (FIG. 2E) Next, a contact hole 9 is formed by using a photolithography method, a metal thin film is deposited by using a sputtering method, and a wiring between the two-channel field-effect thin film transistors is formed by using a photolithography method. And so on.

Through the above steps, a semiconductor device having the structure shown in FIG. 1 can be obtained.

In the above-described manufacturing process, the N-type Si thin film is formed after the step of forming the P-type Si thin film. However, it is apparent that the reverse order is also possible.

Further, as the gate insulating film, SiO ₂ may be formed by another method, for example, a sputtering method, or an insulating material other than SiO ₂ may be used.

Further, an example in which Si is used as a semiconductor has been described, but a compound which can form P-type and N-type semiconductors by the above-described deposition, such as Ge, may be used.

It is apparent that similar effects can be obtained by using a semiconductor, a superconductor, or the like having a sufficiently small resistivity other than metal as the wiring.

〔The invention's effect〕

As described above, the present invention is a low-pressure CVD method rich in mass production,
Since the semiconductor film in which the dopant is introduced is formed using a deposition method such as a normal pressure CVD method or a plasma CVD method,
The feature is that a CMOS structure can be formed without using an expensive and low-productivity ion implantation apparatus.

In addition, the above-described manufacturing process of the CMOS structure covers a large area by the action of the insulating film between the P-type semiconductor and the N-type semiconductor.
A stable and high-performance semiconductor device can be manufactured.

Further, since a high-temperature step required for activating the dopant after ion implantation is not required, an inexpensive glass substrate can be used as the insulating substrate.

[Brief description of the drawings]

FIGS. 1A and 1B are diagrams showing an inverter (inverting amplifier) as an example of a semiconductor device according to the present invention. (A) is a top view, and (b) is a cross-sectional view taken along AA 'of (a). DESCRIPTION OF SYMBOLS 1 ... Insulating substrate 2 ... Source and drain electrode part which consists of P type semiconductors 3 ... Gate electrode which consists of P type semiconductors 4, 8 ... Channel part 5 ... Gate insulating film 6 ... which consists of N type semiconductors Gate electrode 7 Source / drain electrode portion composed of N-type semiconductor 9 Contact hole 10 Metal wiring FIGS. 2A to 2F show one of the manufacturing steps of the semiconductor device shown in FIG. It is sectional drawing which showed the example.

Claims (2)

(57) [Claims] 1. A complementary thin film transistor formed on an insulating substrate, wherein one of the thin film transistors has a source electrode portion and a drain electrode formed of a first conductivity type semiconductor, and connects the source electrode portion and the drain electrode. A channel portion made of a semiconductor is formed as described above, a gate insulating film is formed on the channel portion, and a gate electrode made of a second conductivity type semiconductor is formed on the gate insulating film, The other thin film transistor has a gate electrode made of a first conductivity type semiconductor formed thereon, a gate insulating film formed on the gate electrode, and a channel portion made of a semiconductor layer formed on the gate insulating film. And a source electrode and a drain electrode made of a second conductivity type semiconductor are formed on the semiconductor layer. Transistor. 2. A step of depositing a first-conductivity-type silicon thin film on an insulating substrate, and processing the first silicon thin film into an island shape to form a source electrode portion and a drain electrode portion of one of the thin-film transistors, while simultaneously forming the other. Forming a channel portion by attaching a semiconductor thin film between the gate electrode and the drain electrode of the one thin film transistor; and forming a gate portion of the one thin film transistor and the other thin film transistor Forming a silicon oxide film to be a film, forming a gate electrode of the one thin film transistor by attaching a second conductive type silicon thin film, and simultaneously forming a source electrode portion and a drain electrode portion of the other thin film transistor A method for manufacturing a complementary thin film transistor, comprising: