JP2631282B2 - Pachinko machine - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pachinko machine.

[0002]

2. Description of the Related Art Pachinko machines are provided with a display, a solenoid for opening and closing a variable winning opening, a lamp, and a sound notification means for driving and controlling a pachinko machine in accordance with a game state of the pachinko machine. A control circuit is provided, and a power supply circuit for supplying power for activating these control circuits is provided. Pachinko machine of this type
Is, when a specific display mode is established on the display,
For example, when a combination of symbols is established, the player
It is designed to provide significant benefits.

By the way, the display mode on the display is
What is the display mode originally displayed due to malfunction of the dick machine?
It is conceivable that the display mode will be different. In this case
The variable winning opening is opened and closed, and the lamp and sound are
An erroneous operation different from the operation mode to be performed is performed. this
The cause is a malfunction of the control circuit that controls the display.
Most cases are caused.

[0004]

SUMMARY OF THE INVENTION It is an object of the present invention to provide a power supply.
When turning on, abnormal operation of the drive circuit is controlled by the control output data.
By clearing the input and output circuits at the same time.
Reset and control signal from I / O circuit to each drive circuit
Output is prohibited, and when the power is turned on,
By randomizing the displayed content,
To prevent the occurrence of unfair specific game modes
The same applies to various abnormalities of pachinko machines due to the drive of the power supply.
To provide a pachinko machine that can cope sometimes
is there.

[0005]

The pachinko machine of the present invention comprises:
In order to solve the above-mentioned problems, systems installed in pachinko machines
The control circuit unit is at least a power supply circuit unit, an input / output circuit unit,
A central processing unit and a memory;
A line noise elimination circuit is provided in the circuit unit, and the input / output circuit
When the power is turned on, reset the I / O circuit section to
I / O reset circuit that prohibits the supply of control output to
A path is provided, and when the power is turned on, the control in the memory is performed.
Initialization processing means to clear control output data, and power on
Display data in the memory displayed on the display
And a randomizing means for making a dam .

[0006]

[Action] is deployed to power circuit section line noise cancellation circuit
Eliminates power supply noise generated in the power supply circuit section,
Operation supplied to the central processing unit and memory from the power supply circuit
The operating voltage is stable, and the central processing unit and memory are
Protect from working.

An input / output channel provided for the input / output circuit section
The set circuit generates a reset signal when the power is turned on.
Reset the I / O circuit and reset each drive connected to the I / O circuit.
Disables the output of control signals to
Prevent malfunction of each drive circuit.

The initialization processing means provided in the memory is centrally located.
The power is turned on by executing when the processing unit is turned on.
Clear the control output data in the memory at
This prevents erroneous operation of each drive circuit later.

[0009] The random number arranged in the memory at the time of power-on
Display by the central processing unit executing the conversion processing means
Display data in the memory to be displayed on the
Immediately after turning on the power, unfair specific games that are biased on the display
Prevent the establishment of the mode from occurring.

[0010]

An embodiment of the present invention will be described below with reference to the drawings.

As shown in FIG. 1, in addition to the normal winning holes 2 to 8, the game board 1 of the pachinko gaming machine has chuckers 11 to 13 as starting ports and an attacker 14 as a variable winning port.
Are provided at predetermined positions, respectively.
A central pocket 15 as a special prize area into which a game ball can fly through an upper end opening is provided at substantially the center of the inside. The attacker 14 has a movable door 16 on its front surface, and the movable door 16 is opened by being driven by a movable door drive solenoid 17 (see FIG. 2) fixed to the back surface of the game board 1 and opened. I have.

A start switch (GO switch) 18 (see FIG. 2) composed of three normally open microswitches arranged at predetermined positions on a winning ball guiding path (not shown) provided on the back of the game board 1. Is closed when a prize ball flowing out of the exit of the chuckers 11 to 13 and falling along the guide path passes, and the winning of the chuckers 11 to 13 is detected. Also,
A count switch 19, which is a normally closed proximity switch, is arranged in the winning ball falling path defined by the peripheral wall of the central pocket 15 and the guide plate 20, and the game ball enters the attacker 14 via the central pocket 15 or not. Is opened to detect such a prize. Further, a central pocket switch (V switch) 21 composed of a normally-open type micro switch is arranged facing an intermediate portion of the central pocket 15 so as to detect winning in the pocket 15.

At the center of the game board 1, upper and lower digital displays 22 and 23 are arranged. The upper display 22 includes a single display section composed of a seven segment type light emitting diode (LED). 13, while the lower display 23 has first to third display portions 23a to 23c each composed of a seven-segment light emitting diode.
And displays the display content according to the game progress status as described later.

Reference numerals 24 and 25 denote central pocket lamps (V lamps) and start lamps (GO lamps) which blink or light up when winning the central pocket 15 and chuckers 11 to 13.
And a reference numeral 26 denotes a normally-open push-button stop switch provided on the front surface of the frame of the gaming machine for stopping an LED rotating operation described later. A speaker 27 (see FIG. 2) is attached to the back of the game board 1.

FIG. 2 schematically shows a circuit configuration of the pachinko gaming machine. The above-mentioned various switches 18, 19, 21 and 26 include:
The switch is connected to an input port of the input / output circuit 40 via a switch input detection circuit 30 that outputs various winning display signals S1 to S3 and an LED rotation stop signal S4 at levels according to the open states of these switches.

A central processing unit (CPU) 50 is connected to an input / output port of the input / output circuit 40 via a data bus, an address bus, and a control bus, and stores a read-only memory (RO) which stores a control program described later.
M) A random access memory (RA) that stores various calculations executed by the CPU 50 and the results of determinations and the like.
M) 52.

The clock circuit 53 generates a clock signal S5 having a predetermined period and supplies the clock signal S5 to the CPU 50 and the reset circuit 54. The reset circuit 54 generates the clock signal S5.
Is generated, and a reset signal S6 for starting execution of a control program described later is generated and supplied to the CPU 50.

The power supply circuit 55 is connected to an external AC power supply,
A required DC voltage is supplied to the CPU 50 and the like. A winning display signal S from the CPU 50 is output to the output port of the input / output circuit 40.
Control output signals S11 to S16 corresponding to 1 to S3 and the like are supplied, and various drive circuits 61 to 6 connected to the output ports are provided.
Numeral 6 drives various corresponding operating units such as the movable door driving solenoid 17 in accordance with the control output, as will be described later.

FIG. 3 shows the details of the circuit of FIG. 2. In FIG. 3, the switch input detection circuit 30 has first to sixth input terminals 301 to 306, and the first, third and fourth input terminals 301 to 306 are provided. Input terminal 3
One ends of the GO switch 18, the stop switch 26, and the V switch 21 are connected to 01, 303, and 304, and the other ends of these switches are grounded via the second input terminal 302.

At the time of winning in the special winning area or at the time of LED rotation stop request, one of the switches 18, 26 and 21 is temporarily closed, and the input side of the inverter 311 or 312 or 313 is connected via the closed switch. Grounded, winning display signals S1, S3, LED rotation stop signal S4
Become the high level state.

The switch input detection circuit 30 is
An abnormal state detection circuit 320 for detecting a disconnection state between the control switch and the count switch 19, and the like. The circuit 320 includes the fifth and sixth input terminals 305 and 306 of the switch input detection circuit 30 to which the count switch 19 is connected. And the input / output circuit 40.

In the abnormal state detecting circuit 320, the resistor 32
1, 322 and an inverter 323 are connected between the fifth input terminal 305 and the input port PC of the input / output circuit 40. One end of each of the resistor 324 and the capacitor 325 is connected to the junction of the resistors 321 and 322 and the resistor. The other end is connected to the connection point between the inverter 322 and the inverter 323, and the other end is grounded. One end of each of the resistor 326, the capacitor 327, and the constant voltage diode 328 is connected to the sixth input terminal 30.
6 and the other end of the resistor 326 is connected to the third
The other end of the capacitor 327 and the diode 328 are grounded to the output terminal 553a.

Normally, the fifth and sixth input terminals 305 and 306 are connected via the normally-closed count switch 19, and the capacitor 325 is supplied by the current supplied from the power supply circuit 55 via the resistors 326, 321 and 322. The battery is charged, and the voltage between both ends is equal to or higher than a predetermined level. Therefore, the output S2 of the inverter 323 is maintained at a low level.
On the other hand, when the count switch 19 is temporarily opened in accordance with the winning of the attacker 14, the third output terminal 553a of the power supply circuit 55 is grounded via the resistors 326, 321, 324, and the capacitor 325 is connected to the resistors 322, 324. , And the output S2 shifts to a high level state. This high level state returns the switch 19 to the closed position,
Temporarily continues until the capacitor 325 is recharged.

However, for example, the count switch 1
9 is disconnected from the switch input detection circuit 30, the inverter 323 is in the supply cutoff state, the capacitor 325 is in the discharge state, and the output S2 of the inverter 323 is maintained at the high level state. Become. In such an abnormal state, for example, the game ball is fixedly held in the vicinity of the count switch 19 and the switch is forcibly maintained in the winning state other than when the connection is disconnected, and the winning is performed only once regardless of the actual number of winnings. This occurs when tampering is modified to continue to detect.

The input / output circuit 40 is constituted by a programmable peripheral interface (PPI) LSI, and receives a prize display signal and LED rotation stop request signals S1 to S4 to input ports PC4 to PC7, and outputs the output ports PA0 to PA6, P
Control output signals S11 to B0 to PB6 and PC0 to PC3
S16 is held, and these various signals can be exchanged with the CPU 50 in accordance with the write and read commands of the CPU 50 supplied to the control register.

The RESET terminal of the input / output circuit 40 has a reset circuit 40 for the input / output circuit for preventing malfunction of the gaming machine.
0 is connected, and the circuit 400 includes a resistor 401, a capacitor 402, a diode 403, and an inverter 404.

One end of the resistor 401 is connected to the fourth output terminal 554a of the power supply circuit 55, the other end is grounded via the capacitor 402, and the diode 403 is connected between the power supply circuit 55 and the capacitor 402 and in parallel with the resistor 401. The inverter 404 is interposed between the junction between the resistor 401 and the capacitor 402 and the RESET terminal of the input / output circuit 40.

The reset circuit 400 outputs a high-level reset output S7 when the power is turned on, that is, when the power supply circuit 55 is connected to an external AC power supply. The reset output S
7 is maintained from the time when the power is turned on until the voltage across the capacitor 402 reaches a predetermined level, and when the reset output S7 is supplied, the input / output circuit 40 maintains the input mode for a fixed time thereafter. And drive circuits 61 to 66
The supply of the control outputs S11 to S16 is prohibited.

The RAM 52 has a data storage area.
In accordance with the write command of U50, switch flag information for displaying a prize to the chuckers 11 to 13, a prize to the pocket 15, and the presence or absence of the LED rotation stop request, and the number of prizes to the chutka 11 to 13 are stored at predetermined addresses in the storage area. And data representing the number of winnings in the central pocket 15, command data used for discrimination in a control program described later, control output data for driving various operating parts such as the solenoid 17, and the like are stored. You.

The power supply circuit 55 has an input side connected to an external AC power supply, a bridge rectifier 551, and a smoothing circuit 55.
2, 553 and a switching type constant voltage circuit 554 having a switching regulator control IC 554b as a main element.
Output terminals, that is, the output terminals 551a to 551 of the above elements
It is configured to supply various operation power supplies via 4a.

That is, the first output terminal 551a is connected to various lamps 24 and 25, the second output terminal 552a is connected to the movable door drive solenoid 17 and the upper and lower indicators 22, 23, and the third output terminal 553a is connected to the sound drive circuit 66. , Count switch 19 and control IC 554b are connected to respective power supply input terminals to supply a predetermined DC voltage, for example, 24 V, to these components. A fourth output terminal 554a is connected to CPU 50, R
Connected to each IC constituting the OM 51, the RAM 52, etc.
A predetermined DC voltage, for example, 5 V is supplied.
Reference numeral 555 denotes a line noise elimination circuit including various capacitors.

The solenoid drive circuit 61 has a transistor 6
The base of the transistor 611 is connected to the output port PB2 of the input / output circuit 40. When the control output S11 from the port is at a high level, the transistor 611 becomes conductive.
Of the movable door drive solenoid 17 interposed between the output terminals 612 and 613 of FIG.

The upper display driving circuit 62 comprises an IC 700, a part of the IC 800, and transistors 711 to 717 arranged at a subsequent stage of the IC 700. Each of the seven segment driving signals from the output ports PA6 to PA0 of the input / output circuit 40 is provided. The upper display 22 is driven according to a control output signal S12 composed of a common drive signal from the output port PC3 and a common drive signal.

On the other hand, the lower display driving circuit 63 is constructed in substantially the same manner as the above-described circuit 62, and has output ports PA6 to PA0.
Seven-segment drive signal from PC and output port PC2
1 to 3 of the lower display 23 according to a control output S13 composed of the first to third display unit common drive signals from PC0 to PC0.
The third display units 23a to 23c are driven. The segments of each display unit of the upper and lower indicators 22 and 23 include transistor output terminals 721 to 723 and IC output terminals 811 to 81
4 respectively.

The central pocket lamp driving circuit and the starting lamp driving circuits 64 and 65 include a transistor 64 whose base is connected to the output ports PB1 and PB0 of the input / output circuit 40.
1, 651 and the ports PB1, PB0
When the control output signals S14 and S15 are high level, the output terminals 642 and 6 of the transistors 641 and 651
52 and power input terminals 643, 653 of both circuits 64, 65
The central pocket lamp 24 and the starting lamp 25 interposed therebetween are driven for lighting.

The sound drive circuit 66 comprises a part of the IC 800 shown in FIG. 3 and a sound circuit 660 shown in FIG. 4. The sound circuit comprises a basic transmission circuit section 661, an aperture sound generation section 662, and a voltage-frequency conversion. Section 663 and amplifier circuit section 66
4.

The sound drive circuit 66 has an output terminal 66
Speaker 27 connected between the input and output circuit 4
0, more specifically, according to the first to third sound control signals S16a to S16c from the output ports PB3 to PB5 of the circuit 40. The first sound control signal S16a is at a high level. In the case of the basic transmission circuit section 66
The transmitted waveform from 1 is not output to the diode 661a,
When the second sound control signal S16b is at a low level, it is output to the conversion unit 663 via the diode 662a.
The circuit configuration is such that the speaker 27 is deenergized when the sound control signal S16c is at a high level.

FIG. 5 shows a flowchart of a control program executed by the CPU 50. The program is periodically executed in accordance with the reset signal S6 from the reset circuit 54.

First, in step 501, it is determined whether or not the power is turned on. If the answer is affirmative (Yes), the process proceeds to initialization (step 502), where the switch flag in the RAM 52, the winning number data, The command data and the control output data are cleared, and a random number is generated by a refresh counter (not shown) in the CPU 50. The random number is used as the display data of the lower display 23, and the power is turned on.
Immediately thereafter, the display contents displayed on the display are randomized.
When the power is turned on, the reset circuit 400 operates, the input / output circuit 40 is held in the input mode, and the operation of the gaming machine due to erroneous control output is prevented.

Next, the routine proceeds to step 503, where it is determined whether or not the level of the winning display signal S2 supplied from the abnormal state detection circuit 320 of the switch input detection circuit 30 is high for a predetermined time. For such a determination, a soft timer set to a predetermined time longer than the normal duration of the positive polarity pulse output S2 generated at the time of the opening operation of the count switch 19, for example, 1 second, is activated when the output S2 shifts to a high level, The CPU 50 monitors whether or not the time of the soft timer has expired.

When the count switch 19 is normally operated, the result of the determination in step 503 is negative, and the routine goes to step 504. If the winning of the chuckers 11 to 13 has not yet been performed, the starting storage number indicating the number of winnings to the chucker is 0, and it is next determined whether or not the LED is rotating (step 506). Since the content of the command data is 0 and not 1 indicating that the LED is rotating, this determination result is negative,
In addition, any of the answers to the determinations in steps 507 to 510 that are sequentially executed are negative. Therefore, the movable door drive solenoid 17, the lamps 24 and 25, and the speaker 27
Are maintained in the deenergized state (step 511), and the current loop of this program ends.

On the other hand, when the game ball wins one of the chuckers 11 to 13, the start switch 18 is closed, the input terminals 301 and 302 of the switch input detection circuit 30 are connected, and the output S1 of the inverter 131 is high. It will be in the level state. Based on the contents of the switch flag corresponding to the high-level output S1, the result of the determination at step 504 becomes affirmative, and 1 is added to the starting storage number (step 505).

In the case of continuous winning, a predetermined number of times, for example, 4
Such addition is performed only up to the time. Next, since the content of the command data is still 0, steps 506 to 51
In step 512 via 1, it is determined that there is a start storage number, and this storage number is displayed on the upper display 22.
Then, 1 is subtracted from the starting number (step 513),
After the soft timer in the CPU 50 is set to a predetermined maximum LED rotation time, for example, 5 seconds (step 514), the command data is updated from 0 to 1 indicating that the LED is rotating (step 515), and the current loop of this program ends. I do.

The answer to step 506 of the next loop is affirmative, and LED rotation processing is performed (step 516).
The display content of each of the display units 23a to 23c of the lower display 23 is set to 1 by the lower LED drive circuit 63 according to the control output S13.
It is updated every time. In order to randomize the LED rotation, the display update cycle of each of the display units 23a to 23c is, for example, 1: 2: 3.
Is set to This LED rotation processing is automatically stopped when a predetermined maximum time has elapsed, or the push button stop switch 26
Stops at the point when it is released after the pressing operation (that is, at the time of the fall of the positive polarity pulse output S2), and at this time, the command data is updated to 2 indicating that the LED rotation is stopped. During the LED rotation process, the starting lamp 25 is turned on in accordance with the starting lamps according to the control outputs S15 and S16 and the respective outputs of the sound drive circuits 65 and 66, and the rotating sound is output from the speaker 27.

The determination result in step 507 of the next loop is affirmative, and the process shifts to LED rotation stop processing (step 517), in which the display contents of the display units 23a to 23c are sequentially stopped. Specifically, in order to secure the randomness of the LED rotation stop, L is updated to a predetermined address of the RAM 52 every time the reset signal S6 is generated, and takes one of values from 0 to 4, for example.
While storing the random control information for stopping the ED rotation,
The display content of the first display unit 23a when one of the five types of predetermined time corresponding to the value of the random control information at the time when the predetermined maximum time elapses or when the push button 26 is pressed and released is elapsed. Is updated, and then the display unit 23b,
23c is sequentially stopped. Then, the command data is updated to 3 indicating that the LED is being determined.

Therefore, in the loop immediately after the completion of the LED rotation stop processing, the answer to step 508 is affirmative, and the processing shifts to the LED determination processing (step 518), where the display content of the lower display 23 is displayed in the corresponding RAM 52. Judge based on data. Display 2
If the three-digit digital numbers displayed on the first to third display units 23a to 23c are not the second digit, the soft timer in the CPU 50 is set to a first predetermined time, for example, 0.4 seconds, while the even number is set. In the case of a double slot, the second predetermined time is, for example, 6 seconds. In the case of an odd slot (big hit prize), the third predetermined time is set.
Is set to, for example, 20 seconds. Also, the command data is updated to 4 indicating that the attacker is being opened.

The answer to the determination in step 509 in the next loop of the program is affirmative, and the attacker opening process is executed (step 519). That is, the solenoid 1 is controlled by the solenoid drive circuit 61 associated with the control output S11.
7, the movable door 16 of the attacker 14 is opened for a time set according to the combination of the numbers displayed on the display 23. However, at the time of the big hit prize, the movable door 16 is closed when the number of prizes to the attacker 14 reaches ten times even if the third predetermined time has not elapsed.

Further, during the opening of the attacker, the starting lamp 25
Is turned on, and an opening sound is output from the speaker 27. In addition, when the central pocket 15 is won, the central pocket lamp 26 is turned on and off, and flag information for displaying a win is stored in the RAM 52 unless the number of such wins reaches a predetermined number, for example, ten times.

When the first, second or third predetermined time elapses after the attacker is opened, the command data is updated to 5 indicating that delay processing is being performed, and step 510 of the next loop is executed.
Is affirmative, the delay processing is executed (step 520). That is, when it is determined that there is no winning in the central pocket 15 based on the above flag information,
While the process proceeds to step 511 described above, if there is such a prize, the attacker 14 is opened again. Therefore, the attacker 14 continuously receives one prize on condition that the central pocket 15 is won.
It can be opened 0 times.

If the determination result in step 503 is affirmative, that is, if there is an abnormality in the operation of the count switch 19 or the like, the process proceeds to a deactivation process (step 521), and the control output data stored in the RAM 52 is cleared to clear the solenoid 17 And deactivate all the operating parts, and deactivate the gaming machine.

FIG. 6 shows a flowchart of the control program for the lower digital display executed by the CPU 50. As described above, the opening and closing of the attacker 14 which greatly affects the winning profit of the player is performed according to the combination of the number of displays on the display 23 and the number of winnings in the attacker 14 and the central pocket 15. , Parameter values indicating the game progress such as the number of winnings, and the attacker 14.
Whether or not the opening / closing operation is correctly performed according to these parameter values is of interest to the player. Thus, as described below, one display 23 is driven in a plurality of display modes to display various display contents.

If any one of the determination results in steps 602 to 603 is affirmative, that is, if any one of the LED rotation and the LED determination processing is being executed, the lower LE in accordance with the control output S13 is used.
The first display mode is captured on the lower digital display 23 by the output of the D drive circuit 63, and each display unit 23 of the display 23 is displayed.
Any one of the digital numbers 0 to 9 is displayed on a to 23c (steps 604 to 606). Note that this digital number is updated during LED rotation as described above.

On the other hand, steps 601 to 603 and 607
Are negative, that is, when it is determined by the LED determination processing that the three-digit display number of the display unit is not an odd number, the process proceeds to the LED drive stop processing and the display unit 2 stops.
3a to 23c are deactivated (step 608), and the current loop of this program is ended.

If it is determined in step 607 that the number of displayed images on the display device 23 is the same, the display mode of the display device 23 is switched from the first mode to the second mode in accordance with the output of the lower LED drive circuit 63. , The first and third display units 23 of the display 23 based on the winning number display data in the RAM 52.
The number of continuous winnings in the central pocket 15 and the number of winnings in the attacker 14 during each opening operation of the attacker 14 are displayed on the a and 23c, distinguished by a hyphen displayed on the second display 23b (step 609). ~ 6
11).

This second display mode is continued during execution of the attacker opening process or the delay process (step 612,
613). That is, during the attacker opening, the central pocket 1
If there is no prize, LE immediately after the attacker opens
While the D drive stop processing is performed (step 608), if such a prize is won, the second display mode is maintained during the delay processing after the attacker opening is completed, the opening of the attacker 14 is waited, and the attacker 14 is opened again. If so, the display in the second display mode is restarted.

In the above embodiment, the number of winning balls to the attacker 14 is used as the opening prevention condition parameter of the movable door 16, but the opening time of the attacker 14 may be used instead. In this case, the gaming machine may be deactivated when the opening time of the attacker 14 exceeds a predetermined time.

[0057]

According to the pachinko gaming machine of the present invention, the power supply
When driving the circuit section, the line noise elimination circuit
Eliminates power line noise generated in the source circuit section,
Operation supplied to the central processing unit and memory from the power supply circuit
Stable dynamic voltage, noise and central processing unit
And abnormal operation of the memory.
Is the input / output reset circuit provided for the input / output circuit.
Generates reset signal to reset input / output circuit
Control signal to each drive circuit connected to the input / output circuit.
Disable output and prevent malfunction of each drive circuit when power is turned on.
At the same time that the central processing unit was first deployed in memory.
By executing the initialization processing means when the power is turned on.
Clear the control output data in the
Abnormal operation of each drive circuit is prevented, and the central processing unit
When the power is turned on, the randomization processing means
The display data in the memory displayed on the display.
Data is randomized, and immediately after power-on,
Prevent the occurrence of biased and unfair specific game modes
Various abnormalities of pachinko machines due to power supply driving
Can be dealt with at the same time. Set the display contents on the display.
Display data to determine the power-on state and noise.
Therefore, the number of memory starts and winnings by rewriting
Display is incorrectly displayed.
Line noise elimination circuit, input / output reset circuit and initialization
Can be prevented by the processing means and displayed on the display.
Lander for randomizing display data to show
Function by the noise reduction processing means
When the jackpot other than the setting is turned on, the randomness is impaired
To avoid the problem of being established on the display
Can be

[Brief description of the drawings]

FIG. 1 is a partial schematic front view showing a game board of a pachinko gaming machine according to one embodiment of the present invention.

FIG. 2 is a block diagram showing a circuit configuration of the pachinko gaming machine according to the embodiment of the present invention.

FIG. 3 is an electric circuit diagram showing details of the circuit of FIG. 2;

FIG. 4 is an electric circuit diagram showing details of a sound drive circuit of FIG. 2;

FIG. 5 is a flowchart showing a control program executed in the central processing unit of FIG. 2;

FIG. 6 is a flowchart showing a control program executed in the central processing unit of FIG. 2;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Gaming board 2 Winning hole 3 Winning hole 4 Winning hole 5 Winning hole 6 Winning hole 7 Winning hole 8 Winning hole 11 Chukka 12 Chukka 13 Chukka 14 Attacker 15 Central pocket 16 Movable door 17 Movable door drive solenoid 18 Start switch (GO switch) 19 Count Switch 20 Guide Board 21 Central Pocket Switch (V Switch) 22 Upper Digital Display 23 Lower Digital Display 24 Central Pocket Lamp (V Lamp) 25 Start Lamp (GO Lamp) 26 Normally Closed Push Button Stop Switch 27 Speaker 30 Switch input detection circuit 40 Input / output circuit 50 Central processing unit (CPU) 51 Read only memory (ROM) 52 Random access memory (RAM) 53 Clock circuit 54 Reset circuit 55 Power supply circuit 61 Solenoid drive circuit 62 Upper part L D driving circuit 63 under the LED drive circuit 64 V lamp driving circuit 65 GO lamp driving circuit 66 sound drive circuit 311 inverter 312 inverter 313 inverters 320 abnormality detecting circuit 323 inverter 328 zener diode 400 output circuit for resetting the circuit. 551 Bridge rectifier 552 Smoothing circuit 553 Smoothing circuit 554 Constant voltage circuit 554b Switching control IC 555 Line noise elimination circuit 611 Transistor 661 Basic transmission circuit 662 Sound circuit 663 Voltage-frequency conversion section 664 Amplification circuit section

 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-59-55273 (JP, A) JP-A-58-68725 (JP, U) JP-A-55-35676 (JP, U)

Claims (1)

(57) [Claims] (1) A control circuit section provided in a pachinko machine is reduced in number.
At least the power supply circuit, the input / output circuit, and the central processing unit
And a memory, and a line is connected to the power supply circuit section.
A noise elimination circuit is provided, and power is supplied to the input / output circuit section.
The input / output circuit section is reset when the
An input / output reset circuit that inhibits the supply of
When the power is turned on, the control output data in the memory
Initialization processing means to clear
A randomizer for randomizing display data in the memory to be displayed.
A pachinko machine provided with a randomizing means .