JPH0810390A - Power source voltage supplying device for pachinko machine - Google Patents

Abstract

PURPOSE:To generate different power source voltages by use of a single power source voltage supplying device, and downsize a circuit board for pachinko machine arranged in a limited mounting space on the back surface side of a pachinko machine. CONSTITUTION:This device at least has first power source voltage supplying terminals (551a, 552a, 553a) for supplying a first power source voltage to an operation part having a driving means for driving a variable prize hole, a display driving circuit for displaying and driving an indicator, a lamp lighting circuit for lighting a lamp, and a sound driving circuit for voice information; and a second power source voltage supplying terminal 554a for supplying a second power source voltage lower than the first power source voltage to a control part having a CPU 50 for controlling the operation part, a ROM 51, and a RAM 52.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply voltage supply device for a pachinko machine.

[0002]

2. Description of the Related Art A pachinko machine is a display provided on the pachinko machine, a solenoid for opening and closing a variable winning a prize opening, an operating part such as a lamp, a voice notification means, and an operation for supplying power to the operating part. With a power supply circuit for each unit, each control circuit for driving and controlling the operating unit according to the gaming state of the pachinko machine, and a control power supply circuit for supplying power for starting these control circuits are provided. It has been deployed.

Conventionally, an operating part power supply circuit for generating an operating part power supply voltage and a control power supply circuit for generating a control power supply voltage which is a voltage lower than the operating part power supply are provided separately. It was

[0004]

SUMMARY OF THE INVENTION An object of the present invention is to enable different power supply voltages to be generated by a single power supply voltage supply device, and to dispose them in a limited mounting space on the back side of a pachinko machine. Another object of the present invention is to provide a power supply voltage supply device for a pachinko machine, which can realize downsizing of a circuit board of the pachinko machine.

[0005]

In order to solve the above-mentioned problems, a power supply voltage supply device for a pachinko machine of the present invention comprises a drive means for driving a variable winning a prize port, a display drive circuit for driving a display of a display, A first power supply voltage supply terminal for supplying a first power supply voltage to an operating unit having a lamp lighting circuit for lighting a lamp and a sound drive circuit for voice notification, a CPU, a ROM and a ROM for controlling the operating unit. It is characterized in that the control unit including the RAM includes at least a second power supply voltage supply terminal that supplies a second power supply voltage lower than the first power supply voltage.

[0006]

The power source voltage supply device has an operating unit having a drive means for driving the variable winning a prize port, a display drive circuit for displaying and driving the display, a lamp lighting circuit for lighting the lamp, and a sound driving circuit for voice notification. A first power supply voltage supply terminal for supplying a first power supply voltage to the C and a C for controlling the operating unit.
The configuration including at least the second power supply voltage supply terminal for supplying the second power supply voltage lower than the first power supply voltage to the control unit including the PU, the ROM, and the RAM is provided for the operating unit and the control unit. Eliminates the need for separate power supply circuits. As a result, a single power supply circuit is mounted on the circuit board of the pachinko machine, and the circuit board of the pachinko machine is downsized.

[0007]

An embodiment of the present invention will be described below with reference to the drawings.

As shown in FIG. 1, in addition to the normal winning holes 2 to 8 in the game board 1 of the pachinko gaming machine, the chuckers 11 to 13 as starting ports and the attacker 14 as a variable winning port are provided.
Are provided at predetermined positions, respectively.
A central pocket 15 as a special winning area into which a game ball can fly is disposed at the substantially center of the inside through an upper end opening. The attacker 14 has a movable door 16 on its front surface, and the movable door 16 is opened by being driven by a movable door drive solenoid 17 (see FIG. 2) fixed to the back surface of the game board 1 and opened. I have.

A start switch (GO switch) 18 (GO switch) 18 (see FIG. 2), which is composed of three normally open micro switches, which are arranged at predetermined positions in the middle of a winning ball guide passage (not shown) provided on the back surface of the game board 1. Detects the winning to the chuckers 11 to 13 by closing when a winning ball that flows out from the exits of the chuckers 11 to 13 and falls along the guide passage passes. Also,
A count switch 19, which is a normally closed proximity switch, is arranged in the winning ball falling path defined by the peripheral wall of the central pocket 15 and the guide plate 20, and the game ball enters the attacker 14 via the central pocket 15 or not. Is opened to detect such a prize. Further, a central pocket switch (V switch) 21 composed of a normally-open type micro switch is arranged facing an intermediate portion of the central pocket 15 so as to detect winning in the pocket 15.

Upper and lower digital indicators 22 and 23 are arranged in the central portion of the game board 1, and the upper indicator 22 includes a single indicator consisting of a seven segment type light emitting diode (LED). The number of winnings to 13 is displayed, while the lower display 23 includes first to third display portions 23a to 23c each of which is a seven segment light emitting diode.
And displays the display content according to the game progress status as described later.

Reference numerals 24 and 25 denote a central pocket lamp (V lamp) and a starting lamp (GO) which blink or light when a prize is won in the central pocket 15 and the chuckers 11 to 13.
And a reference numeral 26 denotes a normally-open push-button stop switch provided on the front surface of the frame of the gaming machine for stopping an LED rotating operation described later. A speaker 27 (see FIG. 2) is attached to the back surface of the game board 1.

FIG. 2 shows an outline of the circuit configuration of the pachinko gaming machine, and the above-mentioned various switches 18, 19, 21, and 26 are
The switch is connected to an input port of the input / output circuit 40 via a switch input detection circuit 30 that outputs various winning display signals S1 to S3 and an LED rotation stop signal S4 at levels according to the open states of these switches.

A central processing unit (CPU) 50 is connected to an input / output port of the input / output circuit 40 via a data bus, an address bus and a control bus, and a read only memory (RO) for storing control programs and the like described later.
M) A random access memory (RA) that stores various calculations executed by the CPU 50 and the results of determinations and the like.
M) 52.

The clock circuit 53 generates a clock signal S5 having a predetermined cycle and supplies it to the CPU 50 and the reset circuit 54, which reset circuit 54 supplies the clock signal S5.
Is generated and a reset signal S6 for starting execution of a control program to be described later is generated and supplied to the CPU 50.

The power supply circuit 55 is connected to an external AC power supply,
A required DC voltage is supplied to the CPU 50 and the like. A winning display signal S from the CPU 50 is output to the output port of the input / output circuit 40.
Various drive circuits 61 to 6 which are supplied with control output signals S11 to S16 according to 1 to S3 and are connected to the output ports.
In accordance with the control output, 6 drives corresponding movable parts such as the movable door driving solenoid 17 as described later.

FIG. 3 shows the details of the circuit of FIG. 2, in which the switch input detection circuit 30 has first to sixth input terminals 301 to 306, and first, third and fourth circuits. Input terminal 3
One ends of the GO switch 18, the stop switch 26, and the V switch 21 are connected to 01, 303, and 304, and the other ends of these switches are grounded via the second input terminal 302.

When a prize is won in a specific winning area or when an LED rotation stop is requested, one of the switches 18, 26 and 21 is temporarily closed, and the input side of the inverter 311, 312 or 313 is connected via the closed switch. Grounded, winning display signals S1, S3, LED rotation stop signal S4
The corresponding one becomes the high level state.

The switch input detection circuit 30 includes the circuit 30.
An abnormal state detection circuit 320 for detecting a disconnection state between the control switch and the count switch 19, and the like. The circuit 320 includes the fifth and sixth input terminals 305 and 306 of the switch input detection circuit 30 to which the count switch 19 is connected. And the input / output circuit 40.

The resistor 32 in the abnormal state detection circuit 320
1, 322 and an inverter 323 are connected between the fifth input terminal 305 and the input port PC of the input / output circuit 40. One end of each of the resistor 324 and the capacitor 325 is connected to the junction of the resistors 321 and 322 and the resistor. The other end is connected to the connection point between the inverter 322 and the inverter 323, and the other end is grounded. One end of each of the resistor 326, the capacitor 327, and the constant voltage diode 328 is connected to the sixth input terminal 30.
6 and the other end of the resistor 326 is the third terminal of the power supply circuit 55.
The other end of the capacitor 327 and the diode 328 are grounded to the output terminal 553a.

The fifth and sixth input terminals 305 and 306 are normally connected via the normally closed count switch 19, and the capacitor 325 is supplied with current from the power supply circuit 55 via the resistors 326, 321 and 322. The battery is charged, and the voltage across it becomes equal to or higher than a predetermined level. Therefore, the output S2 of the inverter 323 is maintained at the low level.
On the other hand, when the count switch 19 is temporarily opened in accordance with the winning of the attacker 14, the third output terminal 553a of the power supply circuit 55 is grounded via the resistors 326, 321, 324, and the capacitor 325 is connected to the resistors 322, 324. , And the output S2 shifts to a high level state. This high level state returns the switch 19 to the closed position,
Temporarily continues until the capacitor 325 is recharged.

However, for example, the count switch 1
9 is disconnected from the switch input detection circuit 30, the inverter 323 is in the supply cutoff state, the capacitor 325 is in the discharge state, and the output S2 of the inverter 323 is maintained at the high level state. Become. In such an abnormal state, a game ball is fixedly held in the vicinity of the count switch 19 and the switch is forcibly maintained in a winning state other than when the connection is disconnected, and the winning is performed only once regardless of the actual number of winnings. Occurs when unauthorized modification is made to continue to detect.

The input / output circuit 40 is composed of a programmable peripheral interface (PPI) LSI, and receives winning display signals and LED rotation stop request signals S1 to S4 at the input ports PC4 to PC7, and output ports PA0 to PA6, P.
Control output signals S11 to B0 to PB6, PC0 to PC3
S16 is held, and these various signals can be exchanged with the CPU 50 in accordance with the write and read commands of the CPU 50 supplied to the control register.

The RESET terminal of the input / output circuit 40 has an input / output circuit reset circuit 40 for preventing malfunction of the game machine.
0 is connected, and the circuit 400 includes a resistor 401, a capacitor 402, a diode 403, and an inverter 404.

One end of the resistor 401 is connected to the fourth output terminal 554a of the power supply circuit 55, the other end is grounded via the capacitor 402, and the diode 403 is connected between the power supply circuit 55 and the capacitor 402 and in parallel with the resistor 401. The inverter 404 is interposed between the connection point of the resistor 401 and the capacitor 402 and the RESET terminal of the input / output circuit 40.

The reset circuit 400 outputs a high-level reset output S7 when the power is turned on, that is, when the power supply circuit 55 is connected to an external AC power supply. The reset output S
7 is maintained from the time when the power is turned on until the voltage across the capacitor 402 reaches a predetermined level, and when the reset output S7 is supplied, the input / output circuit 40 maintains the input mode for a fixed time thereafter. And drive circuits 61 to 66
The supply of the control outputs S11 to S16 is prohibited.

RAM 52 has a data storage area, and CP
In accordance with the write command of U50, switch flag information indicating whether or not there is a prize to the Chatsuka 11 to 13, a prize to the pocket 15, and an LED rotation stop request at each predetermined address of the storage area, and the number of prizes to the Chatsuka 11 to 13 are displayed. Stored are data (number of memory starts), data representing the number of winnings in the central pocket 15, command data used for determination in a control program described later, control output data for driving various operating parts such as the solenoid 17, and the like. It

The input side of the power supply circuit 55 is connected to an external AC power supply, while the bridge rectifier 551 and the smoothing circuit 55 are connected.
2, 553, and a constant voltage circuit 554 arranged in the subsequent stage of these, which has a switching regulator control IC 554b as a main element, and includes first to fourth output terminals, that is, output terminals 551a to 553a of the above elements. Various operating power supplies are supplied through the second power supply voltage supply terminal including the power supply voltage supply terminal and the output terminal 554a.

That is, the first output terminal 551a, which is a part of the first power supply voltage supply terminal, has various lamps 24, 25.
And a second power supply voltage supply terminal that is a part of the first power supply voltage supply terminal.
The output terminal 552a is connected to the movable door drive solenoid 17 and the upper and lower indicators 22 and 23, and the third output terminal 553a, which is a part of the first power supply voltage supply terminal, includes the sound drive circuit 66 and the count switch 19. And control IC
It is connected to each power input terminal of 554b and supplies a predetermined DC voltage, for example, 24V, to these elements.

The fourth output terminal 554a serving as the second power supply voltage supply terminal has the CPU 50, ROM 51, RA
Connected to each IC that constitutes M52, etc.,
For example, 5V is supplied. Reference numeral 555 denotes a line noise elimination circuit including various capacitors.

The solenoid drive circuit 61 is a transistor 6
The base of the transistor 611 is connected to the output port PB2 of the input / output circuit 40. When the control output S11 from the port is at a high level, the transistor 611 becomes conductive.
Of the movable door drive solenoid 17 interposed between the output terminals 612 and 613 of FIG.

The upper display driving circuit 62 is composed of IC700, a part of IC800, and transistors 711 to 717 arranged in the latter stage of IC700, and each of the seven segment driving signals from the output ports PA6 to PA0 of the input / output circuit 40. The upper display 22 is driven according to the control output signal S12 consisting of the common drive signal from the output port PC3.

On the other hand, the lower display driving circuit 63 is constructed in substantially the same manner as the above circuit 62, and has the output ports PA6 to PA0.
Seven segment drive signals from and output port PC2
1 to 3 of the lower display 23 according to a control output S13 composed of the first to third display unit common drive signals from PC0 to PC0.
The 3rd display part 23a-23c is driven. The segments of each display unit of the upper and lower indicators 22 and 23 include transistor output terminals 721 to 723 and IC output terminals 811 to 81
4 are connected to each other.

The central pocket lamp driving circuit and the starting lamp driving circuits 64 and 65 have their bases connected to the output ports PB1 and PB0 of the input / output circuit 40.
1 and 651 respectively, and the ports PB1 and PB0
When the control output signals S14, S15 from are at high level, the output terminals 642, 6 of the transistors 641, 651 are
52 and power input terminals 643, 653 of both circuits 64, 65
The central pocket lamp 24 and the starting lamp 25, which are respectively interposed therebetween, are driven to light.

The sound driving circuit 66 comprises a part of the IC 800 shown in FIG. 3 and a sound circuit 660 shown in FIG. 4. The sound circuit includes a basic oscillator circuit section 661, an opening sound generating section 662 and a voltage-frequency conversion. Unit 663 and amplifier circuit unit 66
It is composed of four.

The sound driving circuit 66 has its output terminal 66.
The speaker 27 connected between 5 and 666 is connected to the input / output circuit 4
0, more specifically, according to the first to third sound control signals S16a to S16c from the output ports PB3 to PB5 of the circuit 40. The first sound control signal S16a is at a high level. In the case of the basic transmission circuit section 66
The oscillation waveform from 1 is not output to the diode 661a,
When the second sound control signal S16b is at a low level, it is output to the conversion unit 663 via the diode 662a.
The circuit configuration is such that the speaker 27 is deenergized when the sound control signal S16c is at a high level.

FIG. 5 is a flow chart of a control program executed by the CPU 50. The program is periodically executed according to the reset signal S6 from the reset circuit 54.

First, in step 501, it is judged whether or not the power is turned on, and if the answer is affirmative (Yes), the process proceeds to the initialization process (step 502), the switch flag in the RAM 52, the winning number data, Command data, control output data, etc. are cleared, a random number is generated by a refresh counter (not shown) in the CPU 50, and this random number is used as display data for the lower display 23 so that the winning probability becomes random. There is. When the power is turned on, the reset circuit 400 operates, the input / output circuit 40 is held in the input mode, and the operation of the gaming machine due to erroneous control output is prevented.

Next, in step 503, it is determined whether or not the level of the prize display signal S2 supplied from the abnormal state detection circuit 320 of the switch input detection circuit 30 is in the high level state for a predetermined time. For such a determination, a soft timer, which is set to a predetermined time longer than the normal duration of the positive polarity pulse output S2 generated during the opening operation of the count switch 19, for example, 1 second, is started at the time when the output S2 shifts to a high level, The CPU 50 monitors whether the soft timer has timed out.

When the count switch 19 is operating normally, the determination result of step 503 is negative, and the process proceeds to step 504. If the winning of the chuckers 11 to 13 has not yet been performed, the starting storage number indicating the number of winnings to the chucker is 0, and it is next determined whether or not the LED is rotating (step 506). Since the content of the command data is 0 and not 1 indicating that the LED is rotating, this determination result is negative,
In addition, any of the answers to the determinations in steps 507 to 510 that are sequentially executed are negative. Therefore, the movable door drive solenoid 17, the lamps 24 and 25, and the speaker 27
Are maintained in the deenergized state (step 511), and the current loop of this program ends.

On the other hand, when the game ball wins any of the chuckers 11 to 13, the start switch 18 is closed, the input terminals 301 and 302 of the switch input detection circuit 30 are connected, and the output S1 of the inverter 131 is high. It becomes a level state. Based on the contents of the switch flag corresponding to the high-level output S1, the result of the determination at step 504 becomes affirmative, and 1 is added to the starting storage number (step 505).

In the case of continuous winning, a predetermined number of times, for example, 4
Such addition is executed only up to the number of times. Next, since the content of the command data is still 0, steps 506 to 51
When step 512 is reached via 1, it is determined that there is a starting memory number, and this memory number is displayed on the upper display 22.
Then, 1 is subtracted from the number of starts (step 513),
After the soft timer in the CPU 50 is set to a predetermined maximum LED rotation time, for example, 5 seconds (step 514), the command data is updated from 0 to 1 indicating that the LED is rotating (step 515), and the current loop of this program ends. I do.

The answer to step 506 of the next loop is affirmative, and LED rotation processing is performed (step 516).
The display content of each of the display units 23a to 23c of the lower display 23 is set to 1 by the lower LED drive circuit 63 according to the control output S13.
It is updated every time. In order to randomize the LED rotation, the display update cycle of each of the display units 23a to 23c is, for example, 1: 2: 3.
Is set to This LED rotation processing is automatically stopped when a predetermined maximum time has elapsed, or the push button stop switch 26
Is stopped after being pressed after being pressed (that is, when the positive polarity pulse output S2 falls), and at this time, the command data is updated to 2 indicating that the LED rotation is stopped. During the LED rotation process, the starting lamp 25 is turned on in accordance with the starting lamps according to the control outputs S15 and S16 and the respective outputs of the sound drive circuits 65 and 66, and the rotating sound is output from the speaker 27.

The determination result of step 507 of the next loop is affirmative, the process proceeds to the LED rotation stop process (step 517), and the display contents of the display portions 23a to 23c are sequentially stopped. Specifically, in order to secure the randomness of the LED rotation stop, L is updated to a predetermined address of the RAM 52 every time the reset signal S6 is generated, and takes one of values from 0 to 4, for example.
While storing random control information for stopping ED rotation,
The display content of the first display unit 23a when one of the five types of predetermined time corresponding to the value of the random control information at the time when the predetermined maximum time elapses or when the push button 26 is pressed and released is elapsed. Is updated, and then the display unit 23b,
The update of 23c is stopped sequentially. Then, the command data is updated to 3 indicating that the LED is being determined.

Therefore, in the loop immediately after the completion of the LED rotation stop processing, the answer to step 508 becomes affirmative, and the processing shifts to the LED determination processing (step 518) to display the contents displayed on the lower display 23 in the RAM 52 corresponding thereto. Determine based on the data. As a result of the discrimination, the display device 2
If the three-digit digital numbers displayed on the first to third display units 23a to 23c are not the second digit, the soft timer in the CPU 50 is set to a first predetermined time, for example, 0.4 seconds, while the even number is set. In the case of a double slot, the second predetermined time is, for example, 6 seconds. In the case of an odd slot (big hit prize), the third predetermined time is set.
The predetermined time is set to 20 seconds, for example. Also, the command data is updated to 4 indicating that the attacker is being opened.

The answer to the determination in step 509 in the next loop of this program is affirmative, and the attacker opening process is executed (step 519). That is, the solenoid 1 is controlled by the solenoid drive circuit 61 associated with the control output S11.
7, the movable door 16 of the attacker 14 is opened for a time set according to the combination of the numbers displayed on the display 23. However, at the time of the big hit prize, the movable door 16 is closed when the number of prizes to the attacker 14 reaches ten times even if the third predetermined time has not elapsed.

Further, during opening of the attacker, the starting lamp 25
Is turned on, and an opening sound is output from the speaker 27. Further, when the central pocket 15 is won, the central pocket lamp 26 is blinked, and flag information for displaying the winning is stored in the RAM 52 unless the number of times of winning reaches a predetermined number, for example, 10 times.

When the first, second, or third predetermined time has elapsed after the attacker was opened, the command data is updated to 5 indicating that the delay process is in progress, and step 510 of the next loop.
Since the determination result of is affirmative, the delay process is executed (step 520). That is, when it is determined that there is no winning in the central pocket 15 based on the above flag information,
While the process proceeds to step 511 described above, if there is such a prize, the attacker 14 is opened again. Therefore, the attacker 14 continuously receives one prize on condition that the central pocket 15 is won.
It has been opened for 0 times.

If the determination result in step 503 is affirmative, that is, if there is an abnormality in the operation of the count switch 19 or the like, the operation shifts to the deactivation process (step 521), the control output data held in the RAM 52 is cleared, and the solenoid 17 is operated. Deactivate all the operating parts such as and deactivate the game machine.

FIG. 6 shows a flow chart of the lower digital display control program executed by the CPU 50. As described above, the opening and closing of the attacker 14 which greatly affects the winning profit of the player is performed according to the combination of the number of displays on the display 23 and the number of winnings in the attacker 14 and the central pocket 15. , Parameter values indicating the game progress such as the number of winnings, and the attacker 14.
Whether or not the opening / closing operation is correctly performed according to these parameter values is of interest to the player. Thus, as described below, one display 23 is driven in a plurality of display modes to display various display contents.

If any of the determination results of steps 602 to 603 is affirmative, that is, if any one of the LED rotation and LED determination processing is being executed, the lower LE according to the control output S13 is executed.
The first display mode is captured on the lower digital display 23 by the output of the D drive circuit 63, and each display unit 23 of the display 23 is displayed.
Any one of the digital numbers 0 to 9 is displayed on a to 23c (steps 604 to 606). Note that this digital number is updated during LED rotation as described above.

On the other hand, steps 601-603 and 607
If the answer to each of the above is negative, that is, if it is determined by the LED determination processing that the three-digit display number on the display is not an odd-numbered doublet, the process proceeds to the LED drive stop processing and each display unit 2
3a to 23c are deactivated (step 608), and the current loop of this program ends.

When it is determined in step 607 that the display number of the display unit 23 is a doublet, the display mode of the display unit 23 is switched from the first mode to the second mode according to the output of the lower LED drive circuit 63. , The first and third display units 23 of the display unit 23 based on the winning number display data in the RAM 52.
The number of continuous winnings in the central pocket 15 and the number of winnings in the attacker 14 during each opening operation of the attacker 14 are displayed on the a and 23c, distinguished by a hyphen displayed on the second display 23b (step 609). ~ 6
11).

This second display mode continues during execution of the attacker opening process or the delay process (step 612).
613). That is, during opening of the attacker, the central pocket 1
If there is no prize for 5, LE immediately after the opening of the attacker
While the D drive stop processing is performed (step 608), if such a prize is won, the second display mode is maintained during the delay processing after the attacker opening is completed, the opening of the attacker 14 is waited, and the attacker 14 is opened again. If so, the display in the second display mode is restarted.

In the above embodiment, the number of winning balls to the attacker 14 is used as the opening prevention condition parameter of the movable door 16, but the opening time of the attacker 14 may be used instead. In this case, the gaming machine may be deactivated when the opening time of the attacker 14 exceeds a predetermined time.

[0055]

The power supply voltage supply device for a pachinko machine of the present invention is for driving means for driving the variable winning a prize port, a display drive circuit for displaying and driving the display, a lamp lighting circuit for lighting the lamp, and a voice notification. First power supply voltage supply terminal for supplying a first power supply voltage to the operating unit having the sound driving circuit of the above, and CPU, ROM and RA for controlling the operating unit.
Since the control unit including M includes at least the second power supply voltage supply terminal that supplies the second power supply voltage lower than the first power supply voltage, Since the second power supply voltage for the control unit can be supplied by a single power supply voltage supply device, it is not necessary to separately provide power supply circuits for the operating unit and the control unit,
As a result, a single power supply circuit unit is mounted on the circuit board of the pachinko machine, and the circuit board of the pachinko machine can be downsized.

[Brief description of drawings]

FIG. 1 is a partial schematic front view showing a game board of a pachinko gaming machine according to one embodiment of the present invention.

FIG. 2 is a block diagram showing a circuit configuration of the pachinko gaming machine according to the embodiment of the present invention.

FIG. 3 is an electric circuit diagram showing details of the circuit of FIG. 2;

FIG. 4 is an electric circuit diagram showing details of a sound drive circuit of FIG. 2;

FIG. 5 is a flowchart showing a control program executed in the central processing unit of FIG. 2;

FIG. 6 is a flowchart showing a control program executed in the central processing unit of FIG. 2;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Gaming board 2 Winning hole 3 Winning hole 4 Winning hole 5 Winning hole 6 Winning hole 7 Winning hole 8 Winning hole 11 Chukka 12 Chukka 13 Chukka 14 Attacker 15 Central pocket 16 Movable door 17 Movable door drive solenoid 18 Start switch (GO switch) 19 Count Switch 20 Guide Board 21 Central Pocket Switch (V Switch) 22 Upper Digital Display 23 Lower Digital Display 24 Central Pocket Lamp (V Lamp) 25 Start Lamp (GO Lamp) 26 Normally Closed Push Button Stop Switch 27 Speaker 30 Switch input detection circuit 40 Input / output circuit 50 Central processing unit (CPU) 51 Read only memory (ROM) 52 Random access memory (RAM) 53 Clock circuit 54 Reset circuit 55 Power supply circuit 61 Solenoid drive circuit 62 Upper part L D drive circuit 63 Lower LED drive circuit 64 V lamp drive circuit 65 GO lamp drive circuit 66 Sound drive circuit 311 Inverter 312 Inverter 313 Inverter 320 Abnormal condition detection circuit 323 Inverter 328 Constant voltage diode 400 Input / output circuit reset circuit 551 Bridge rectifier 552 Smoothing circuit 553 Smoothing circuit 554 Constant voltage circuit 554b Switching control IC 555 Line noise elimination circuit 611 Transistor 661 Basic oscillation circuit 662 Sound circuit 663 Voltage-frequency conversion unit 664 Amplification circuit unit

Claims (1)

[Claims] 1. A drive means for driving a variable winning opening,
A first power supply voltage supply terminal for supplying a first power supply voltage to an operating unit having a display drive circuit for driving the display of a display, a lamp lighting circuit for lighting a lamp, and a sound drive circuit for voice notification, and the operation. CPU for controlling parts, RO
A power supply voltage supply for a pachinko machine, characterized in that a control unit including M and RAM is provided with at least a second power supply voltage supply terminal for supplying a second power supply voltage lower than the first power supply voltage. apparatus.