JP2626485B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having an SOI structure in which a semiconductor layer is formed on an insulating layer, and an element is formed on the semiconductor layer. the method of manufacturing a semiconductor device which prevents increase.

[0002]

BACKGROUND OF THE INVENTION Semiconductor devices having a conventional SOI structure,
For example, a method of manufacturing a MOS transistor is shown in FIG. FIG.
As shown in (a), oxygen is ion-implanted from the surface side of the n-type silicon substrate 21 in which boron of a required concentration has been introduced in advance, and a silicon oxide film 22 is formed at a depth of about 0.6 μm from the surface. I do. Next, as shown in FIG. 3B, boron ions are implanted from the surface of the silicon substrate 21 toward a depth near the interface between the surface of the silicon oxide film 22 and the silicon substrate 21. After that, nitrogen annealing is performed at 1000 ° C. for 30 minutes to recover crystal defects caused by ion implantation. As a result, as shown in FIG. 3C, a high-concentration P-type layer is formed in a region immediately above the silicon oxide film 22. 23 are formed.

Then, as shown in FIG. 3D, a gate oxide film 24 of about 200 ° is formed on the surface of the silicon substrate 21 by a thermal oxidation method, and polysilicon is formed by a vapor phase growth method. The gate electrode 25 is formed by selective etching using a lithography technique. Further, arsenic is ion-implanted into the silicon substrate 21 to form an N-type source / drain region 26, and an N-channel MOS transistor is completed. FIGS. 4A and 4B are concentration distribution diagrams when boron ions are implanted after the formation of the silicon oxide film 22 and nitrogen annealing is performed thereafter.

Here, the reason why the high-concentration P-type layer 23 is formed immediately above the silicon oxide film 22 will be described. In this type of SOI semiconductor device, since the thickness (depth) of the silicon substrate 21 on the silicon oxide film 22 is small, the substrate of the MOS transistor to be formed, that is, the well region is also shallow, and the well resistance is reduced. Get higher. When the well resistance is increased, the well potential is greatly increased by the substrate current, so that the source-substrate is forward-biased and the current flows. Therefore, by forming the high-concentration P-type layer 23 on the silicon substrate 21 immediately above the silicon oxide film 22, the well resistance is reduced, and the above-described problem is prevented.

[0005]

In order to improve the performance of the MOS transistor of such an SOI type semiconductor device, if the thickness of the silicon substrate 11, that is, the depth of the well is reduced, the source / drain region 26 is reduced. The parasitic capacitance such as the capacitance between the gate and the well can be reduced. However, when the high-concentration P-type layer 23 is formed on the silicon substrate 21 in the region immediately above the silicon oxide film 22 as described above, as shown in FIG.
Is diffused to the surface side of the silicon substrate 21 to increase the surface concentration, which makes it difficult to control the threshold voltage of the MOS transistor. Problem arises. An object of the present invention, while lowering the resistance of the semiconductor layer as well, providing a <br/> manufacturing method of lowering the impurity concentration in the surface of the semiconductor layer a semiconductor apparatus capable of improving characteristics of the element It is in.

[0006]

SUMMARY OF THE INVENTION A semiconductor device according to the present invention is manufactured.
The method includes the steps of: ion-implanting oxygen into a semiconductor substrate to form an insulating layer at a predetermined depth position in the semiconductor substrate; and ion-implanting impurities into the semiconductor substrate to introduce impurities into the insulating layer. Forming a high-concentration impurity layer by heat-treating the semiconductor substrate to diffuse impurities in the insulating layer to such an extent that the impurity does not reach the surface of the semiconductor substrate; and forming an element on the surface of the semiconductor substrate. Forming a step.

[0007]

Next, the present invention will be described with reference to the drawings. FIG. 1 is a sectional view showing a semiconductor device of the present invention in the order of its manufacturing steps. First, as shown in FIG. 1A, oxygen is ion-implanted from the surface of an N-type silicon substrate 11 in which boron is introduced in a concentration of about 1 × 10 ¹⁶ cm ⁻³ in advance, and a depth of about 4000 ° of the silicon substrate 1 is obtained. Then, a silicon oxide film 12 of about 2000 ° is formed. Next, boron ions are implanted from the surface of the silicon substrate 12 to introduce boron into the silicon oxide film 12. At this time, the concentration of boron to be implanted is set at a position slightly closer to the upper surface side than the center position in the thickness direction of the silicon oxide film 12, for example, a depth position smaller than 5000 ° from the surface of the silicon substrate 11 in this example. So that it becomes the concentration. The density distribution at this time is shown in FIG.
(A).

Next, the silicon substrate 11 is heated at 1000 ° C.
Nitrogen annealing is performed for 30 minutes to activate boron and recover crystal defects. As a result of this nitrogen annealing, FIG.
As shown in (c), boron in the silicon oxide film 12 is diffused up and down, and a high concentration P-type layer 13 is formed at the interface between the silicon oxide film 12 and the silicon substrate 11. At this time,
Since the maximum concentration of boron in the silicon oxide film 12 is located closer to the upper surface, the diffusion size is larger on the upper side of the silicon substrate 11 in the drawing than on the lower side, and is substantially above the silicon oxide film 12 on the upper side. A high-concentration P-type layer 13 diffused to a height of 1000 ° is formed. The lower high-concentration P-type layer 13 has an extremely narrow range. FIG. 2B shows the density distribution at this time. Note that the concentration on the lower side of the silicon oxide film 12 is omitted.

Then, as shown in FIG. 1D, a gate oxide film 14 having a thickness of about 200.degree. Is formed on the surface of the silicon substrate 11 by a thermal oxidation method, and about 3000.degree. Is formed, and is selectively etched by photolithography to form a gate electrode 15. Further, arsenic is ion-implanted at an energy of 70 KeV and a dose of 1 × 10 ¹⁶ cm ⁻² to
A drain region 16 is formed. Thereafter, an N-type MOS transistor is formed by forming an interlayer insulating film, a contact, a wiring layer, and the like (not shown).

Therefore, the thus formed MOS
In the transistor, the thickness of the silicon substrate 11 existing on the silicon oxide film 12, that is, the depth of the well is 4000 °
Therefore, the parasitic capacitance between the source / drain region 16 and the well can be reduced. Also,
Although the depth of the well is reduced, the well resistance is reduced because the high-concentration P-type layer 13 is formed at the bottom of the well, that is, the region immediately above the silicon oxide film 12, so that the source resistance and the like in the MOS transistor are reduced. Failure is prevented.
On the other hand, in the high-concentration P-type layer 13, the maximum concentration of boron exists in the silicon oxide film 12, and is diffused from the silicon oxide film 12 toward the well to form the silicon oxide film 12.
As shown in FIG. 2B, the boron concentration does not increase in the vicinity of the surface of the well because it exists only in the thickness region of about 1000.degree. , The threshold voltage of the MOS transistor can be easily controlled.

In the above embodiment, boron is ion-implanted so as to have a maximum concentration above the central position of the silicon oxide film 12 in the thickness direction. 11 to 10 boron
This is for diffusing by about 00 °. Therefore, when the concentration distribution of the high-concentration P-type layer 13 formed on the silicon substrate 11 is different from that of the above-described embodiment, the position of the maximum concentration may be appropriately changed, or the condition of the nitrogen annealing may be appropriately changed. I just need. Further, the above-described conditions can be appropriately changed by changing the thickness of the silicon oxide film 12. Here, in the above embodiment, an example in which the present invention is applied to a P-type silicon substrate is shown, but it goes without saying that the present invention can be applied to an N-type silicon substrate by changing the conductivity type of impurities. No.

[0012]

As described above, the production method of the present invention
Forms an insulating layer by ion implantation of oxygen into a semiconductor substrate
And, and that it is this impurity in the insulating layer by ion implantation, and reach the impurity on the surface of the semiconductor substrate
As the high-concentration impurity layer is formed only at the bottom of the semiconductor layer by thermal diffusion from the insulating layer to the semiconductor layer in the range, the resistance of the semiconductor layer as a well is reduced while the increase in the surface concentration is suppressed. Can form a semiconductor layer, formed on a semiconductor layer
It is possible to realize the manufacture of a semiconductor device capable of improving the reliability of an element and easily controlling a threshold voltage.

[Brief description of the drawings]

FIG. 1 is a sectional view showing an embodiment of the present invention in the order of manufacturing steps.

FIG. 2 is a concentration distribution diagram of impurities during a manufacturing process according to one embodiment of the present invention.

FIG. 3 is a cross-sectional view showing a conventional semiconductor device in the order of manufacturing steps.

FIG. 4 is a concentration distribution diagram of an impurity during a manufacturing process of a conventional semiconductor device.

[Explanation of symbols]

 Reference Signs List 11 silicon substrate 12 silicon oxide film 13 high-concentration p-type layer 14 gate oxide film 15 gate electrode 16 source / drain region

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁶ Identification code Agency reference number FI Technical indication H01L 21/76 R

Claims (1)

(57) [Claims] 1. A semiconductor device in which oxygen is ion-implanted into a semiconductor substrate.
Forming an insulating layer at a predetermined depth position on the body substrate;
The impurity is ion-implanted into the semiconductor substrate and
A step of introducing impurities and a heat treatment of the semiconductor substrate.
The impurities in the insulating layer to the surface of the semiconductor substrate.
Diffusion in a range that cannot be reached to form a high-concentration impurity layer
Forming an element on the surface of the semiconductor substrate
And a method of manufacturing a semiconductor device.