JP2600669B2 - Metal bump for transfer bump - Google Patents

Metal bump for transfer bump

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Publication number
JP2600669B2
JP2600669B2 JP7469987A JP7469987A JP2600669B2 JP 2600669 B2 JP2600669 B2 JP 2600669B2 JP 7469987 A JP7469987 A JP 7469987A JP 7469987 A JP7469987 A JP 7469987A JP 2600669 B2 JP2600669 B2 JP 2600669B2
Authority
JP
Japan
Prior art keywords
metal
layer
bump
film
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP7469987A
Other languages
Japanese (ja)
Other versions
JPS63240048A (en
Inventor
賢造 畑田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP7469987A priority Critical patent/JP2600669B2/en
Publication of JPS63240048A publication Critical patent/JPS63240048A/en
Application granted granted Critical
Publication of JP2600669B2 publication Critical patent/JP2600669B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】 産業上の利用分野 本発明は、半導体素子の電極とフィルムリードとを接
続する際に用いる転写バンプ用金属突起するに際して前
記電極とフィルムハードとの間に介在させる転写バンプ
用金属突起の構成に関する。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transfer bump interposed between an electrode of a semiconductor element and a film hard when a metal bump for a transfer bump is used to connect the electrode to a film lead. The configuration of the metal projection for use.

従来の技術 IC.LSIの半導体素子を薄型あるいは小型に実装する方
式として、フィルムキャリヤ実装方式がある。この技術
は、半導体素子をウエハー状態で全面にCr.Cu,Ti−Pd,T
i−Cu,Cr−Cu等の多層金属膜を被着させた後、フォトリ
ソグラフィ工程によって、半導体素子の電極を開孔せし
めたパターンを形成し、この開孔部にAu,Cu,半田等の金
属突起を10〜30μmの厚さに形成する。ついで、不要と
なったフォトレジスト層や多層金属膜をエッチング除去
し、半導体素子の電極上に金属突起を形成するものであ
った。そして、絶縁テープ上に形成されたCu箔をエッチ
ング加工したフィルムリードと前記金属突起とを加圧、
加熱し、熱圧着もしくは共晶合金により接合する。
2. Description of the Related Art There is a film carrier mounting method as a method for mounting a thin or small semiconductor device of IC.LSI. In this technology, semiconductor elements are formed on a wafer in the form of Cr.Cu, Ti-Pd, T
After depositing a multi-layer metal film such as i-Cu, Cr-Cu, a pattern in which the electrodes of the semiconductor element are opened is formed by a photolithography process, and Au, Cu, solder, etc. are formed in the opening. The metal projection is formed to a thickness of 10 to 30 μm. Then, the unnecessary photoresist layer and the multilayer metal film are removed by etching to form metal projections on the electrodes of the semiconductor element. Then, a film lead formed by etching a Cu foil formed on an insulating tape and the metal protrusion are pressed,
Heat and bond by thermocompression bonding or eutectic alloy.

ところがこの技術にあっては、半導体素子の電極上に
金属突起を形成しなければならない。そのために、多層
金属膜を被着する工程、めっき用のマスクを形成した
り、あるいは多層金属膜を選択的に除去するためのマス
クを形成するフォトリソ工程、金属突起を電解めっき法
で形成するためのめっき工程それにエッチング工程等、
沢山の復雑な工程や、この工程に用いるための高額な設
備を必要とするばかりか、全ての処理がウエハー単位で
行なわれるため不良チップにも高価な金属突起を設ける
ことになり、製造コストの上昇や歩留り低下を招いてい
た。
However, in this technique, a metal projection must be formed on an electrode of a semiconductor element. Therefore, a step of applying a multilayer metal film, a photolithography step of forming a mask for plating or forming a mask for selectively removing the multilayer metal film, and a method of forming metal projections by electrolytic plating. Plating process and etching process, etc.
Not only do a lot of complicated processes and expensive equipment for this process be required, but also all the processes are performed on a wafer basis, so that expensive metal projections are also provided on defective chips, which leads to manufacturing costs. Rise and yield decrease.

これを解決する新しい方式として転写バンプ実装方式
が発明されている。この技術は、あらかじめくり返し再
生可能な基板上に金属突起を形成しておき、この金属突
起をフィルムリード側に転写・接合し、転写・接合され
た金属突起を半導体素子の電極上に加圧・加熱し熱圧着
によりフィルムリードと半導体素子の電極とを接合する
ものである。更に詳述すれば、セラミックやガラス等の
絶縁基板上にPt,ITO,Pd等のAuめっきに対し、剥れやす
い金属膜を被着し、この上に半導体素子の電極と対応し
た位置に開孔部をもつ、めっき用のマスクパターンを形
成する。マスクパターンの材質はSiO2,Si3N4や耐熱性の
フォトレジスト膜で、開孔部の大きさは5μm〜30μm
である。
As a new method to solve this, a transfer bump mounting method has been invented. In this technology, metal protrusions are formed on a substrate that can be repeatedly played back in advance, and the metal protrusions are transferred and bonded to the film lead side, and the transferred and bonded metal protrusions are pressed and applied to the electrodes of the semiconductor element. The film lead and the electrode of the semiconductor element are joined by heating and thermocompression bonding. More specifically, an easily peelable metal film is applied to an Au plating such as Pt, ITO, or Pd on an insulating substrate such as a ceramic or a glass, and is opened at a position corresponding to an electrode of a semiconductor element. A mask pattern for plating having holes is formed. The material of the mask pattern is SiO 2 , Si 3 N 4 or a heat-resistant photoresist film, and the size of the opening is 5 μm to 30 μm
.

次に前記金属膜を一方の電極とし、開孔部に電解めっ
き法によりAu,Cu等の金属突起を20〜30μmの高さに形
成する。Cu箔をエッチング加工して形成したフィルムリ
ードにはAu又はSnめっきが0.3〜0.6μmの厚さに形成さ
れ、このフィルムリードと前記金属突起とを位置合せ
し、ボンディングツールで加圧・加熱し300℃1リード
当り5〜20g)すれば、基板上の金属突起はフィルムリ
ード側に転写、接合される。例えば金属突起がAuで形成
されリードがSnめっきされておれば、Au・Snの合金で接
合されるものである。しかるのち、半導体素子のアルミ
電極と前記フィルムリードに転写接合した金属突起とを
位置合せし、加熱,加圧(例えば450℃,リード当り60
−100g)すれば、Au,Alの合金でフィルムリードとアル
ミ電極とは接合されるものである。この技術は金属突起
を形成する基板をくり返し使用でき、かつ、従来の方式
と異なり、復雑な工程,高額な設備を必要とせず、か
つ、良品のチップのみを取扱うので歩留りも高く、低コ
ストの実装を実現できるものである。
Next, the metal film is used as one electrode, and a metal projection made of Au, Cu, or the like is formed in the opening at a height of 20 to 30 μm by electrolytic plating. Au or Sn plating is formed on the film lead formed by etching the Cu foil to a thickness of 0.3 to 0.6 μm, and the film lead and the metal protrusion are aligned, and pressed and heated with a bonding tool. If the temperature is 5 to 20 g per lead at 300 ° C.), the metal projection on the substrate is transferred and bonded to the film lead side. For example, if the metal projection is formed of Au and the lead is plated with Sn, the lead is joined with an alloy of Au and Sn. Thereafter, the aluminum electrode of the semiconductor element is aligned with the metal projection transferred and bonded to the film lead, and heated and pressed (for example, at 450 ° C., 60 ° per lead).
−100 g), the film lead and the aluminum electrode are joined by an alloy of Au and Al. This technology allows repeated use of a substrate on which metal projections are formed, and unlike conventional methods, does not require complicated processes and expensive equipment, and also handles only good chips, resulting in high yield and low cost. Can be implemented.

発明が解決しようとする問題点 しかしながら、この技術において、前記基板上から金
属突起をフィルムリード側に転写・接合する工程におい
て、フィルムリード側に金属突起が100%転写,接合さ
れない場合があった。このために、めっき液の温度や、
電流密度を変化させ、金属の結晶構造を変え、転写,接
合性を向上させる努力もなされていたが、確実に歩留り
を高める事は困難であった。
Problems to be Solved by the Invention However, in this technique, in the step of transferring and joining the metal projections from the substrate to the film lead side, 100% of the metal projections may not be transferred and joined to the film lead side. For this reason, the temperature of the plating solution,
Efforts have been made to change the current density, change the crystal structure of the metal, and improve transfer and bonding properties, but it has been difficult to reliably increase the yield.

本発明は、基板上の金属膜上に選択的に形成した金属
突起のフィルムリードヘの転写,接合性を高めにとする
ものである。
An object of the present invention is to enhance transfer and bonding of metal protrusions selectively formed on a metal film on a substrate to a film lead.

問題点を解決するための手段 本発明は、基板上に形成する金属突起の組成を複数の
硬度を有する層で形成させるものである。
Means for Solving the Problems In the present invention, the composition of metal projections formed on a substrate is formed by a layer having a plurality of hardnesses.

作用 従来の金属突起の形成では単一な硬度を有するが、本
発明の如く複数の硬度を有する層から形成されると、硬
度が異なる異によって硬度に比例した応力の層が金属突
起に現われる。この応力の層が発生する事により基板と
金属突起の付着力を弱め、金属突起が基板より容易に剥
れやすくなる。
Effect Although the conventional metal projection has a single hardness, when formed from a layer having a plurality of hardnesses as in the present invention, a layer having a stress proportional to the hardness due to a difference in hardness appears on the metal projection. The generation of this stress layer weakens the adhesive force between the substrate and the metal projection, and makes the metal projection easier to peel off than the substrate.

実施例 元来、電解めっきは金属体により、付着力が高くなる
様に、めっき液の組成,めっき条件が設定される。しか
しながら転写バンプ実装技術でのめっきされた金属突起
はめっきした金属膜から容易に剥離されなければならな
い。本発明は金属膜とめっきされた金属突起を剥離させ
るのに金属突起の内部に硬度の異なる層を設け、これに
より内部応力を発生させ、基板と金属突起の界面の付着
力を低下させる原理を提案するものである。
Example Originally, in electroplating, the composition of the plating solution and the plating conditions are set so as to increase the adhesive force depending on the metal body. However, plated metal protrusions in the transfer bump mounting technique must be easily peeled from the plated metal film. The present invention is based on the principle that a layer having a different hardness is provided inside the metal projection to peel off the metal film and the plated metal projection, thereby generating internal stress and reducing the adhesive force at the interface between the substrate and the metal projection. It is a suggestion.

転写バンプ用の基板1は、第1図に示すごとくガラス
もしくはセラミック等の絶縁基板2上にPt,Pd,ITO等の
金属膜3を形成し、この上に半導体素子の電極に対応し
た位置に開孔4を有する絶縁膜5が設けられている。絶
縁膜5はSiO2,Si3N4,耐熱樹脂等で形成される。
As shown in FIG. 1, a transfer bump substrate 1 is formed by forming a metal film 3 such as Pt, Pd, or ITO on an insulating substrate 2 such as glass or ceramic, and forming a metal film 3 on the insulating film 2 at a position corresponding to an electrode of a semiconductor element. An insulating film 5 having an opening 4 is provided. The insulating film 5 is formed of SiO 2 , Si 3 N 4 , heat-resistant resin or the like.

次に電解めっき法によって、前記基板1上の開孔部4
に本発明の金属突起を形成する方法についてのべる。第
2図においてめっき層10にはAuめっき液(商品名:ニュ
ートロネクス210)11が満され、前記めっき槽10を囲む
加温槽12で、めっき液11は40〜70℃の間の任意の温度に
保たれる。基板1と陽極板13間に電流14を流せば、基板
1の開孔4にAuの突起が形成されるものである。めっき
液の規定の電流密度が、例えば0.04mA/mm2であり、金属
突起の高さは30μm形成する場合、先ず1層15の20μm
の厚さまでは規定の電流密度0.04mA/mm2で形成し、残り
の2層16の10μmを規定の電流密度の2〜5倍の電流密
度0.08〜0.2mA/mm2で形成すれば、第3図の如く電流密
度の異なる状態で形成された層が2層形成される(第3
図)。すなわち規定の電流密度で形成した層15は硬度が
50〜70Hvで層内部の応力も小さい。しかし、規定の電流
密度以上で形成された層16は100Hv前後の硬度を有し層
内部の応力も大きい。このように異なる硬度もしくは応
力の層が同一突起内に存在すると互いの応力が作用し、
バイメタル的に極わずかな外部の力により基板1から金
属突起は容易に剥離されるものである。第3図の2層1
5,16の厚さは10μmに限定するものではなく、剥離性の
容易さから決めるもので2〜20μmの範囲であっても良
い。同様に2層目16のめっき時の電流密度も同様に決定
される。
Next, the opening 4 on the substrate 1 is formed by electrolytic plating.
The method for forming the metal projection of the present invention will be described below. In FIG. 2, the plating layer 10 is filled with an Au plating solution (product name: Neutronex 210) 11, and in the heating tank 12 surrounding the plating tank 10, the plating solution 11 may be any temperature between 40 and 70 ° C. Kept at temperature. When an electric current 14 flows between the substrate 1 and the anode plate 13, a projection of Au is formed in the opening 4 of the substrate 1. When the specified current density of the plating solution is, for example, 0.04 mA / mm 2 and the height of the metal projections is 30 μm,
If the current density is 0.04 mA / mm 2 , the remaining two layers 16 are formed at a current density of 0.08 to 0.2 mA / mm 2, which is 2 to 5 times the specified current density. As shown in FIG. 3, two layers having different current densities are formed (third layer).
Figure). That is, the hardness of the layer 15 formed at the specified current density is
The stress inside the layer is small at 50 to 70 Hv. However, the layer 16 formed at a specified current density or higher has a hardness of about 100 Hv and a large internal stress. When layers of different hardness or stress are present in the same protrusion, mutual stress acts,
The metal projection is easily separated from the substrate 1 by a very small external force in a bimetallic manner. Double layer 1 in Fig. 3
The thickness of the layers 5 and 16 is not limited to 10 μm, but may be in the range of 2 to 20 μm, which is determined from the ease of peeling. Similarly, the current density at the time of plating the second layer 16 is determined in the same manner.

他の実施例として、第3図の構成において、第1層目
15を規定の電流密度より高くした電流値でめっき処理
し、第2層目16を規定の電流密度で形成しても良い。こ
の場合も、第1層目と第2層目の厚さの比は、基板から
の金属突起の剥離性の容易さによって決められるもので
ある。
As another embodiment, in the configuration of FIG.
The second layer 16 may be formed at a specified current density by plating the layer 15 at a current value higher than the specified current density. Also in this case, the ratio of the thickness of the first layer to the thickness of the second layer is determined by the ease of detachment of the metal projection from the substrate.

第4図において、他の実施例をのべる。第4図は既に
めっき処理され金属突起20が形成された状態であるが、
この金属突起2は電流密度を3段階に変化させ、硬度の
異なる層を順次に三層形成したものである。第1層17と
第3層19は規定電流密度で形成し、第2層18は規定電流
密度より高くして順次形成される。あるいは第1層17と
第3層19が規定電流密度より高くめっき処理され、第2
層18が規定電流密度で形成される構成であっても良い。
あるいはまた、第1,第2,第3の層が各々異なる硬度で形
成されても良いものである。
FIG. 4 shows another embodiment. FIG. 4 shows a state in which the metal projections 20 have been formed by plating.
The metal protrusions 2 are formed by changing the current density in three stages and sequentially forming three layers having different hardnesses. The first layer 17 and the third layer 19 are formed with a specified current density, and the second layer 18 is formed sequentially with a higher specified current density. Alternatively, the first layer 17 and the third layer 19 are plated at a higher current density than the specified current density.
A configuration in which the layer 18 is formed at a specified current density may be employed.
Alternatively, the first, second, and third layers may be formed with different hardnesses.

発明の効果 以上のように本発明によれば、基板上の金属突起が同
一材料で、硬度の異なる複数の層で構成されるため、こ
の金属突起内部に発生する応力によって容易に基板から
金属突起を剥離する事ができ、転写,接合率の高い、転
写バンプ用金属突起を得ることができる。
Effect of the Invention As described above, according to the present invention, since the metal projections on the substrate are formed of a plurality of layers of the same material and different hardness, the metal projections can be easily removed from the substrate by the stress generated inside the metal projections. Can be peeled off, and a metal bump for a transfer bump having a high transfer and bonding ratio can be obtained.

【図面の簡単な説明】[Brief description of the drawings]

第1図は本発明の一実施例における転写バンプ用金属突
起の形成に用いる転写バンプ用基板の断面図、第2図は
同めっき槽の構成を示す断面図、第3図,第4図は本発
明の一実施例における金属突起の構成を示す断面図であ
る。 1……転写バンプ用基板、2……絶縁基板、3……金属
膜、4……開孔、5……絶縁膜、15〜19……硬度の異な
るめっき槽。
FIG. 1 is a cross-sectional view of a transfer bump substrate used to form a transfer bump metal projection in one embodiment of the present invention, FIG. 2 is a cross-sectional view showing the structure of the plating tank, and FIGS. FIG. 3 is a cross-sectional view illustrating a configuration of a metal protrusion according to one embodiment of the present invention. DESCRIPTION OF SYMBOLS 1 ... Transfer bump board, 2 ... Insulating substrate, 3 ... Metal film, 4 ... Opening, 5 ... Insulating film, 15-19 ... Plating tanks with different hardness.

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】導電層上に選択的に形成されるとともに同
一材料でかつ複数の硬度を有する層で形成されてなる転
写バンプ用金属突起。
A metal bump for a transfer bump selectively formed on a conductive layer and formed of a layer having the same material and a plurality of hardnesses.
【請求項2】導電層面側の層と最外層のうちの少なくと
も一方の硬度が他の層よりも高い特許請求の範囲第1項
記載の転写バンプ用金属突起。
2. The metal bump for a transfer bump according to claim 1, wherein the hardness of at least one of the layer on the conductive layer surface side and the outermost layer is higher than that of the other layers.
JP7469987A 1987-03-27 1987-03-27 Metal bump for transfer bump Expired - Lifetime JP2600669B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7469987A JP2600669B2 (en) 1987-03-27 1987-03-27 Metal bump for transfer bump

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7469987A JP2600669B2 (en) 1987-03-27 1987-03-27 Metal bump for transfer bump

Publications (2)

Publication Number Publication Date
JPS63240048A JPS63240048A (en) 1988-10-05
JP2600669B2 true JP2600669B2 (en) 1997-04-16

Family

ID=13554733

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7469987A Expired - Lifetime JP2600669B2 (en) 1987-03-27 1987-03-27 Metal bump for transfer bump

Country Status (1)

Country Link
JP (1) JP2600669B2 (en)

Also Published As

Publication number Publication date
JPS63240048A (en) 1988-10-05

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