JPH0510365Y2 - - Google Patents

Description

[Detailed description of the invention] (a) Industrial application field This invention relates to a structure for connecting lead electrodes to an IC in a chip state.

(b) Conventional technology In recent years, with the development of electronic component mounting technology, multi-pin ICs such as thermal heads and large LCD displays have become available.
Devices equipped with large numbers of LSIs have been put into practical use, but as the mounting density of electronic components increases, the trend is toward wireless bonding without packaging ICs and other components.

Methods for high-density multi-chip mounting include the TAB method, which forms bumps on the IC chip side, the flip-chip method, the beam lead method, which forms beam leads in advance on the IC chip side, and the mounting method, which does not use bumps or leads. There is a pedestal method in which a pedestal is formed in the wiring pattern on the circuit board side.

However, in the method of forming bumps and beam leads on the IC chip side, in the sliced state, there is a vapor deposition process to form a multilayer metal film, a photolithography process to form a pattern with photosensitive resin, and a plating process to form the bumps. Bumps and beam leads are formed through various processes such as an etching process to remove unnecessary multilayer metal films, and this requires expensive manufacturing equipment. There were problems such as a decline in the yield of IC chips. Also,
Even in the pedestal method, pedestals must be formed on each of the numerous wiring patterns on the circuit board by etching, plating, etc., making it difficult to improve the yield of circuit boards.

As a technology to solve these problems, the same applicant has developed a so-called transfer lead mounting technology and has already filed a patent application (Japanese Patent Laid-Open No. 63-34935). This is done by forming bumps together with lead electrodes on a lead forming substrate, thermo-compressing an IC chip onto the bumps, and peeling the IC chip from the lead forming substrate. It is then mounted on the target circuit board.

(c) Problems to be solved by the invention When mounting an IC chip on a circuit board using the transfer lead mounting technology of the invention described above, certain conditions are required to ensure reliability, as described below. It has been found.

FIGS. 1A and 1B are a front sectional view and a side sectional view showing the state of lead electrodes and bumps formed on a lead forming substrate. Here, reference numeral 11 denotes a lead forming substrate, on the surface of which a lead electrode 15 is formed, and furthermore, bumps 19 are formed at predetermined locations on the top thereof by electroplating with Au.

By thermocompression bonding the electrodes of the IC to these bumps, the electrodes of the IC and the lead electrodes are connected via the bumps. The state is shown in FIG. A is a front sectional view, and B is a side sectional view. Here, 17 is an IC, and 17a is its electrode. When the bump 19 and the lead electrode 15 have the same hardness,
As shown in the figure, the ends of the lead electrodes 15 in contact with the bumps 19 are also plastically deformed together with the bumps 19 during thermocompression bonding. As a result, not only is the energy of the bonding load wasted, but the thickness of the lead electrode becomes locally thinner, resulting in a lower overall breaking strength.

The purpose of this invention is to make it possible to obtain the necessary bonding strength with a low load when thermocompression bonding the lead electrodes formed on the lead forming substrate and the IC chip via bumps, and to An object of the present invention is to provide an IC lead connection structure that can prevent a decrease in the breaking strength of lead electrodes by suppressing plastic deformation.

(d) Means for solving the problem This idea forms bumps together with lead electrodes on a lead forming substrate, and then attaches an IC to the bump portion.
A lead connection structure for an IC constructed by thermocompression bonding of chips is characterized in that the hardness of the lead electrodes is higher than the hardness of the bumps.

(e) Effect In the IC lead connection structure of this invention, the hardness of the lead electrodes formed on the lead forming substrate is made higher than the hardness of the bumps, so that most of the bonding load during thermocompression bonding is caused by the plastic deformation of the bumps. Therefore, it is possible to bond the IC electrode and the lead electrode with the necessary strength with a low load. Furthermore, since the plastic deformation of the lead electrode is extremely reduced, there is no partial thinning of the lead electrode, and the breaking strength of the lead electrode does not decrease.

(f) Example The steps for obtaining the lead connection structure of an IC according to this invention are shown in FIGS. 3A to 3G.

First, as shown in FIG. 3A, a transparent conductive film 14 made of ITO in which Sn is doped in In oxide is deposited over the front surface of the glass plate 13 to form the lead forming substrate 11. Here, the sheet resistance of the ITO film 14 is set to 5Ω or less in order to facilitate the formation of a plating layer in the next step.

A photoresist film is applied to the surface of the lead forming substrate 11 as shown in B, and patterned by photolithography to form a plating mask 16. Next, as shown in C, the openings of the mask were electroplated with Au to a thickness of approx.
A lead electrode 15 of 30 μm is formed. At that time, the current density, the bath temperature of the plating tank, and the stirring speed were controlled to obtain a Vickers hardness of the Au plating film of Hv = 60 to 90.
shall be. Specifically, a harder Au plating film is obtained by increasing the current density, bath temperature, and stirring speed compared to the plating conditions in the bump plating step described below. In addition, Hv=
If it exceeds 90, it will be too hard and cracks will easily occur during thermocompression bonding, so care must be taken.

Thereafter, as shown in D, a photoresist film is applied to the entire surface and patterned by photolithography to form a plating mask 18. Subsequently, as shown in E, electroplating with Au is performed again to form bumps 19 with a height of about 30 μm.
At this time, the current density, bath temperature of the plating bath, and stirring speed are controlled to achieve a hardness similar to that of bulk Au.
Bits hardness Hv = 40 to 50.

Thereafter, as shown in F, after removing the resist films 16 and 18, as shown in G, the IC 17 is removed.
The IC 17 is placed on the lead electrode 15 so that the electrode contacts the bump 19. Further, by heating and pressurizing both of them, the lead electrode 15 is connected to the electrode of the IC 17 via the bump 19. This makes the IC 17 an IC with lead electrodes.

The state near the bump formation in the steps shown in FIGS. 3F and 3G is shown in FIGS. 1 and 2. In both figures, A is a front sectional view and B is a side sectional view. Here, 11 is a lead forming substrate, 17 is an IC,
17a is an electrode (bonding pad) of the IC. In this way, the hardness of the lead electrode 15 is changed to bump 1.
By setting the hardness higher than No. 9, when the IC 17 is heated and pressurized, the bumps 19 are mainly deformed plastically, and the lead electrodes 15 are hardly deformed.

After constructing the leaded IC chip as described above, the lead electrodes are peeled together with the IC chip from the lead forming substrate and connected to a target circuit board. FIG. 4 is a sectional view showing the connection state. In the figure, 12 is a circuit board, and a wiring pattern 20 made of Cu foil is placed at a predetermined location on the top surface of the circuit board.
is formed, and an Au plating film 20a is formed at the connection location. IC1 with lead electrode
0 lead electrode 15 and plating film 20a are approximately 500 mm
Heat to ℃ and perform thermocompression bonding.

Although the plating conditions were controlled in the example to increase the hardness of the lead electrode, the hardness of the lead electrode can also be increased by forming a Ni plating film on the surface of the Au lead electrode. It is also possible to form the entire lead electrode with a Cu plating film.

(g) Effects of the invention As described above, according to this invention, by making the lead electrodes formed on the lead forming substrate harder than the bumps, only the bumps are plastically deformed under a low load when an IC is thermocompression bonded to the lead electrodes. In order to
Necessary bonding strength can be reliably obtained. In addition, because the lead electrode has extremely little plastic deformation,
The breaking strength of the lead electrode does not decrease. As a result, the reliability of the connection between the lead electrode and the IC chip is improved, and the overall reliability and yield of the circuit board on which the lead electrode-equipped IC is mounted can be improved.

[Brief explanation of the drawing]

Figures 1A and B are cross-sectional views showing the state of lead electrodes and bumps formed on a lead forming substrate, and Figures 2A and B are ICs according to an embodiment of this invention.
3A to 3G are diagrams showing each step of obtaining the lead connection structure of the IC in the example, and FIG. 4 is a cross section showing the leaded IC mounted on the circuit board. It is a diagram. Figure 5A,
B is a sectional view showing a conventional IC lead connection structure. 10...IC with lead electrode, 11...Substrate for lead formation, 15...Lead electrode, 17...IC,
17a...IC electrode, 19...bump.

Claims (1)

[Claim for Utility Model Registration] In an IC lead connection structure constructed by forming bumps together with lead electrodes on a lead forming substrate and thermocompression bonding an IC chip to the bump portions, the hardness of the lead electrodes is determined by determining the hardness of the bumps. IC lead connection structure characterized by higher hardness.