JP2596606B2 - Resin-sealed semiconductor device and method of manufacturing the same - Google Patents
Resin-sealed semiconductor device and method of manufacturing the sameInfo
- Publication number
- JP2596606B2 JP2596606B2 JP1015037A JP1503789A JP2596606B2 JP 2596606 B2 JP2596606 B2 JP 2596606B2 JP 1015037 A JP1015037 A JP 1015037A JP 1503789 A JP1503789 A JP 1503789A JP 2596606 B2 JP2596606 B2 JP 2596606B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- resin
- lead terminal
- semiconductor device
- bent portion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
【発明の詳細な説明】 （産業上の利用分野） 本発明は、樹脂封止型半導体装置及びその製造方法に
関する。Description: TECHNICAL FIELD The present invention relates to a resin-sealed semiconductor device and a method of manufacturing the same.
（従来の技術） 近年、ICカードやメモリカードの発達につれ、それら
のカードの中に搭載されるICパッケージの薄形化が必要
となってきている。(Prior Art) In recent years, with the development of IC cards and memory cards, it has become necessary to make IC packages mounted in those cards thinner.
このようなカードの中に搭載される半導体装置として
は、例えば特開昭59−175753号に示されるものがある。As a semiconductor device mounted in such a card, for example, there is one disclosed in Japanese Patent Application Laid-Open No. Sho 59-175753.
第６図はかかる第１の先行技術を示す半導体装置の製
造工程断面図である。FIG. 6 is a sectional view showing a manufacturing process of the semiconductor device according to the first prior art.
この図に示すように、対向するリードフレーム1,1間
に耐熱性合成樹脂からなる絶縁性のフィルム２を設け
〔第６図（ａ）参照〕、このフィルム２上に半導体素子
４を導電性ペースト５によりマウントし、半導体素子４
とその回りに配設されたリードフレーム１との間をワイ
ヤ３により配設した〔第６図（ｂ）参照〕後、モールド
樹脂６により封止するようになっている〔第６図（ｃ）
参照〕。As shown in this figure, an insulating film 2 made of a heat-resistant synthetic resin is provided between opposing lead frames 1 and 1 (see FIG. 6 (a)). The semiconductor element 4 is mounted with the paste 5.
After the wire 3 is disposed between the lead frame 1 and the lead frame 1 disposed therearound [see FIG. 6 (b)], it is sealed with the mold resin 6 [FIG. 6 (c)]. )
reference〕.
ここで、絶縁性フィルム２は非常に薄いため、第６図
（ｃ）に示すように、非常に薄いパッケージを提供する
ことができる。Here, since the insulating film 2 is very thin, a very thin package can be provided as shown in FIG. 6 (c).
また、この種の半導体装置としては、例えば特開昭61
−141162号に示すように、半導体素子をマウントすべき
ダイパッドを無くしたものも提供されるようになってき
ている。As this type of semiconductor device, for example, Japanese Patent Application Laid-Open
As shown in JP-A-141162, there has been provided a device without a die pad on which a semiconductor element is mounted.
第７図はかかる第２の先行技術を示す半導体装置の製
造工程断面図である。FIG. 7 is a sectional view showing a manufacturing process of a semiconductor device according to the second prior art.
ここでは、半導体素子４をボンディング装置７に取り
付けられている真空吸着器８に固定した後、ワイヤボン
ディングを行い〔第７図（ａ）参照〕、その後、半導体
素子４をワイヤ３で保持した状態でモールド樹脂６によ
る樹脂封止を行う〔第７図（ｂ）参照〕。この装置には
半導体素子４をマウントすべきダイパッドがないため、
薄いパッケージを提供することができる。Here, after the semiconductor element 4 is fixed to the vacuum suction device 8 attached to the bonding apparatus 7, wire bonding is performed (see FIG. 7 (a)), and then the semiconductor element 4 is held by the wire 3. (See FIG. 7 (b)). Since there is no die pad to mount the semiconductor element 4 on this device,
A thin package can be provided.
更に、この種の半導体装置としては、例えば特開昭62
−219643号に示すように、半導体素子をマウントすべき
ダイパッドを無くし、樹脂により仮固定を行った後に樹
脂封止するようにしたものも提供されるようになってき
ている。Further, as this type of semiconductor device, for example, Japanese Patent Application Laid-Open
As shown in JP-A-219643, there has been provided a type in which a die pad on which a semiconductor element is mounted is eliminated, and the semiconductor element is temporarily fixed with a resin and then sealed with a resin.
第８図はかかる第３の先行技術を示す半導体装置の製
造工程断面図である。FIG. 8 is a cross-sectional view showing a manufacturing process of a semiconductor device according to the third prior art.
リードフレーム１はテーブル９にセットされ、半導体
素子４は昇降制御可能な支持部10にのせられ、半導体素
子４の表面はリードフレーム１の上面と同一高さとなる
ように動かされ、ワイヤ３によりワイヤボンディングさ
れる。その後、レンジポッティング等の仮固定樹脂11に
よって、半導体素子４、ワイヤ３、リードフレーム１内
端を仮固定して一体化する。その後、封止樹脂によりモ
ールド樹脂封止される。この装置も同様にダイパッドが
ないため、薄いパッケージを提供することができる。The lead frame 1 is set on a table 9, the semiconductor element 4 is placed on a support 10 that can be moved up and down, and the surface of the semiconductor element 4 is moved so as to be flush with the upper surface of the lead frame 1. Bonded. Thereafter, the semiconductor element 4, the wire 3, and the inner end of the lead frame 1 are temporarily fixed by a temporary fixing resin 11 such as a range potting and integrated. Thereafter, molding resin sealing is performed with a sealing resin. This device also has no die pad and can provide a thin package.
（発明が解決しようとする課題） しかしながら、前記した第１先行技術としての半導体
装置においては、第６図（ｂ）に示すように、リードフ
レーム１の厚み（0.15mm前後）と半導体素子４の厚み
（0.35〜0.5mm）とが相違しているため、ワイヤ３が半
導体素子４のコーナに触れるというエッヂショートが生
じる。(Problems to be Solved by the Invention) However, in the semiconductor device as the first prior art, as shown in FIG. 6B, the thickness of the lead frame 1 (about 0.15 mm) and the thickness of the semiconductor element 4 Since the thickness is different from 0.35 to 0.5 mm, an edge short occurs in which the wire 3 touches a corner of the semiconductor element 4.
また、前記第２先行技術としての半導体装置において
は、半導体素子４の固定がワイヤ３のみなので、第７図
（ｂ）に示すように、モールド時に半導体素子４の位置
がずれて傾き、製品に支障を来す。Further, in the semiconductor device as the second prior art, since the semiconductor element 4 is fixed only by the wire 3, the semiconductor element 4 is displaced and tilted at the time of molding as shown in FIG. Cause trouble.
また、前記第３先行技術としての半導体装置において
は、仮固定樹脂が半導体素子４の表面に盛られるため、
第８図（ｂ）に示すように、パッケージを極度に薄くす
るには不都合である。というのは、仮固定樹脂11がモー
ルド時に盛り上がるため、その上部に薄く樹脂を充填す
ることが困難になり、薄形パッケージの形成が難しくな
る。Further, in the semiconductor device as the third prior art, since the temporary fixing resin is put on the surface of the semiconductor element 4,
As shown in FIG. 8B, it is inconvenient to make the package extremely thin. This is because the temporary fixing resin 11 swells at the time of molding, so that it is difficult to fill the upper portion with a thin resin, and it is difficult to form a thin package.
本発明は、上記問題点を除去し、薄形化が可能な樹脂
封止型半導体装置及びその製造方法を提供することを目
的とする。SUMMARY OF THE INVENTION An object of the present invention is to provide a resin-encapsulated semiconductor device capable of eliminating the above-mentioned problems and capable of being made thinner, and a method for manufacturing the same.
（課題を解決するための手段） 本発明は、上記目的を達成するために、 （１）樹脂封止型半導体装置において、直線部と前記直
線部に連続し、かつ前記直線部に対して折曲して形成さ
れた折曲部とを有するリード端子と、前記折曲部と対向
して配置された側面を有する半導体素子と、前記折曲部
と前記半導体素子の側面との間に形成され、かつ前記折
曲部と前記半導体素子の側面とに固着する仮固定材と、
前記リード端子と前記半導体素子とを電気的に接続する
配線と、前記半導体素子と前記折曲部との全体を覆うよ
うに形成されたモールド樹脂とを含むようにしたもので
ある。(Means for Solving the Problems) In order to achieve the above object, the present invention provides: (1) In a resin-encapsulated semiconductor device, a linear portion is continuous with the linear portion, and is folded with respect to the linear portion. A lead terminal having a bent portion formed by bending, a semiconductor element having a side surface arranged opposite to the bent portion, and a semiconductor device formed between the bent portion and a side surface of the semiconductor element. And a temporary fixing member fixed to the bent portion and a side surface of the semiconductor element;
The semiconductor device includes wiring for electrically connecting the lead terminal and the semiconductor element, and a mold resin formed so as to cover the whole of the semiconductor element and the bent portion.
（２）請求項１記載の樹脂封止型半導体装置において、
前記リード端子における前記折曲部は前記直線部に対し
て段違いに形成され、かつ前記半導体素子側に延在する
延在部と、前記延在部と前記直線部とを接続する接続部
とを設けるようにしたものである。(2) The resin-encapsulated semiconductor device according to claim 1,
The bent portion of the lead terminal is formed stepwise with respect to the linear portion, and includes an extending portion extending toward the semiconductor element, and a connecting portion connecting the extending portion and the linear portion. It is provided.
（３）樹脂封止型半導体装置の製造方法において、直線
部と前記直線部に連続し、かつ前記直線部に対して折曲
して形成された折曲部とを有するリード端子を準備する
工程と、前記折曲部と半導体素子の側面とを仮固定材に
より固着する工程と、前記リード端子と前記半導体素子
とを電気的に接続する工程と、前記半導体素子と前記折
曲部との全体を覆うように形成されたモールド樹脂封止
をする工程とを施すようにしたものである。(3) In the method for manufacturing a resin-encapsulated semiconductor device, a step of preparing a lead terminal having a straight portion and a bent portion continuous with the straight portion and formed by bending the straight portion. Fixing the bent portion and the side surface of the semiconductor element with a temporary fixing material, electrically connecting the lead terminal and the semiconductor element, and forming the entirety of the semiconductor element and the bent portion. And a step of sealing the molded resin formed so as to cover the substrate.
（４）請求項３記載の樹脂封止型半導体装置の製造方法
において、前記リード端子を準備する工程は、前記直線
部に対して段違い、かつ前記半導体素子側に延在する延
在部を前記リード端子に形成する工程と、前記延在部と
前記直線部とを接続する接続部とを前記リード端子に形
成する工程を施すようにしたものである。(4) In the method of manufacturing a resin-encapsulated semiconductor device according to claim 3, wherein the step of preparing the lead terminal includes the step of extending the step extending from the linear portion toward the semiconductor element. A step of forming the lead terminal and a step of forming a connecting portion for connecting the extending portion and the linear portion to the lead terminal are performed.
（作用） 本発明によれば、上記のように、半導体素子の表面と
リードの表面を同じ高さで固定し、また、その固定は半
導体素子の側面で行うようにしたので、半導体素子は傾
くことなく、安定した超薄形のパッケージを得ることが
できる。(Operation) According to the present invention, as described above, the surface of the semiconductor element and the surface of the lead are fixed at the same height, and the fixing is performed on the side surface of the semiconductor element. Without this, a stable ultra-thin package can be obtained.
（実施例） 以下、本発明の実施例について図面を参照しながら詳
細に説明する。(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings.
第１図は本発明の実施例を示す半導体素子の仮固定状
態を示す平面図、第２図は第１図のＡ−Ａ線断面図、第
３図は第１図のＢ−Ｂ線断面図、第４図はその半導体素
子のモールド後のＡ−Ａ線断面図、第５図はその半導体
素子のモールド後のＢ−Ｂ線断面図である。FIG. 1 is a plan view showing a temporarily fixed state of a semiconductor device showing an embodiment of the present invention, FIG. 2 is a sectional view taken along line AA of FIG. 1, and FIG. 3 is a sectional view taken along line BB of FIG. FIG. 4 is a sectional view taken along line AA of the semiconductor element after molding, and FIG. 5 is a sectional view taken along line BB of the semiconductor element after molding.
まず、第２図及び第３図に示すように、ダイパッド
（タブ）がなく、かつ仮固定樹脂が入るようにダム22が
形成されたリードフレーム23が用意される。このリード
フレーム23の表面の高さは、半導体素子４の表面と同じ
高さになり、ワイヤボンディングによるエッヂショート
が防げるようにセットされる。そして、リードフレーム
23はボンディング装置20上に載置され、その中央部に真
空吸着器21により半導体素子４を配置し、ポッティング
樹脂24によってリードフレーム23のダム22と半導体素子
４の側面との仮固定を行う。First, as shown in FIGS. 2 and 3, there is prepared a lead frame 23 having no die pad (tab) and having a dam 22 formed therein so that a temporarily fixed resin can enter. The height of the surface of the lead frame 23 is the same as the surface of the semiconductor element 4, and is set so as to prevent edge shorts due to wire bonding. And lead frame
The semiconductor device 4 is placed on a bonding device 20 by a vacuum suction device 21 at the center thereof, and the dam 22 of the lead frame 23 and the side surface of the semiconductor device 4 are temporarily fixed by a potting resin 24.
このようにして、半導体素子４の側面を仮固定した
後、半導体素子４の高さと同一のリードフレーム23に低
いループのワイヤボンディングを行う。その後、このリ
ードフレーム23はトランスファーモールド装置によって
モールドされ、半導体素子４、ワイヤ３、リードフレー
ム23内端部分は樹脂封止される。After temporarily fixing the side surface of the semiconductor element 4 in this manner, wire bonding of a low loop is performed on the lead frame 23 having the same height as the semiconductor element 4. Thereafter, the lead frame 23 is molded by a transfer molding apparatus, and the semiconductor element 4, the wires 3, and the inner end of the lead frame 23 are sealed with resin.
なお、上記実施例においては、半導体素子４の四側面
をポッティング樹脂24により仮固定するものを示した
が、両側面、即ち二側面のみを同様に仮固定するように
してもよい。また、リードフレーム23を半導体素子４の
全ての側面に配置し、ワイヤ３による配線を行うように
してもよい。In the above embodiment, the four side surfaces of the semiconductor element 4 are temporarily fixed by the potting resin 24. However, both side surfaces, that is, only the two side surfaces may be temporarily fixed in the same manner. Further, the lead frame 23 may be arranged on all side surfaces of the semiconductor element 4 and wiring may be performed by the wire 3.
また、本発明は上記実施例に限定されるものではな
く、本発明の趣旨に基づき種々の変形が可能であり、そ
れらを本発明の範囲から排除するものではない。Further, the present invention is not limited to the above-described embodiment, and various modifications are possible based on the gist of the present invention, and they are not excluded from the scope of the present invention.
（発明の効果） 以上、詳細に説明したように、本発明によれば、半導
体素子の表面とリードフレームの表面を同じ高さで固定
し、また、その仮固定は半導体素子の側面で行うように
したので、半導体素子は傾くことなく、安定した超薄形
のパッケージを得ることができる。(Effects of the Invention) As described above in detail, according to the present invention, the surface of the semiconductor element and the surface of the lead frame are fixed at the same height, and the temporary fixing is performed on the side surface of the semiconductor element. Therefore, a stable ultra-thin package can be obtained without tilting the semiconductor element.
第１図は本発明の実施例を示す半導体素子の仮固定状態
を示す平面図、第２図は第１図のＡ−Ａ線断面図、第３
図は第１図のＢ−Ｂ線断面図、第４図はその半導体素子
のモールド後のＡ−Ａ線断面図、第５図はその半導体素
子のモールド後のＢ−Ｂ線断面図、第６図は第１の先行
技術を示す半導体装置の製造工程断面図、第７図は第２
の先行技術を示す半導体装置の製造工程断面図、第８図
は第３の先行技術を示す半導体装置の製造工程断面図で
ある。 ３……ワイヤ、４……半導体素子、20……ボンディング
装置、21……真空吸着器、22……ダム、23……リードフ
レーム、24……ポッティング樹脂。FIG. 1 is a plan view showing a temporarily fixed state of a semiconductor device showing an embodiment of the present invention, FIG. 2 is a sectional view taken along line AA of FIG.
FIG. 4 is a sectional view taken along the line BB of FIG. 1, FIG. 4 is a sectional view taken along the line AA of the semiconductor device after molding, FIG. FIG. 6 is a sectional view of a manufacturing process of a semiconductor device showing the first prior art, and FIG.
FIG. 8 is a sectional view of a manufacturing process of a semiconductor device showing a third prior art, and FIG. 8 is a sectional view of a manufacturing process of a semiconductor device showing a third prior art. 3 ... wire, 4 ... semiconductor element, 20 ... bonding device, 21 ... vacuum suction device, 22 ... dam, 23 ... lead frame, 24 ... potting resin.
Claims (4)
線部に対して折曲して形成された折曲部とを有するリー
ド端子と、 前記折曲部と対向して配置された側面を有する半導体素
子と、 前記折曲部と前記半導体素子の側面との間に形成され、
かつ前記折曲部と前記半導体素子の側面とに固着する仮
固定材と、 前記リード端子と前記半導体素子とを電気的に接続する
配線と、 前記半導体素子と前記折曲部との全体を覆うように形成
されたモールド樹脂とを含むことを特徴とする樹脂封止
型半導体装置。1. A lead terminal having a straight portion, a bent portion continuous with the straight portion, and formed by bending the straight portion, and a lead terminal disposed opposite to the bent portion. A semiconductor element having a side surface, formed between the bent portion and a side surface of the semiconductor element,
A temporary fixing member fixed to the bent portion and a side surface of the semiconductor element; a wiring for electrically connecting the lead terminal to the semiconductor element; and covering the entirety of the semiconductor element and the bent portion. And a mold resin formed as described above.
直線部に対して段違いに形成され、かつ前記半導体素子
側に延在する延在部と、前記延在部と前記直線部とを接
続する接続部とを有することを特徴とする請求項１記載
の樹脂封止型半導体装置。2. The bent portion of the lead terminal is formed stepwise with respect to the linear portion, and connects the extended portion extending toward the semiconductor element and the extended portion and the linear portion. The resin-sealed semiconductor device according to claim 1, further comprising: a connection portion that performs connection.
線部に対して折曲して形成された折曲部とを有するリー
ド端子を準備する工程と、 前記折曲部と半導体素子の側面とを仮固定材により固着
する工程と、 前記リード端子と前記半導体素子とを電気的に接続する
工程と、 前記半導体素子と前記折曲部との全体を覆うように形成
されたモールド樹脂封止をする工程とを有することを特
徴とする樹脂封止型半導体装置の製造方法。3. A step of preparing a lead terminal having a straight portion and a bent portion continuous with the straight portion and formed by bending the straight portion; and the bent portion and the semiconductor element. Fixing the side surface of the semiconductor device with a temporary fixing material, electrically connecting the lead terminal and the semiconductor element, and molding resin formed so as to entirely cover the semiconductor element and the bent portion. A method of manufacturing a resin-encapsulated semiconductor device, comprising the steps of:
線部に対して段違い、かつ前記半導体素子側に延在する
延在部を前記リード端子に形成する工程と、前記延在部
と前記直線部とを接続する接続部とを前記リード端子に
形成する工程を有することを特徴とする請求項３記載の
樹脂封止型半導体装置の製造方法。4. The method according to claim 1, wherein the step of preparing the lead terminal includes the step of forming an extension part which is stepped with respect to the linear part and extends toward the semiconductor element in the lead terminal; 4. The method of manufacturing a resin-encapsulated semiconductor device according to claim 3, further comprising a step of forming a connecting portion for connecting the linear portion to the lead terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1015037A JP2596606B2 (en) | 1989-01-26 | 1989-01-26 | Resin-sealed semiconductor device and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1015037A JP2596606B2 (en) | 1989-01-26 | 1989-01-26 | Resin-sealed semiconductor device and method of manufacturing the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02197151A JPH02197151A (en) | 1990-08-03 |
| JP2596606B2 true JP2596606B2 (en) | 1997-04-02 |
Family
ID=11877637
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1015037A Expired - Fee Related JP2596606B2 (en) | 1989-01-26 | 1989-01-26 | Resin-sealed semiconductor device and method of manufacturing the same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2596606B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2582534B2 (en) * | 1994-08-16 | 1997-02-19 | 九州日本電気株式会社 | Method for manufacturing semiconductor device |
| JP5217291B2 (en) * | 2006-08-04 | 2013-06-19 | 大日本印刷株式会社 | Resin-sealed semiconductor device and manufacturing method thereof, substrate for semiconductor device, and laminated resin-sealed semiconductor device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59181025A (en) * | 1983-03-31 | 1984-10-15 | Toshiba Corp | Semiconductor device |
-
1989
- 1989-01-26 JP JP1015037A patent/JP2596606B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH02197151A (en) | 1990-08-03 |
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