JP2591800B2 - Semiconductor integrated circuit defect detection method and defect detection circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a manufacturing defect mainly present between upper and lower wiring layers of a wiring layer, such as an insulating film defect or a scratch generated during a manufacturing process of a semiconductor integrated circuit. The present invention relates to a defect detection method and a defect detection circuit for a semiconductor integrated circuit, which makes it possible to easily detect a defect and to perform an analysis based on the defect.

(Prior Art) Various defects generated during the manufacturing process of a semiconductor integrated circuit are decreasing due to recent automation and improvement of the manufacturing process, improvement of the manufacturing technology, and the like. However, defects caused by the increase in the size of chips and the degree of integration of integrated circuits still cause a large yield deterioration or a potential failure after completion of a product.

For example, the causes of the various defects are described with reference to FIG. FIG. 5 is a cross-sectional view showing an example of a wiring layer and an insulating film constituting a semiconductor integrated circuit.

On the semiconductor substrate 1, for example, a diffusion layer wiring layer 2, first and second polysilicon wiring layers 3 and 4, and first and second aluminum wiring layers 5 and 6 are formed. 6, an insulating film 7 is formed, and a passivation protective film 8 is formed on the uppermost layer.

In each of these wiring layers 2 to 6, the insulating property of the insulating film 7 that electrically insulates the wiring layers 2 to 6 depends on photolithographic defects, foreign matter residues, overetching, notches, and the like created during the manufacturing process. It is affected by various kinds of defects, and causes short-circuiting and a decrease in dielectric strength. In the assembling process after the wafer process is completed, a short circuit or a leak may occur between wiring layers under the passivation protective film 8 due to mechanical damage from above the passivation protective film 8.

Conventionally, such defects are detected during the manufacturing process,
In order to deal with this, the following methods have been mainly adopted.

(1) Defective products with electrical characteristics generated in actual products are analyzed in detail to identify failure points, and then, if necessary, through chemical treatment such as etching, elemental analysis, etc., and observation with an electron microscope, etc. A method of determining the cause and, as a result, detecting manufacturing defects.

(2) At each stage during the actual product manufacturing process, a visual inspection of the appearance of wafers and chips is carried out, a defective portion is detected as an abnormal appearance, and the cause is determined through the same procedure as (1). How to find out.

(Problems to be Solved by the Invention) However, the above-described method for detecting a defect in a semiconductor integrated circuit has the following problems.

(I) In a method of performing a failure analysis on a product in which an electrical failure has actually occurred, it is difficult to perform a failure analysis on a highly integrated and fine semiconductor integrated circuit in recent years, and it is even difficult to specify a failure location. Even if a failure is found, it is more difficult to identify the cause, and a large number of man-hours are required.

(Ii) In the method of performing a visual appearance inspection of a product, since the circuit pattern of the product is dense and complicated, it cannot be visually observed unless the defect is considerably large. That is, small defects were hardly detectable.

(Iii) It is difficult to quantitatively grasp the distribution, occurrence rate, and the like of a defect in a chip and a wafer, and it has been almost impossible to pursue a cause process. In addition, the conventional method is essentially the inspection of the actual product for damage.

The present invention has the following problems that the prior art has problems in that it is difficult to detect a defect in an analysis of a faulty product, that a small defect cannot be detected in visual inspection, and that the distribution and occurrence rate of defects are quantitative. It is an object of the present invention to provide a method for detecting a defect in a semiconductor integrated circuit and a circuit for detecting a defect which solve the problem that it is difficult to grasp the cause and cannot find the cause.

(Means for Solving the Problems) In order to solve the problems, claim 1 of the present invention.
A plurality of first wirings extending in a first direction;
A plurality of second wirings extending in a second direction substantially orthogonal to the first direction and facing the first wirings with an insulating film interposed therebetween; A plurality of detection unit elements and a plurality of diodes, each of which is arranged corresponding to a three-dimensional intersection with a plurality of second wirings, wherein each of the detection unit elements is connected to the corresponding first wiring. A first conductive layer, and a second conductive layer opposed to the first conductive layer via an insulating film, wherein each of the diodes is connected to the second conductive layer of the corresponding detection unit element. This is performed using a defect detection circuit having a plurality of detection unit elements and a plurality of diodes each having a P-type region connected to a layer and an N-type region connected to the corresponding second wiring. The following measures have been taken in the method of detecting defects in semiconductor integrated circuits.

In the invention of claim 1, by applying a voltage to the plurality of first and second wirings respectively corresponding to the plurality of detection unit elements, the plurality of detection unit elements are brought into an electrically conductive state. Accordingly, a defect related to an insulating film in a region where each of the detection unit elements is formed is detected.

The invention according to claim 2 is a plurality of elements arranged in a matrix, wherein each of the elements includes a detection unit element and a diode, and each of the detection unit elements has a first conductive layer, A first conductive layer and a second conductive layer facing each other with an insulating film interposed therebetween, wherein each of the diodes is a P-type region connected to the second conductive layer of the corresponding detection unit element; A plurality of elements each including an N-type region; and a plurality of first wirings, wherein each of the first wirings is connected to a first conductive layer of the plurality of elements arranged in a column direction. A plurality of first wirings and a plurality of second wirings, wherein each of the second wirings is connected to an N-type region of the plurality of elements arranged in a row direction; In the defect detection method for a semiconductor integrated circuit performed by using the defect detection circuit having It has taken such means.

In the invention according to claim 2, by applying a voltage to the plurality of first and second wirings respectively corresponding to the plurality of detection unit elements, the plurality of detection unit elements are brought into an electrically conductive state. Accordingly, a defect related to an insulating film in a region where each of the detection unit elements is formed is detected.

According to a third aspect of the present invention, in the defect detection circuit formed on the semiconductor substrate, a plurality of elements are arranged in a matrix. Each of the elements includes a detection unit element and a diode. Each of the detection unit elements includes a first conductive layer and a second conductive layer opposed to the first conductive layer via an insulating film. The shortest distance from the semiconductor substrate is composed of the first conductive layer and the second conductive layer different from the shortest distance between the semiconductor substrate, and each diode is a corresponding one of the detection unit elements. A P-type region connected to the second conductive layer and an N-type region.

Further, in the invention according to claim 3, there are a plurality of first wirings, wherein each of the first wirings is connected to a first conductive layer of the plurality of elements arranged in a column direction. First
And a plurality of second wirings, wherein each of the second wirings has a plurality of second wirings connected to N-type regions of the plurality of elements arranged in a row direction. ing.

According to a fourth aspect of the present invention, in a defect detection circuit formed on a semiconductor substrate, a plurality of detection unit elements arranged in a matrix are provided. Each of the detection unit elements includes a first conductive layer formed on the semiconductor substrate and the first conductive layer.
And a second conductive layer formed of a plurality of strip-shaped conductive pieces formed on the insulating film formed on the conductive layer.

Furthermore, in the invention according to claim 4, there are a plurality of first wirings, wherein each of the first wirings is connected to a first conductive layer of the plurality of elements arranged in a column direction. First
And a plurality of second wirings, wherein each of the second wirings has a plurality of second wirings connected to N-type regions of the plurality of elements arranged in a row direction. ing.

(Operation) According to the first to third aspects of the present invention, the diode is connected via the plurality of detection unit elements corresponding to the defective insulating film excluding the detection unit element corresponding to the insulating film at the location to be detected. The function of preventing the formation of an electrical conduction path between the first wiring and the second wiring corresponding to the unit element for detection corresponding to the insulating film at the location to be detected.

According to the fourth aspect of the invention, it is possible to detect a manufacturing defect of the insulating film generated at the edge of the second conductive layer including the plurality of strip-shaped conductive pieces.

(Example) FIG. 6 is a diagram for explaining a technique which is a premise of an example of the present invention, and is a plan view of an entire defect detection circuit used in a defect detection method. FIG. 7 (a),
6 (b) shows a part of the defect detection circuit of FIG. 6, FIG. 6 (a) is a sectional view of a detection unit element, and FIG. 6 (b) is a partial plan view of the defect detection circuit.

In FIG. 7 (a), the detection unit element 11 is for detecting a defect relating to the insulating film between the upper and lower wiring layers shown in FIG. 5, for example. Unit element for detection 11
Is composed of a first conductive layer 13 formed on a semiconductor substrate 12 and a second conductive layer 15 formed on the first conductive layer 13 with an insulating film 14 interposed therebetween. For example, a field oxide film 16 is formed under the first conductive layer 13 and the second conductive layer
For example, a passivation protection film 17 is formed on 15. The detection unit element 11 is formed by focusing on any upper and lower wiring layers of the semiconductor integrated circuit, and has a capacitor-like structure electrically insulated by an insulating film 14.

The plurality of detection unit elements 11 configured as described above are arranged in advance in a matrix on a semiconductor chip as shown in FIG. 7B, and constitute a defect detection circuit 18. That is, in the detection unit elements 11 arranged in the row direction, the respective second conductive layers 15 are connected to the common row electrodes Y1 and Y2, and the detection unit elements 11 arranged in the column direction First
Are connected to the common column electrodes X1 and X2. The detection unit elements 11 thus arranged in a matrix form a defect detection circuit 18 as shown in FIG.

The defect detection circuit 18 having the above configuration is as shown in FIG. 8 when the detection unit element 11 is considered as a capacitor and an electrical equivalent circuit is considered.

In FIG. 8, for example, if the detection unit element 11 located at the intersection of the row electrode Y3 and the column electrode X2 is short-circuited due to a manufacturing defect, only when a bias voltage is applied between the electrodes Y3 and X2 A short-circuit current flows as indicated by arrow A. Thereby, the defect on the semiconductor chip and its position are detected.
In order to detect the defect position and distribution on the wafer, an individual code may be created in each of the defect detection circuits 18 formed on the wafer.

The above-described defect detection circuit 18 focuses on an insulating film between arbitrary wiring layers among a large number of wiring layers existing on a semiconductor chip, for example, a combination between an Al wiring layer and a polysilicon wiring layer, or an Al wiring layer. Various structures such as a combination between layers can be selected. Further, by combining a plurality of structures on the same semiconductor chip, it is possible to detect defects in several insulating films at the same time.

The arrangement and configuration of the defect detection circuit 18 at the wafer level are as follows.
FIG. 9 (a),
It can be roughly classified into two types shown in FIG.

That is, the arrangement and configuration shown in FIG. 9A are for the case where the defect detection circuit 18 is used constantly as a quality monitor of a semiconductor integrated circuit manufacturing process or a manufacturing lot. In place of products and operate as a skip TEG.

The arrangement and configuration shown in FIG. 9 (b) are for arranging the defect detecting circuit 18 for the purpose of analyzing accidents / troubles in the manufacturing process, analyzing the yield, and evaluating the setting / change of the manufacturing conditions. In this case, the defect detection circuit 18 is formed on the entire surface of the wafer 19, and individual codes are formed in the individual defect detection circuits 18, so that even after the semiconductor chips are individually divided in the assembly process, Quantitative analysis of the defect distribution on the wafer 19, the defect occurrence rate, and the like becomes possible.

In the above-described defect detection method, a defect in an insulating film between any wiring layers of interest can be easily detected, and the position, distribution, and the like can be quantitatively analyzed. Further, the same detection and analysis can be performed on a defect of the wiring interlayer insulating film due to mechanical damage in an assembling process after completion of the wafer process. By analyzing the defect information and grasping the characteristics, it is possible to easily pursue the cause process which has been difficult in the past.

FIG. 1 is a plan view of a detection unit element used in a defect detection method according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view taken along line AA of FIG.

This embodiment differs from FIG. 7 in that the semiconductor substrate 12
Of the first and second conductive layers 20 and 21 above, the second conductive layer 2
1 is formed by arranging a number of strip-shaped conductive pieces 21a in parallel.

Even with such a configuration, there are advantages that substantially the same operation and effect as those of FIG. 7 can be obtained, and that detection of a defect generated depending on the edge of the wiring layer can be effectively dealt with. That is, while the method of FIG. 7 is suitable for detecting an insulating film defect generated between upper and lower wiring layers having a relatively large area, this embodiment can cope with a manufacturing defect of the insulating film generated at the edge of the wiring layer. It was done.

In this case, the idea is that the occurrence of an insulating film defect occurring at the wiring edge during patterning of the wiring layer, for example, the occurrence of a void due to over-etching or a defect due to foreign matter residue at the edge is almost proportional to the total edge length. Is to make the edge length as long as possible without changing the external area.

FIG. 3 is a sectional view of a detection unit element used in a defect detection method according to another embodiment of the present invention, and FIG. 4 is an electrical equivalent circuit diagram of a defect detection circuit including the detection unit element. is there.

In this embodiment, an N ⁺ -p diode 22 is incorporated in the detection unit element 11 of FIG. 7 as shown in FIG. 3 and a defect detection circuit 18 as shown in FIG. The unit element 11 is electrically separated.

With such a configuration, in addition to obtaining substantially the same operation and effect as those in FIG. 7, the positions and distributions of a plurality of defects can be accurately detected by electrical separation of the detection unit element 11. It becomes possible. That is, even when a plurality of defects exist on one semiconductor chip,
The position and distribution of each defect can be reliably identified and detected.

The present invention is not limited to the illustrated embodiment, and various modifications are possible, for example, the following modifications.

(A) In FIGS. 2 and 3, the detection unit element 11 is formed on a plane, but this may be a step structure. For example, the first conductive layers 13 and 20 and the second conductive layers 15 and
If a step structure is intentionally formed between 21 or in the insulating film below the first conductive layers 13 and 20, a defect generated depending on the step structure and the step coverage of the insulating film can be detected. .

(B) In FIG. 3, the diode 22 is incorporated in the detection unit element 11 in FIG. 7, but the detection unit element in FIG.
A diode 22 may be incorporated in 11.

(C) The shape of the detection unit element 11, the structure of the diode 22, and the like are not limited to those shown in the figure and can be arbitrarily changed according to the target semiconductor integrated circuit.

(D) In FIGS. 1 and 2, the second conductive layer 21 is formed of the strip-shaped conductive piece 21a, but the first conductive layer 20 may be formed of the strip-shaped conductive piece.

(E) The present invention is applicable to semiconductor integrated circuits of any structure, irrespective of MOS and bipolar structures.

(Effects of the Invention) As described in detail above, according to the first and second aspects of the present invention, insulation is achieved by using a defect detection circuit in which a diode is provided between a detection unit element and a second wiring. Since the defect relating to the film is detected, the defect relating to the insulating film in the region where each unit element for detection is formed (that is, the defect of a plurality of insulating films) can be performed without taking any man-hour or time for the detecting operation. Position) can be accurately detected.

According to the third aspect of the present invention, a diode is provided between the detection unit element and the second wiring in the defect detection circuit. Defect positions of a plurality of insulating films can be accurately detected without man-hours or time.

According to the fourth aspect of the present invention, since the second conductive layer of the detection unit element is constituted by a plurality of strip-shaped conductive pieces, it is possible to detect a manufacturing defect of the insulating film generated at the edge of the second conductive layer. it can.

Therefore, by analyzing the defect information, it is easy to pursue the cause of the defect, which has been difficult in the past, and it is possible to greatly contribute to the improvement of the quality and yield of the semiconductor integrated circuit and the early resolution of the trouble. .

[Brief description of the drawings]

FIG. 1 is a plan view of a detection unit element according to an embodiment of the present invention, FIG. 2 is a sectional view taken along line AA of FIG. 1, and FIG. FIG. 4 is an electrical equivalent circuit diagram of a defect detection circuit composed of the detection unit elements of FIG. 3, FIG. 5 is a cross-sectional view of a wiring layer of a semiconductor integrated circuit, and FIG. FIGS. 7 (a) and 7 (b) show a part of the defect detection circuit of FIG. 6, and FIG. 7 (a) is a sectional view of a detection unit element and FIG. FIG. 8 is a partial plan view of the detection circuit, FIG. 8 is an electrical equivalent circuit diagram of FIG. 7B, and FIGS. 9A and 9B are plan views showing an arrangement of the defect detection circuit on the wafer. is there. 11 ... Detection unit element, 12 ... Semiconductor substrate, 13,20 ...
1st conductive layer, 14... Insulating film, 15, 21... 2nd conductive layer, 18... Defect detection circuit, 21a.
…diode.

Claims (4)

(57) [Claims] A first wiring extending in a first direction; a second wiring extending in a second direction substantially perpendicular to the first direction; A plurality of second wirings facing each other, a plurality of detection unit elements and a plurality of diodes respectively arranged corresponding to a three-dimensional intersection of the plurality of first wirings and the plurality of second wirings. In addition, each of the detection unit elements includes a first conductive layer connected to the corresponding first wiring, and a second conductive layer facing the first conductive layer via an insulating film. The plurality of diodes each having a P-type region connected to the second conductive layer of the corresponding detection unit element and an N-type region connected to the corresponding second wiring. Collection using a defect detection circuit having a plurality of detection unit elements and a plurality of diodes In the method for detecting a defect in a circuit, a voltage is applied to the plurality of first and second wirings respectively corresponding to the plurality of detection unit elements, so that the plurality of detection unit elements are electrically connected. A method for detecting a defect related to an insulating film in a region where each of the detection unit elements is formed. 2. A plurality of devices arranged in a matrix, wherein each of the devices comprises a detecting unit element and a diode, wherein each of the detecting unit elements comprises a first conductive layer and a first conductive layer. , And a second conductive layer facing each other with an insulating film interposed therebetween, wherein each of the diodes has a P-type region connected to the second conductive layer of the corresponding detection unit element;
A plurality of devices each including a mold region; and a plurality of first wires, wherein each of the first wires is connected to a first conductive layer of the plurality of devices arranged in a column direction. A plurality of second wirings, wherein each of the second wirings is connected to an N-type region of the plurality of elements arranged in a row direction. In the defect detection method for a semiconductor integrated circuit performed by using the defect detection circuit having: a voltage applied to the plurality of first and second wirings respectively corresponding to the plurality of detection unit elements. A defect detection method for a semiconductor integrated circuit for detecting a defect relating to an insulating film in a region where each of the detection unit elements is formed, according to an electrical conduction state of the plurality of detection unit elements. 3. A defect detection circuit formed on a semiconductor substrate, comprising: a plurality of elements arranged in a matrix, wherein each of said elements comprises a detection unit element and a diode; The unit element is a first conductive layer, a second conductive layer facing the first conductive layer via an insulating film, and a shortest distance from the semiconductor substrate is equal to the first conductive layer. The second conductive layer, which is different from the shortest distance from the semiconductor substrate, wherein each of the diodes has a P-type region connected to the second conductive layer of the corresponding detection unit element, and an N-type region. And a plurality of first wirings, wherein each of the first wirings is connected to a first conductive layer of the plurality of elements arranged in a column direction. One wiring and a plurality of second wirings, wherein each of the second wirings is arranged in a row direction. Defect detection circuit; and a location has been the second wiring of said plurality being connected to the N-type region of said plurality of elements. 4. A defect detecting circuit formed on a semiconductor substrate, comprising: a plurality of detecting unit elements arranged in a matrix, wherein each of the detecting unit elements is formed on the semiconductor substrate. The plurality of detection unit elements, comprising: a first conductive layer formed on the first conductive layer; and a second conductive layer formed on the insulating film formed on the first conductive layer and including a plurality of strip-shaped conductive pieces. A plurality of first wirings, wherein each of the first wirings is connected to a first conductive layer of the plurality of elements arranged in a column direction; A second wiring, wherein each of the second wirings is connected to an N-type region of the plurality of elements arranged in a row direction; and the plurality of second wirings.