JP2585267B2 - Liquid crystal display - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Application) The present invention relates to a liquid crystal display device.

(Prior Art) In recent years, an active matrix liquid crystal display device using a thin film transistor (TFT) using an amorphous silicon (a-Si) film as a switching element has attracted attention. The reason is that if a TFT array is formed using an amorphous glass substrate and an a-Si film that can be formed at a low temperature, a large-screen, high-definition, high-quality, and inexpensive panel display (flat-type television) can be realized. This is because there is a possibility that it can be realized.

For example, when an inverted staggered TFT structure in which a gate electrode wiring is provided on a glass substrate and an insulating film or an a-Si film is stacked thereon to form a TFT is employed, a gate electrode and an address wiring formed integrally therewith are used. Since the semiconductor thin film and the data wiring are laminated thereon in a limited thickness, the electrode wiring must be thin and have sufficiently small resistance. In the case of stacking, it is necessary to taper the step portion of the lower electrode wiring in order to prevent the upper layer from being broken. Therefore, it is required to have such a property that it has workability for this purpose and that it is not attacked by a cleaning solution such as sulfuric acid or hydrogen peroxide in a subsequent cleaning step. Conventionally, various metal films, such as tantalum and titanium, have been used as gate electrode wiring materials that meet such demands. However, in order to further increase the size of the screen and increase the definition, processing with lower resistance is required. There is a demand for a material having good properties and excellent resistance in subsequent chemical treatment steps. In the case of employing a staggered TFT structure in which drain and source electrode wirings are provided on a substrate, such characteristics are required for the drain and source electrode wiring materials. A similar problem exists in a liquid crystal display device that is not an active matrix type.

In order to make the display pixels of the active matrix type liquid crystal display device as small as possible and to enlarge the screen, TF
It is necessary to make the signal line to T, that is, the gate wiring and the data wiring thin and long. In addition, in order to eliminate waveform distortion due to delay of the pulse signal, the resistance must be made sufficiently small.

When realizing a high-definition and large-screen active matrix liquid crystal display device, the number of thin film transistors to be used becomes very large. For example, in the case of address 400 x data 400,
Although the number of elements is 160,000, it is difficult to completely manufacture such a large number of thin film transistor arrays, and various defects occur. For example, electrical short-circuits between multilayer wirings or capacitors, release of wirings, defects in thin film transistors, and the like. As for the display device, if the point defect is allowed, the release of the wiring can be easily relieved. That is, even if the address line is broken, it can be remedied by supplying signals from both ends. Further, regarding the electrical short circuit of the capacitor holding the signal voltage, if the off-resistance of the thin film transistor is made sufficiently large and the resistivity of the liquid crystal is made large, it is not necessary to provide a capacitor, so that this problem can be avoided.

On the other hand, a short circuit in the wiring has a fatal result. For example, if the address wiring and the data wiring are short-circuited, line defects will occur along these wirings, and these defects cannot be easily repaired.

As a method of preventing such a short circuit between multilayer wirings,
A stacked insulating film structure has been proposed in which an address wiring and a gate electrode are formed of Ta, the surface thereof is anodized, and then a SiO ₂ or Si ₃ N ₄ film is deposited thereon (Japanese Patent Publication No. 60-54).
No. 478). However, in this method, the resistance of the address wiring increases due to the anodic oxidation of Ta. For example, 22
In a thin film transistor that creates a 44 mm x 60 mm screen with 0 x 240 pixels, if the address wiring made of Ta with a thickness of 150 nm and a wiring resistance of about 60 kΩ is oxidized to about 700 mm from the surface, the wiring resistance will be about 110 kΩ. When the wiring resistance increases, the distortion of the waveform due to the delay of the address pulse signal increases. As a result, there is a time lag between writing to the pixel at the signal input terminal portion of the address wiring and the peripheral end portion, and the uniformity of image quality is impaired. If the thickness of the Ta film is increased, the wiring resistance can be reduced. However, if the thickness is too large, the film may peel off or the data wiring formed thereon may be released.

Molybdenum is a wiring material having a lower resistance than Ta. However, Mo has sufficient characteristics required for the address wiring of the active matrix substrate because Mo is inferior in chemical resistance and cannot be cleaned with a mixed solution of sulfuric acid and hydrogen peroxide, and a high-quality insulating film cannot be formed on the surface. Not.

On the other hand, a semiconductor integrated circuit using a single crystal Si substrate has a similar problem. For example, memory integrated circuits represented by dynamic RAMs are becoming more and more integrated. Conventionally, impurity-doped polycrystalline silicon has been generally used for a gate electrode wiring of a MOS transistor used in such a memory integrated circuit. However, the specific resistance of polycrystalline silicon is too high for further miniaturization and high integration of elements. Molybdenum silicide (MoSi ₂ ) film is one of the materials with lower specific resistance than polycrystalline silicon.
In order to realize the above, problems such as an increase in power consumption, signal delay, and noise due to the resistance of the electrode wiring occur.

(Problems to be Solved by the Invention) As described above, in various electronic devices, in order to miniaturize elements and improve the performance of the devices, there is a problem that resistance, workability, and chemical resistance of electrode wiring are large. Has become.

An object of the present invention is to provide a liquid crystal display device capable of realizing a large screen and high image quality.

[Structure of the Invention] (Means for Solving the Problems) The liquid crystal display device of the present invention comprises a glass substrate, a plurality of address wirings and data wirings arranged on the substrate so as to intersect each other. A plurality of thin film transistors formed at intersections of address lines and data lines, with a gate electrode connected to the address lines, a source electrode connected to the data electrodes, and a plurality of display electrodes connected to the drain electrodes of the thin film transistors, respectively. In a liquid crystal display device including a driving circuit substrate and a counter glass substrate provided on the driving circuit via a liquid crystal layer, the address wiring and the gate electrode have a composition ratio of tantalum of 30 to 30.
It is characterized by being formed of an alloy film of molybdenum and tantalum of 85 atomic%.

Here, the total amount of molybdenum and tantalum contained in the electrodes and wirings may be 95 atomic% or more, and 5 atomic% of other elements such as carbon, oxygen, argon, nitrogen, and hydrogen may be used.
It is permissible to include in the range of less than.

(Operation) The electrode wiring material according to the present invention has been used for wiring as a result of various experiments and examinations as an electrode wiring material for a semiconductor device using an a-Si film, a polycrystalline silicon film, a single crystal Si substrate, or the like. It has lower electric resistance than the electric resistance of the Ta film or Mo film used, and the properties such as workability, oxide film forming property, ohmic contact with silicon, chemical resistance etc. required as wiring material It was proved to be excellent.

The reason for limiting the composition of the alloy film of Ta and Mo, which is a wiring material according to the present invention, is that in the range of 30 to 85 atomic% of Ta, an electrical resistance smaller than that of Mo is obtained, and excellent workability and oxide film similar to Ta are obtained. To exhibit formability and chemical resistance. If Ta is less than 30 atomic%, the electric resistance of the alloy film becomes larger than that of Mo, and the oxide film forming property, mixed liquid cleaning property, etc. are deteriorated.

When Ta exceeds 85 atomic%, the workability, the oxide film forming property and the mixed liquid cleaning property are good, but the electric resistance sharply increases.

In the liquid crystal display device according to the present invention, since the address wiring and the gate electrode have extremely low resistance, the delay time of address signal propagation can be sufficiently reduced even when a large screen and high definition are used. In addition, since the resistance can be reduced without increasing the thickness of the address wiring and the taper etching can be easily performed, disconnection of the data wiring stacked thereon can be prevented. Further, a high quality anodic oxide film can be formed on the address wiring and the gate electrode of the present invention. So, to prevent short circuit accidents,
This anodic oxide film and, for example, CVD (Chemical Vapor Depositi
The laminated insulating film of the SiO ₂ film according to (on) is used as a gate insulating film, and a semiconductor thin film is further laminated on the laminated insulating film at the intersection of the address wiring and the data wiring to form an interlayer insulating film. Further, after forming the address wiring and the gate electrode by patterning the conductive film made of the electrode wiring material of the present embodiment, a mixture of H ₂ SO ₄ + H ₂ O ₂ is formed in order to remove the contaminants generated by the patterning. Even if the glass substrate is cleaned with a strong cleaning liquid such as a liquid, the address lines are not corroded or etched. Such a glass substrate cleaning process is, of course, an essential process in a liquid crystal display device, and it is necessary that the cleaning process is sufficient. This is because if the cleaning process is insufficient, a withstand voltage failure between the drain and source electrodes and the gate electrode, a short circuit between layers, and the like occur, and a line defect or the like occurs in the pixel display. In particular, in the case of a large screen, a large amount of contaminants are generated at the time of patterning. Therefore, it is necessary to sufficiently perform a cleaning process. Since the address wiring material of this embodiment has high chemical resistance, it can be sufficiently cleaned, and thereby, it is possible to effectively prevent generation of line defects and the like even on a large screen.

(Example) Hereinafter, an example of the present invention will be described.

Prior to the description of the example applied to a specific device, the following table shows the results of measuring various characteristics of the Mo—Ta alloy film itself according to the present invention in comparison with other electrode wiring material films.

Each electrode wiring film was formed by a sputtering method at room temperature.
As is clear from the table, the alloy film according to the present invention has a lower specific resistance than any of Ti, Cr, β-Ta and MoSi ₂ after deposition at room temperature, and particularly when Ta is less than 85 atomic%, it is less than Mo. small. When a heat treatment is performed after the deposition, a lower specific resistance can be obtained.
Also, the workability by dry etching is excellent as in the case of the MoSi ₂ film, and the taper processing is easy. Further M
A high quality thermal oxide film cannot be obtained with an o, Ti, Cr film or the like, but a high quality thermal oxide film can be obtained with the alloy film according to the present invention. It also has excellent resistance to a mixture of H ₂ SO ₄ and H ₂ O ₂ which is widely used as a cleaning solution. Because of its excellent ohmic junction with Si and little reaction with the SiO ₂ film, compatibility with semiconductor devices using Si is also good.

○ (good), △ (slightly poor), × (bad) in the table
The evaluation by whether it is possible to dry etching CF ₄ system for workability, also for tapered workability CF
_The determination was made based on whether or not the taper angle could be controlled by dry etching of the ₄ system. Approximately 400 for thermal oxide film formation
The temperature depends on whether an oxide film with no pinholes, withstand voltage of 3 × 10 ⁶ V / cm or more, and leak current of 1 × 10 ⁻¹¹ nm / mm ² or less can be obtained at a temperature of ℃. No pinholes, withstand voltage 3 × 10 ⁶ V / cm or more, leak current 1 × 1
The determination was made based on whether or not an oxide film of 0 ^-11 nm / mm ² or less was obtained. Regarding the ohmic junction with silicon, the non-reactivity with the oxide film depends on whether the interface is formed of complete MoSi ₂ with good ohmic junction.
The reaction was performed at a temperature of about 400 ° C. depending on whether or not the reaction occurred.

FIG. 6 shows that a Mo-Ta
The graph shows the relationship between the composition ratio and the specific resistance when the alloy film is formed as a single-layer film. It can be seen that a specific resistance lower than Mo can be obtained when Ta is in the range of 30 to 85 atomic%.

Next, specific examples of the device using the electrode material of the present invention will be described.

FIG. 1 is an equivalent circuit diagram in which the wiring material of the present invention is applied to an active matrix type liquid crystal display device using an inverted stagger type TFT. The address wiring 11 (11
_{1, 11 2, ..., 11m} ) and a data line _{13 (13 1, 13 2,} ..., 13n) are arranged in a matrix, each of its intersections TFT 15 (15 _11,
..., 15mn). TFT15pq (p = 1,2, ..., m; q = 1,
In (2,..., N), the gate electrode 17pq is connected to the address wiring 11p, and the drain electrode 18pq is connected to the data wiring 13q. The source electrode 19pq is connected to the liquid crystal cell 14pq via the pixel electrode 12pq.
It is connected to the. Although the figure shows the capacitor 23pq, this can be omitted. The gate electrode 17pq is actually formed integrally with the address wiring 11p.

Figure 2 is an enlarged plan view of one pixel (21 ₂₂ location of) in the substrate shown in FIG. 1, FIG. 3 is a its A-A 'sectional view.

FIG. 3 is described according to the manufacturing process. A Mo—Ta alloy film was deposited on the glass substrate 1 by sputtering, and then patterned by PEP (Photo Engraving Process) to form a gate electrode 17. This gate electrode
17 is formed integrally with the same material and in the same process as the address wiring 11 in FIG. In this step, these edges are tapered in order to prevent disconnection of a layer formed on the gate electrode 17 and the address wiring 11 later. The taper etching for that purpose could be easily performed by dry etching using a resist and CF ₄ + O ₂ . The gate electrode 17 of the present example had the same thickness as the address wiring 11 of 200 nm and the width of 30 μm. After the gate electrode 17 was formed, a 200 nm Si ₃ N ₄ film 31 was formed thereon as a gate insulating film. Subsequently, 300 nm non-doped a-Si film 33, 133, 50 nm n ⁺
A mold a-Si film 35 and a 50 nm Mo film 37 were sequentially formed. As shown in FIG. 2, these three layers are left by etching at the thin film transistor portion and at each intersection of the address wiring 11 and the data wiring 13 to be formed thereafter. What is important in this step is processing before the gate insulating film 31 is deposited. Since the gate electrode 17 is patterned by PEP, a large amount of organic (for example, remaining resist) and inorganic contaminants are present on the surface. This cleaning process is performed for the gate electrode 17.
Was performed by immersing the glass substrate on which the was formed in a mixed solution of H ₂ SO ₄ + H ₂ O ₂ . The gate electrode 17 made of the alloy film of the present example was not corroded or etched by the cleaning solution, and showed sufficient resistance. Thereafter, the display electrode 21 of each pixel is formed of a 150 nm ITO (Indium Tin Oxide) film. Finally, a data wiring 13 and a source electrode 18 and a drain electrode 19 continuous with the data wiring 13 are formed by vapor deposition and patterning of an Al film. Source electrode 18 is formed integrally with data line 13.
The drain electrode 19 is brought into contact with the display electrode 21. By interposing a liquid crystal layer between the active matrix substrate and the counter electrode substrate, a liquid crystal display device can be obtained.

If the previous cleaning step is insufficient, a withstand voltage failure between the drain and source electrodes and the gate electrode, a short circuit between layers, and the like will occur, and line defects will occur in image display. In the present embodiment, sufficient cleaning can be performed because of chemical resistance, and it was proved that the occurrence of the defect was prevented.

In the above embodiment, the Si ₃ N ₄ film 31 was directly deposited on the gate electrode 17 as a gate insulating film, but a thermal oxide film was formed on the surface of the gate electrode 17 prior to the deposition of the Si ₃ N ₄ film. Is useful. After actually forming the gate electrode of the above embodiment,
160 ℃ by thermal oxidation at 400 ℃ for 1 hour in oxygen atmosphere at normal pressure
An oxide film of nm was formed. The breakdown voltage of this thermal oxide film is 5.2 × 1
And at 0 ⁵ V / cm or more and a dielectric constant of 23. If a gate insulating film is formed by depositing a Si ₃ N ₄ film after forming such a thermal oxide film, defects due to interlayer short-circuit can be more effectively prevented. In addition, since the thickness of the second insulating film can be reduced, the threshold voltage of the TFT can be reduced. By similarly forming a thermal oxide film not only on the gate electrode portion but also on the entire gate wiring or the wiring intersection, it is possible to prevent a defect due to a short circuit at the wiring, particularly at the intersection. Further, a high quality oxide film can be formed by anodizing the gate electrode and the other surface of the above embodiment.

FIGS. 4A and 4B show an embodiment in which the surfaces of the address wiring and the gate electrode in the above embodiment are anodized. FIG. 4A is a sectional view taken along the line AA 'of FIG. 2, and FIG. 4B is a sectional view taken along the line BB' of FIG.

After forming the address wiring 11 and the gate electrode 17 in the same manner as in the above embodiment, an anodic oxide film 118 was formed on the surface thereof. In this embodiment, the anodic oxidation was performed in a 0.01 wt% citric acid aqueous solution. Next, the whole surface is plasma-enhanced by CVD.
A 00 nm SiO ₂ film 132 was formed. Thereafter, similarly to the above embodiment, the same thickness of the in-doped a-Si films 33 and 133 and the n ⁺ type a
-An Si film 35 and a Mo film 37 were sequentially formed. The display electrode 21, the source electrode 18, and the drain electrode 19 were formed in the same manner.

In the active matrix substrate of this embodiment, a thin film transistor is formed using the anodic oxide film 118 and the SiO ₂ film 132 as a gate insulating film. At each intersection between the address wiring 11 and the data wiring 13, a laminated film formed of the anodic oxide film 118, the SiO ₂ film 132, and the non-doped a-Si film 133 is used as an interlayer insulating film.

The active matrix type liquid crystal display device using the a-Si TFT has been described above.
The same effect is exhibited in a liquid crystal display device using a MIM (Metal Insulator Metal) device.

FIG. 5 shows a MOS transistor section of an embodiment in which the electrode wiring of the present invention is used for a gate electrode wiring section of a MOS integrated circuit. After a field insulating film 403 is formed on a p-type single-crystal Si substrate 401 having a specific resistance of several Ωcm,
A 0 nm gate oxide film 405 was formed. After that, an alloy film of Mo (60 atomic%)-Ta (40 atomic%) is
A gate electrode 407 having a tapered shape was formed by patterning by PEP and dry etching. Then, using the gate electrode 407 as a mask, P ions are implanted under the conditions of 1 × 10 ¹⁵ / cm ² and 100 KeV, and further for 30 minutes
Source and drain regions 409, 411
Was formed. In this heat treatment step, the specific resistance of the gate electrode 407 was reduced to 1.3 × 10 ⁻⁵ Ω · cm. Next, CVD oxide film
413 is formed to a thickness of 1 μm, and contact holes 4
15a and 415b were opened. Finally, source and drain electrodes 417 and 419 were formed by depositing and patterning an Al film.

According to this example, the gate electrode had a specific resistance of 1/5 as compared with the case where a conventional MoSi ₂ film was used, and circuit characteristics with a short gate delay time were obtained. Also, the heat treatment at 1000 ° C. did not cause a reaction between the gate electrode and the underlying gate oxide film, and high reliability device characteristics were obtained.

The present invention is not limited to the above embodiment. For example, the Mo—Ta alloy film in the above embodiment can be obtained by simultaneously sputtering a Mo target and a Ta target. Further, a similar alloy film can be formed by thermal decomposition of an organic gas containing both Mo and Ta. Further, the electrode wiring of the present invention is made of Si such as a-Si film, polycrystalline silicon film and single crystal Si.
However, the present invention is not limited to this, and can be applied to a case where another semiconductor material such as CdSe, Te, GaAs, and GaP is used.

[Effects of the Invention] As described above, according to the present invention, the use of a Mo—Ta alloy film having a very small specific resistance and excellent workability and stability as an electrode wiring material allows a large liquid crystal display device to be manufactured. Area and high definition can be achieved.

[Brief description of the drawings]

FIG. 1 is an equivalent circuit diagram of an active matrix type liquid crystal display device according to one embodiment of the present invention, FIG. 2 is an enlarged plan view of a main part of the active matrix substrate, and FIG. 4 (a) and 4 (b) are cross-sectional views taken along lines AA 'and BB' of FIG. 2 according to another embodiment, and FIG. 5 is a MOS transistor according to another embodiment. FIG. 6 is a diagram showing the resistivity characteristics of the electrode wiring material having a single-layer structure according to the present invention. 1 ... glass substrate, 11 ... address wiring, (Mo-Ta alloy, 13 ... data wiring, 14 ... liquid crystal cell, 15 ... TET, 1
7: Gate electrode (Mo-Ta alloy), 18: Drain electrode, 19: Source electrode.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁶ Identification number Agency reference number FI Technical display location H01L 27/12 H01L 29/46 R 29/43 27/10 681A (56) References JP-A Sho58 -7864 (JP, A) JP-A-56-114220 (JP, A) JP-A-60-54478 (JP, A)

Claims (5)

(57) [Claims] A glass substrate, a plurality of address wirings and data wirings arranged on the substrate so as to intersect each other, and a gate electrode formed at an intersection of each address wiring and the data wiring, A drive circuit substrate including a plurality of thin film transistors each having a source electrode connected to a data electrode, and a plurality of display electrodes each connected to a drain electrode of each of the thin film transistors is provided on the drive circuit via a liquid crystal layer. A liquid crystal display device comprising: a counter substrate; and the address wiring is formed of an alloy film of molybdenum and tantalum having a composition ratio of tantalum of 30 to 85 atomic%. 2. The liquid crystal display device according to claim 1, wherein the total amount of molybdenum and tantalum in said alloy is 95 atomic% or more. 3. The liquid crystal display device according to claim 1, further comprising a multilayer wiring using at least one of said alloys. 4. A thin film transistor comprising: a gate electrode integrally formed with the address wiring; and a semiconductor thin film deposited on the gate electrode via a gate insulating film including an anodic oxide film or a thermal oxide film of the gate electrode. 2. The liquid crystal display device according to claim 1, further comprising a drain and a source electrode formed on the semiconductor thin film by the same conductor film as the data wiring. 5. The semiconductor device according to claim 1, wherein:
2. The liquid crystal display device according to claim 1, wherein an interlayer insulating film including an anodic oxide film or a thermal oxide film of the address wiring, and a semiconductor thin film formed simultaneously with the semiconductor thin film used for the thin film transistor are interposed.