JPS63276242A - Electrode wiring and display device driving circuit substrate using said electrode wiring - Google Patents

Abstract

PURPOSE:To contrive for miniaturization, areal enlargement, and higher integration for various types of semiconductor devices by a method wherein the electrode wiring material is an Mo-Ta alloy film wherein the two metals are so mixed as to be quite low in resistivity and excellent in workability and stability. CONSTITUTION:An Mo-Ta alloy film wherein Ta accounts for 30-85 atom % and the combination of Mo and Ta not less than 95 atom %, is deposited on a glass substrate 1. A PEP process follows for the patterning of the Mo-Ta alloy film into a gate electrode 17. An Si3N4 film 31 is then formed as a gate insulating film on the electrode 17. Undoped a-Si films 33 and 133, N<+>-type a-Si film 35, and Mo film 37 are formed, in that order. These three films are to be retained, after etching, in a thin film transistor region and at the crossing of an address wiring 11 and data line 13, the data line 13 remaining to be built. After this, by using an ITO film, a display electrode 21 is built. Finally, by Al vaporization and patterning, a data line 13, and a source and drain electrodes 18 and 19 to be connected to the data line 13, are formed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to an electrode wiring for an electronic device and a drive circuit board for a display device using the same.

(Prior Art) In recent years, active matrix liquid crystal display devices that use thin film transistors (TPT) using amorphous silicon (A-8I) fins as switching elements have been attracting attention. The reason is that a-3 can be formed on an amorphous glass substrate at low temperatures.
If a TFT array is formed using i [l, a large screen,
This is because there is a possibility of realizing a panel display (flat type television) with high definition, high image quality, and low cost.

For example, when adopting an inverted staggered TPT structure in which a gate electrode wiring is provided on a glass substrate and an insulating film or an A-8T film is overlaid on the TPT, the gate electrode and the address wiring formed integrally therewith are adopted. Since semiconductor thin films and data wiring are laminated thereon within a limited thickness, the electrode wiring must be thin and have sufficiently low resistance. In addition, in the case of stacking, it is necessary to perform taper processing on the stepped portion of the lower layer electrode wiring in order to prevent breakage of the upper layer. Therefore, it must have processability for this purpose,
In addition, characteristics such as not being attacked by cleaning liquids such as sulfuric acid and hydrogen peroxide in the subsequent cleaning process are required. Conventionally, various metal films such as tantalum and titanium have been used as gate electrode wiring materials that meet these requirements.
In order to increase the size and definition of screens, there is a need for materials with lower resistance, better workability, and greater resistance to subsequent chemical treatment steps.

When employing a staggered TPT structure in which drain and source electrode wirings are provided on a substrate, such characteristics are required of the drain and source electrode wiring materials. Similar problems also exist in non-active matrix liquid crystal display devices.

In order to make the display pixels of an active matrix liquid crystal display device as small as possible and to enlarge the screen, TP
It is necessary to make the signal lines to T, that is, the gate wiring and data wiring, thin and long.

Furthermore, in order to eliminate waveform distortion due to pulse signal delay, the resistance must be made sufficiently small.

When realizing a high-definition, large-screen active matrix liquid crystal display device, a very large number of thin film transistors are used. For example, in the case of 400 addresses x 400 data, the number of elements is 160,000, but it is difficult to completely manufacture such a large number of thin film transistor arrays, and various defects occur.

For example, electrical short circuits between multilayer interconnections or capacitors, open interconnections, defects in thin film transistors, etc. As a display device, if point defects are allowed, wiring release can be easily repaired. That is, even if the address line is disconnected, it can be repaired by supplying signals from both ends. Regarding electrical short circuits in the capacitors that hold the signal voltage, this problem can be avoided if the off-resistance of the thin film transistor is made sufficiently large and the resistivity of the liquid crystal is made large, since there is no need to provide a capacitor.

On the other hand, a short circuit in the wiring has fatal consequences.

For example, if an address line and a data line are shorted, a line defect will occur along these lines, and this defect cannot be easily repaired.

As a method to prevent short circuits between multilayer interconnections, address interconnections and gate electrodes are formed of Ta, their surfaces are anodized, and then 5I02 or Si3N is further applied on top of them.
A laminated insulating film structure in which a + film is deposited has been proposed (Japanese Patent Publication No. 54478/1983). However, with this method, T
The resistance of the address wiring increases due to the anodic oxidation of a.

For example, in a thin film transistor that creates a 44m x 60m screen with 220 x 240 pixels, if address wiring made of Ta with a thickness of 150 ns and a wiring resistance of 60 kΩ is oxidized from the surface to approximately 700 Ω, the wiring resistance will be approximately 110 Ω. When the wiring resistance increases in this way, the distortion of the waveform due to the delay of the address pulse signal increases.

As a result, there is a time lag between writing to pixels at the signal input terminal portion of the address wiring and the same terminal portion, which impairs the uniformity of image quality. Wiring resistance can be reduced by increasing the thickness of the Ta film, but making it too thick may cause peeling of the film or release of data wiring formed thereon.

Molybdenum is a wiring material with lower resistance than Ta. However, MO has poor chemical resistance, cannot be cleaned with a mixture of sulfuric acid and hydrogen peroxide, and cannot form a high-quality insulating film on its surface. Not yet.

On the other hand, similar problems exist in semiconductor integrated circuits using single-crystal Si substrates. For example, memory integrated circuits typified by dynamic RAMs are increasingly becoming more integrated. MoS conventionally used in such memory integrated circuits
Impurity-doped polycrystalline silicon has generally been used for gate electrode wiring of transistors. However, polycrystalline silicon has too high a resistivity in order to achieve further miniaturization and higher integration of elements. Molybdenum silicide (Mo3)2) is a material with lower resistivity than polycrystalline silicon.
Although there are DIs and the like, when trying to realize a dynamic RAM of 1 Mbit or more using these, problems such as increased power consumption, signal delay, and noise arise due to the resistance of electrode wiring.

(Problems to be Solved by the Invention) As described above, in various electronic devices, the resistance, workability, and chemical resistance of electrode wiring are major obstacles to miniaturizing elements and improving device performance. It has become.

An object of the present invention is to provide an electrode wiring which has low electrical resistance and which enables miniaturization and high integration of various electronic elements.

Another object of the present invention is to provide a drive circuit board for a display device that enables a large screen and high image quality by using such electrode wiring.

[Structure of the invention] (Means for solving the problems) In the present invention, molybdenum (Mo) is used as an electrode wiring material.
and tantalum (Ta).

The composition ratio of Ta is 30 to 85 atomic %. The total amount of MO and Ta contained in this alloy may be 95 atomic % or more, and it is permissible to include other elements such as carbon, oxygen, argon, nitrogen, hydrogen, etc. in an unmixed range of 5 atomic %. .

The drive circuit board for a display device according to the present invention has address wires and data wires arranged in an intersecting manner on an insulating substrate, and a TPT is formed at the intersecting position of the address wires. is 30 to 85 at%
-Constructed from Ta alloy.

(Function) The electrode wiring material according to the present invention has been used as an electrode wiring material for semiconductor devices using A-8I film, polycrystalline silicon film, single crystal 81 substrate, etc. as a result of various experiments and studies. It has lower electrical resistance than the conventional Ta film or MO film, and has properties such as processability, oxide film formation, ohmic contact with silicon, and chemical resistance that are necessary for wiring materials. It has been proven to be excellent.

The reason why the composition of the alloy film of Ta and Mo, which is the wiring material according to the present invention, is limited is that in the range of 30 to 85 atomic % of Ta, an electrical resistance lower than that of MO can be obtained, and it also has excellent workability similar to Ta, and an oxide film. The objective is to exhibit formability and chemical resistance. Ta
If the amount is less than 30 atomic %, the electrical resistance of the alloy film will be higher than that of MO, and the oxide film forming property and mixed liquid cleaning performance will deteriorate.

When Ta exceeds 85 at%, processability, oxide film formation,
Mixed liquid cleaning performance is good, but electrical resistance increases rapidly.

In the display device drive circuit board according to the present invention, since the address wiring and the gate electrode have extremely low resistance, the delay time of address signal propagation can be sufficiently reduced even when a large screen and high lN1fl are used. Further, since the resistance can be reduced without increasing the thickness of the address wiring, and taper etching can be easily performed, disconnection of the data wiring layered thereon can be prevented. Furthermore, a high-quality anodic oxide film can be formed on the address wiring and gate electrodes of the present invention. Therefore, in order to reliably prevent short-circuit accidents, this anodic oxide film and, for example, CVD (Ch
chemical vapor [)eposition
) is used as a gate insulating film, and a semiconductor thin film is roughly overlapped on this laminated insulating film at the intersection of address wiring and data wiring to serve as an interlayer insulating film.

(Example) The present invention will be explained in detail below.

Prior to explaining examples applied to specific devices,
The following table shows the results of measuring various characteristics of the Mo-Ta alloy film itself according to the present invention in comparison with other electrode wiring material films.

Each electrode wiring film was formed by sputtering at room temperature. As is clear from the table, the alloy film according to the present invention has a lower specific resistance than any of Ti, Or, β-Ta, and MO3i2 after being deposited at room temperature, and especially when Ta is 85 atomic percent unvortexed, it has a lower resistivity than MO. small.

An even lower resistivity can be obtained by performing a post-deposition heat treatment. Furthermore, the processability by dry etching is also excellent like that of the MOSi2 film, and Taber processing is also easy. Further, although Mo, Ti, Cr11, etc. cannot provide a good quality thermal oxide film, the alloy film according to the present invention can provide a good quality thermal oxide film. H2SO4 and H are widely used as cleaning solutions.
It also has excellent resistance to a mixed solution of 2O2. Sl
It has excellent ohmic contact with 5iOzll, and has little reaction with 5iOzll, so it is well compatible with semiconductor devices using Sl.

In addition, the evaluations of O (good), Δ (slightly poor), and × (poor) in the table depend on whether or not dry etching of CF4 is possible for processability, and the same for Taber processability <C
This was done to see if the Taber angle could be controlled by F4 type dry etching. Regarding thermal oxide film formation, approximately 4
00'C temperature, no pinholes, withstand voltage 3 x 10B
■/cjI or more, leakage current 1×10''l 1 n@
/□2 or less depending on whether or not an oxide film can be obtained. Regarding the anodic oxide film formation, there is no pinhole and the breakdown voltage is 3 x 1.
08V10++ or more, leakage current 1X10-ILnm/
The test was carried out depending on whether an oxide film having a thickness of M2 or less could be obtained.

Regarding ohmic contact with silicon, the non-reactivity with oxide film depends on whether the interface is made of complete MOSi2 with good ohmic contact.
The test was conducted to determine whether the reaction occurred at a temperature of about 400°C.

Figure 6 shows an MO-T formed on a glass substrate by sputtering.
It shows the relationship between composition ratio and specific resistance when the a-alloy film is formed as a single layer film. It can be seen that a specific resistance smaller than that of MO can be obtained when Ta is in the range of 30 to 85 atomic %.

Next, examples of specific devices using the electrode material of the present invention will be described.

FIG. 1 is an equivalent circuit diagram in which the wiring material of the present invention is applied to an active matrix liquid crystal display device using an inverted staggered TPT. Address wiring 11 on glass substrate 1
(1it, 112,...

11m) and data wiring 13 (13!, 132,...
・.

13n) are arranged in a matrix, and a TFTl5 (151t, . . . , 15IIIn) is arranged at each intersection position.
is placed. TFTl 51)Q(p-1,2,-,
m: Q-1, 2,..., n) is the gate electrode 17p
Q is the address arrangement 111E), and the drain electrode 181)
Q is connected to the data line 13a. Further, the source electrode 19pQ is connected to the liquid crystal cell 14 via the pixel electrode 211)Q.
1) Connected to Q. Although the capacitor 23pQ is shown in the figure, this can be omitted. The gate electrode 17pQ is actually formed integrally with the address wiring 11p.

FIG. 2 is an enlarged plan view of one pixel (location 2122) in the substrate shown in FIG. 1, and FIG. 3 is a sectional view taken along the line AA'.

FIG. 3 will be explained according to the manufacturing process. An MO-Ta alloy film is deposited on the glass substrate 1 by sputtering, and then PEP (Photo) is deposited on the glass substrate 1 by sputtering.

A gate electrode 17 was formed by patterning using En(lraVinQPrOcllss). This gate electrode 17 is integrally formed using the same material and in the same process as the address wiring 11 shown in FIG. In this step, in order to prevent breaks in the layers to be formed later on the gate electrode 17 and the address wiring 4111, these edges were tapered. For this purpose, the thermal etching is done using resist and CF.
This could be easily done by dry etching using 4+02. The gate electrode 17 of this example has a thickness of 200 nm, which is the same as the address wiring 11, and a width of 30 μm.
I made it. After forming the gate electrode 17, a 200nIll of 813N4! is deposited on top of it as a gate insulating film. 13)
was formed. Subsequently, a-st 1!33 of 300 n1l(7)/dove, n-medium type a-8t 1135 of 133°50 nIll, and MO film 37 of 50 nm were successively formed. As shown in FIG. 2, these three layers are left by etching at the thin film transistor section and at each intersection of the address wiring 11 and the data wiring 13 to be formed later.

What is important in this step is the treatment before depositing the gate insulating film 3). Since the gate electrode 17 is patterned by PEP, a large amount of specific (for example, resist residue) and inorganic contaminants are present on the surface. In this cleaning process, the glass substrate on which the gate electrode 17 is formed is cleaned with H2804+H
This was done by immersing it in a mixed solution of No. 202. The gate electrode 17 made of the alloy film of this example was not corroded or etched by this cleaning solution and exhibited sufficient resistance. After this 150n+
i's I To (Indium Tln Oxide
) film forms the display electrode 21 of each pixel. Finally, by vapor deposition and patterning of an Af film, the data wiring 13 and the source electrode 18 and drain electrode 1 connected thereto are formed.
9 is formed. The source electrode 18 is formed integrally with the data line 13. In addition, the drain electrode 19 is the display electrode 2.
1. A liquid crystal display device is obtained by sandwiching a liquid crystal layer between this active matrix substrate and a counter electrode substrate.

If the previous cleaning step is insufficient, a breakdown voltage failure between the drain, source electrode, and gate electrode will occur, and interlayer short circuits will occur, resulting in line defects and the like in image display. In this example, since it has chemical resistance, sufficient cleaning can be performed, and it was verified that the occurrence of the defect can be prevented.

In the above embodiment, Sl:lN4 is directly placed on the gate electrode 17.
113) was deposited as a gate insulating film, but this Si3
It is useful to form a thermal oxide film on the surface of gate electrode 17 prior to depositing the N4 film. In fact, after forming the gate electrode in the above example, an oxide film of 160 nll was formed by thermal oxidation at 400° C. for 1 hour in an oxygen atmosphere at normal pressure.

The breakdown voltage of this thermal oxide film was 5.2×10” V/σ or more, and the dielectric constant was 23. After forming such a thermal oxide film, a 5i3N+ film was deposited to form a gate insulating film. This makes it possible to more effectively prevent defects caused by interlayer short circuits.Also, since the 21st insulating film can be made thinner, T
The effect of lowering the threshold voltage of FT can also be obtained. By similarly forming a thermal oxide film not only on the gate electrode portion but also on the entire gate wiring or the wiring intersection, it is possible to prevent defects due to short circuits between the wirings, especially at the intersection. Furthermore, a high quality oxide film can also be formed by anodic oxidation on the gate electrode and other surfaces of the above embodiments.

FIGS. 4(a) and 4(b) show an example in which the surfaces of the address wiring and gate electrode in the above example are anodized. Figure 4(a) is a sectional view taken along line AA' in Figure 2;
FIG. 4(b) is the same <B-8-- cross-sectional view.

Address wiring 11 and gate electrode 17 as in the previous embodiment
After forming , anodic oxide 11118 was formed on these surfaces. In this example, the anodization was carried out at 0.01 w
t% citric acid aqueous solution.

Next, the entire surface was coated with 5i of 200 tv by plasma CVD.
An f2 film 132 was formed. After this, a non-doped a-8i @33.133 with the same thickness as in the above example was added.
, n-medium type A-81 film 35 and MOII-37 were sequentially formed. The display electrode 21, source electrode 18, and drain electrode 19 were also formed in the same manner.

In the active matrix substrate of this example, anodization 1
A thin film transistor is formed using 1118 and 8102111132 as gate insulating films. Also address wiring 11
At each intersection of the data line 13 and the data line 13, anodized WA118
．． 5102 film 132 and non-doped Me 81 film 133
A laminated film formed from the above is used as an interlayer insulating film.

Although the active matrix type liquid crystal display element using the A-3i TFT has been described above, the present invention also applies to the A-SR diode and MIM (Metal In5u-1ator).
The same effect can be exerted on liquid crystal display elements using metal (metal) elements.

FIG. 5 shows a MOS transistor section of an embodiment in which the electrode wiring of the present invention is used in the gate electrode wiring section of an MO8 integrated circuit. After forming a field insulation 11403 on a p-type wheel crystal 3i substrate 401 having a resistivity of Ω·α, a gate oxide 11405 of 40 m is formed in the element region by thermal oxidation.

After this, MO (60 atomic%) -Ta (40[child%]
An alloy film having a thickness of 300 nm was formed by a sputtering method, and this was patterned by PEP and dry etching to form a tapered gate electrode 407. Then, using the gate electrode 407 as a mask, P ions were
Injected under conditions of 0”/crn2.100Ke V,
Heat treatment was further performed at 1000° C. for 30 minutes to form source and drain regions 409 and 411. In this heat treatment process, the specific resistance of the gate electrode 407 is 1.3×10″″5Ω.
・It became smaller than α. Next, a CVD oxide film 413 with a thickness of 1μ
contact holes 415a,
I opened 415b. Finally, source and drain electrodes 417 and 419 were formed by depositing an A1 film and patterning.

According to this embodiment, the gate electrode is a conventional MO8Izi
The specific resistance was 115 compared to the case where ll was used, and circuit characteristics with a short gate delay time were obtained. 1 000 again
Even with the heat treatment at ℃, no reaction occurred between the gate electrode and the underlying gate oxide film, and highly reliable device characteristics were obtained.

Note that the present invention is not limited to the above embodiments. For example, the Mo-Ta alloy film in the above embodiment is
It can also be obtained by sputtering a Ta target and a Ta target simultaneously. A similar alloy film can also be formed by thermal decomposition of a specific gas containing both MO and Ta. Further, the electrode wiring of the present invention is not limited to 81 such as a-8i film, polycrystalline silicon group, single crystal 3i, etc., but also CdSe, Te,
GaAs.

It can also be applied to cases where other semiconductor materials such as GaP are used.

[Effects of the Invention] As described above, according to the present invention, by using an MO-Ta alloy film, which has a very low resistivity and excellent workability and stability, as an electrode wiring material, various semiconductor devices can be fabricated. It is possible to achieve miniaturization, larger area, and higher integration.

Furthermore, the display device drive circuit board according to the present invention uses a low-resistance Mo--Ta alloy film as the address wiring material, thereby making it possible to increase the area and high definition of the display device.

[Brief explanation of drawings]

FIG. 1 is an equivalent circuit diagram of an active matrix liquid crystal display device according to an embodiment of the present invention, FIG. 2 is an enlarged plan view of essential parts of the active matrix substrate, and FIG. Cross-sectional view, Figure 4 (a)
and (b) are A-A in FIG. 2 according to another embodiment.
' and B-B cross-sectional view, FIG.
FIG. 6 is a cross-sectional view of the S transistor, and is a diagram showing the resistivity characteristics of the single-layer structure electrode wiring material according to the present invention. 1...Glass substrate, 11...Address wiring, <MO
-Ta alloy, 13... Data wiring, 14... Liquid crystal cell, 15... TFT, 17-... Gate electrode (MO-Ta
alloy), 18... drain electrode, 19... source electrode. Applicant's agent Patent attorney Takehiko Suzue Figure 3 Figure 4 Figure 5

Claims (1)

[Scope of Claims] (1) Electrode wiring using an alloy of molybdenum and tantalum in which the composition ratio of tantalum is 30 to 85 at %. (2) The electrode wiring according to claim 1, wherein the total amount of molybdenum and tantalum in the alloy is 95 atomic % or more. (3) The electrode wiring according to claim 1, which is a multilayer wiring using one or more layers of the alloy. (4) an insulating substrate;
A plurality of address wirings and data wirings are arranged on this substrate to intersect with each other, and gate electrodes are formed at the intersections of each address wiring and data wiring, and
comprising a plurality of thin film transistors each having a source electrode connected to a data electrode, and a plurality of display electrodes each connected to a drain electrode of these thin film transistors;
In the drive circuit board for a display device, the address wiring is formed of an alloy film of molybdenum and tantalum having a tantalum composition ratio of 30 to 85 atomic %. (5) The drive circuit board for a display device according to claim 4, wherein the total amount of molybdenum and tantalum in the alloy is 95 atomic % or more. (6) The drive circuit board for a display device according to claim 4, which has multilayer wiring using at least one layer of the alloy. (7) The thin film transistor includes a gate electrode integrally formed with the address wiring, a semiconductor thin film deposited on the gate electrode via a gate insulating film including an anodic oxide film or a thermal oxide film of the gate electrode, and 5. The drive circuit board for a display device according to claim 4, further comprising drain and source electrodes formed of the same conductive film as the data wiring on the semiconductor thin film. (8) An interlayer insulating film including an anodic oxide film or a thermal oxide film of the address wiring, and a semiconductor thin film formed at the same time as the semiconductor thin film used for the thin film transistor are interposed between each address wiring and the data wiring. A drive circuit board for a display device according to claim 4.