JP2538523B2 - Liquid crystal matrix panel manufacturing method - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a liquid crystal matrix panel using a field effect transistor (FET). Recently, a large number of gate lines (scanning lines) and drain lines (signal lines) are orthogonally insulated from each other on one substrate of a liquid crystal panel, and thin film FETs (TFTs) are arranged as switching elements at the intersections of these lines. By opening and closing to give a signal to the display electrode provided at each intersection, and driving the liquid crystal of this part to display,
Attempts have been made to develop a liquid crystal matrix panel for displaying images on a television or the like. The present invention relates to a method for manufacturing a liquid crystal matrix panel using a switching element in such a display panel, for example.

[0002]

2. Description of the Related Art FIG. 3 shows the overall structure of a matrix panel using an FET as a switching element.

As shown in the figure, 1 is a front glass transparent substrate, and 2 is ITO coated on the entire inner surface of the transparent substrate 1.
A common electrode made of a film, 3 is a liquid crystal layer, 4 is a spacer made of glass frit, resin or the like, and also acts as a sealant. Reference numeral 5 denotes a rear glass transparent substrate on which a plurality of gate lines (X) and drain lines (Y) (may be source lines; the same applies hereinafter) are insulated from each other and arranged orthogonally. Reference numeral 6 is a display electrode connected to each intersection of the gate line (X) and the drain line (Y) through an amorphous silicon FET.

A conventional method of manufacturing a liquid crystal matrix panel will be described below.

FIG. 4 shows a plan view of one FET, and FIG.
4 shows a cross-sectional view of the manufacturing process around the TFT section along the line AA 'in FIG. 4, and FIG. 6 shows a cross-sectional view of the gate line section along the line BB' in FIG.

FIGS. 5 and 6 show a specific structure of one FET, and (X) and (Y) are the gate line and the drain line described above, which are separated by the insulating layer 7.
The gate line (X) and the drain line (Y) are formed on the surface of the glass substrate 5. F for the gate line (X)
A gate (G) of ET is formed. An amorphous silicon layer (A) is formed above the gate (G) via an insulating layer 7.
S) is formed, and a source (S) and a drain (D) are formed on both ends so as to sandwich the gate (G). The drain (D) is also used as a part of the drain line (Y). Reference numeral 6 denotes the above-mentioned display electrode, which is connected to the source (S). Normal gate line (X) and display electrode 6
Is formed of an ITO film, and the source (S) and the drain line (Y) are formed of aluminum. As the insulating film 7, a vapor deposition film of silicon nitride Si ₃ N ₄ formed by the plasma CVD method is used.

The FET having such a structure is shown in FIG.
As shown in (c), there is a portion where the gate line (X) and the drain line (Y) intersect with each other through the insulating film 7. The number of intersections is the same as the number of pixels. For example, the number of gate lines (X) and the number of drain lines (Y) are each 2
If there are 20 and 240, the number is 52,800. Therefore, some of these intersections are short-circuited via the pinhole formed in the insulating layer 7. Even if only one point is short-circuited, two defective lines, that is, one gate line and one drain line are generated, which causes a large defect in display.

[0008]

SUMMARY OF THE INVENTION The present invention aims to improve the reliability of these device structures by preventing a short circuit due to a pinhole generated at the intersection of a gate line and a drain line, and further preventing a short circuit of the FET itself. Therefore, it is intended to prevent display defects of the liquid crystal matrix panel.

[0009]

A method of manufacturing a liquid crystal matrix panel according to the present invention includes a display electrode substrate in which a large number of display electrodes are arranged in rows and columns with transistors for supplying potentials to the insulating substrate and the display substrate. In a method of manufacturing a liquid crystal matrix panel in which liquid crystal is filled between opposing common electrodes, a gate line made of anodizable metal and a gate electrode connected to the gate line are formed on the insulating substrate, By forming an oxide insulating film on both surfaces by anodizing the surface of the gate line and the surface of the gate electrode, by coating another insulating film on the insulating substrate so as to cover the oxide insulating film. A laminated body of the oxide insulating film and the other insulating film, and the semiconductor layer, the source electrode, and at least the laminated body formed on the other insulating film. Drain lines intersecting with the gate line on trine, a drain electrode connected to the drain line, and forms a display electrode connected to the source electrode.

[0010]

According to the method of manufacturing a liquid crystal matrix panel of the present invention, even if pinholes are generated in the insulating oxide film and the insulating layer, the probability that the positions of these pinholes coincide will be extremely low. Can be almost zero. Further, since the insulating oxide film is formed by anodic oxidation, even if foreign matter such as dust adheres to the surface of the gate line and the gate electrode, it wraps around to form a surface insulating film, and the occurrence of pinholes due to the foreign matter is reduced. .

[0011]

1 and 2 are sectional views of an embodiment of the present invention corresponding to FIGS. 5 and 6, and the same parts as those in FIGS. 5 and 6 are denoted by the same reference numerals. 8 is an insulating oxide film formed on the surface of the gate (G) and the gate line (X),
When the gate line (X) and the gate (G) are made of aluminum, the oxide is alumina Al ₂ O ₃ .
The insulating oxide film 8 is formed by anodizing the gate line (X) made of aluminum (FIGS. 1B and 2B). After the gate line (X) and the gate (G) are oxidized, an insulating layer 7 is formed by vapor deposition of silicon nitride to cover the surface thereof, and a drain line (Y) is formed on the insulating layer 7. Be applied. Thus, the insulating oxide film 8 and the insulating layer 7 are separately formed by oxidation and plasma CVD, respectively. Therefore, F
The gate insulating layer on the gate electrode (G) of the ET is composed of a laminate of an insulating oxide film 8 made of alumina, which is a surface insulating film of the gate electrode (G), and an insulating layer 7 such as silicon nitride. (FIG. 1 (d)). Further, even at the intersection of the gate line (X) and the drain line (Y), the interlayer insulating film is composed of a laminated body of the insulating oxide film 8 and the insulating layer 7 similar to the gate insulating layer of the FET. (FIG. 2 (d)). Therefore, even if a pinhole is formed in the insulating layer 7 existing at the intersection of the gate line (X) and the drain line (Y), the probability that a pinhole will be formed in the insulating oxide film 8 at this position is It is very low and can be practically zero. At the FET position, of course, as is clear from FIG. 2D, between the gate electrode (G) and the amorphous silicon layer which is the semiconductor layer and the drain electrode (D) or the source electrode (S), Since the laminated body of the insulating oxide film 8 and the insulating layer 7 is interposed, the probability of short circuit between electrodes due to pinholes can be drastically reduced as in the case of the above-mentioned line intersection.

[0012]

As described above, according to the method of manufacturing a liquid crystal matrix panel of the present invention, a laminate of an oxide insulating film by anodic oxidation and another insulating layer formed so as to cover the oxide insulating film is provided. By doing so, it is possible to eliminate the short-circuit accident due to the pinhole between the transistor and the electrode at the line crossing position, so that the display operation defect in the liquid crystal matrix panel is eliminated.

Further, since an oxide insulating film is formed on the surface of the gate line and the surface of the gate electrode by anodic oxidation, even if foreign matter such as dust adheres to the surface of the gate line and the gate electrode, the oxide insulating film wraps around and becomes an insulating film. As a result, the formation of pinholes due to foreign matter can be prevented.

Particularly in a liquid crystal matrix panel having transistors and the number of intersections on the order of one million, the effect of improving the yield is great.

[Brief description of drawings]

FIG. 1 is a sectional view of a manufacturing process of a TFT portion of a liquid crystal matrix panel of the present invention.

FIG. 2 is a sectional view of a manufacturing process along a gate line of a liquid crystal matrix panel of the present invention.

FIG. 3 is a structural diagram of a liquid crystal matrix panel.

FIG. 4 is a plan view around a pixel of a liquid crystal matrix panel.

FIG. 5 is a sectional view of a manufacturing process of a TFT portion of a conventional liquid crystal matrix panel.

FIG. 6 is a sectional view of a manufacturing process along a gate line of a conventional liquid crystal matrix panel.

[Explanation of symbols]

 1 front transparent substrate 2 common electrode 3 liquid crystal layer 4 spacer 5 rear transparent substrate 6 display electrode 7 insulating layer 8 insulating oxide film X gate line Y drain line

Claims (1)

(57) [Claims] 1. A liquid crystal matrix in which a large number of display electrodes are arranged in rows and columns on an insulating substrate together with transistors for supplying electric potentials to the display electrode substrates and a liquid crystal is filled between a common electrode facing the substrates. the method of manufacturing a panel, on the insulating substrate, a gate electrode connected to the gate lines and the gate lines made of anodic oxidizable metal, anodizing the surface of the surface and the gate electrode of said gate lines
After forming the oxide insulating film on both surfaces, another insulating film is formed on the insulating substrate so as to cover the oxide insulating film.
By covering the edge film, the oxide insulating film and the other insulating film
And a semiconductor layer, a source electrode, and a thin film on the other insulating film.
At least on the gate line where the stack is formed
A method of manufacturing a liquid crystal matrix panel, comprising forming a drain line intersecting with the gate line, a drain electrode connected to the drain line, and a display electrode connected to the source electrode.