JP2515324B2 - Resin-sealed semiconductor device - Google Patents
Resin-sealed semiconductor deviceInfo
- Publication number
- JP2515324B2 JP2515324B2 JP62099680A JP9968087A JP2515324B2 JP 2515324 B2 JP2515324 B2 JP 2515324B2 JP 62099680 A JP62099680 A JP 62099680A JP 9968087 A JP9968087 A JP 9968087A JP 2515324 B2 JP2515324 B2 JP 2515324B2
- Authority
- JP
- Japan
- Prior art keywords
- resin
- semiconductor device
- wire
- thin wire
- bonding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45147—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Description
【発明の詳細な説明】 〔発明の目的〕 （産業上の利用分野） 本発明は15〜60μｍの極細銅細線を使用し、かつエポ
キシ樹脂により封止する半導体装置の改良に関するもの
である。DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Application) The present invention relates to an improvement in a semiconductor device using an ultrafine copper wire of 15 to 60 μm and sealing with an epoxy resin.
（従来の技術） いわゆるリードフレームを利用する半導体素子の組立
方式ではこの半導体素子に形成する電極と、リードフレ
ームに設けるアウターリード間を金属細線でボールボン
ディング技術によって電気的に接続後、トランスファー
モールド法によって樹脂封止する手法が採用されている
のは良く知られている通りである。(Prior Art) In a so-called lead frame assembling method of a semiconductor element, electrodes formed on the semiconductor element and outer leads provided on the lead frame are electrically connected by a ball bonding technique with a fine metal wire, and then a transfer molding method is used. It is well known that the method of resin-sealing is adopted.
この金属細線としては一般的に金が適用されていた
が、経済的な観点からAlの使用が始まり、更に前記半導
体素子の電極として適用しているAlもしくは合金層に対
してCu細線は十分なBondabilityが存在することを確認
の上で、実用化の域に到達しているのが現状であり、こ
の為当然ながらCu細線の酸化防止に留意している。Although gold was generally applied as the metal thin wire, the use of Al started from an economical point of view, and the Cu thin wire is sufficient for the Al or alloy layer applied as the electrode of the semiconductor element. After confirming the existence of Bondability, it is the current situation that it has reached the range of practical application. Therefore, of course, attention is paid to the prevention of oxidation of Cu thin wires.
このCu細線の採用は樹脂封止型半導体装置における低
コスト達成に貢献しているものの、最近の厳しいC.D（C
ost Down）に応じて、より安価なCu細線の採用が検討さ
れている。しかし、このCu細線は従来適用していたAu細
線に比較してかなり硬いのでボンディング工程で必要と
する荷重も当然大きくなる。従って、このCu細線をボン
ディングによって接続する電極に隣接する絶縁物層もし
くは半導体基板にクラックが発生し、この対策としては
純度を高めて硬さをAu細線にできるだけ近づける方法が
採用されている。即ち、純度が99.999〜99.9999％の無
酸素銅細線が開発されている。Although the adoption of this Cu thin wire has contributed to the achievement of low cost in resin-sealed semiconductor devices, the recent severe CD (C
According to ost Down), adoption of cheaper Cu thin wire is being considered. However, since this Cu thin wire is considerably harder than the conventionally applied Au thin wire, the load required in the bonding process is naturally large. Therefore, a crack is generated in the insulating layer or the semiconductor substrate adjacent to the electrode to which the Cu thin wire is connected by bonding, and as a countermeasure against this, a method of increasing the purity to bring the hardness as close as possible to the Au thin wire is adopted. That is, oxygen-free copper fine wires with a purity of 99.999 to 99.9999% have been developed.
一方、封止樹脂としては高熱伝導性ならびに高熱膨張
性が必要となり、しかも機械的強度を保持するためにフ
ィラーとしてシリカを70重量％含有させているが、この
伝導性と膨張性を両立させるのが難しい。そこで半導体
装置の特徴を生かすために熱放散性が求められるバイポ
ーラ型素子やパワー素子等では結晶性をシリカをフイラ
ーとして使用する封止樹脂を使用して熱膨張特性を多少
犠牲にしており、逆の場合には溶融性シリカをフィラー
とした封止樹脂を利用している。On the other hand, the sealing resin requires high thermal conductivity and high thermal expansibility, and 70% by weight of silica is contained as a filler in order to maintain mechanical strength. Is difficult. Therefore, in the case of bipolar type elements and power elements, which require heat dissipation to take advantage of the characteristics of semiconductor devices, thermal expansion characteristics are somewhat sacrificed by using a sealing resin that uses silica as a filler for crystallinity. In this case, a sealing resin containing fusible silica as a filler is used.
（発明が解決しようとする問題点） このような高純度無酸素銅細線を使用したボンディン
グ工程及び樹脂封止工程を終えた樹脂封止型半導体装置
は、耐温度サイクル特性に劣る難点がある。この特性試
験とは樹脂封止型半導体装置を−55℃に30分保持後常温
に５分程度置き次に150℃に30分間放置してから再び常
温に約５分間おく。これを１サイクルとして1000〜2000
回程度の繰返しで異常が発生するのが通常であるが、前
述の場合はこれに到達なかった。この封止樹脂として結
晶性シリカをフイラーとして使用したものは熱伝導率λ
＝35×10-4cal/cm・sec・℃、熱膨張率α1＝2.8×10-51
/℃，α2＝7.0×10-51/℃を示し、これを前記樹脂封止
型半導体装置に採用すると耐温度サイクル特性が顕著に
表われて高出力バイポーラICやパワーICへの銅細線適用
に障害となっていた。(Problems to be Solved by the Invention) A resin-encapsulated semiconductor device that has undergone the bonding process and the resin encapsulation process using such a high-purity oxygen-free copper fine wire has a drawback that it is inferior in temperature cycle characteristics. This characteristic test is to hold the resin-encapsulated semiconductor device at −55 ° C. for 30 minutes, put it at room temperature for about 5 minutes, leave it at 150 ° C. for 30 minutes, and then put it again at room temperature for about 5 minutes. This is one cycle and 1000 to 2000
Usually, an abnormality occurs after repeating about once, but this has not been reached in the case described above. This sealing resin using crystalline silica as a filler has a thermal conductivity λ
＝ 35 × 10 -4 cal / cm ・ sec ・ ℃, coefficient of thermal expansion α 1 ＝ 2.8 × 10 -5 1
/ ° C, α 2 = 7.0 × 10 -5 1 / ° C. When this is adopted in the resin-sealed semiconductor device, the temperature cycle characteristics are remarkably exhibited and copper fine wires for high power bipolar ICs and power ICs are shown. It was an obstacle to application.
本発明は上記難点を除去する新規な樹脂封止型半導体
装置に関し、特に断線不良を起し難い金属細線を使用
し、なお耐温度サイクル特性を改善するものである。The present invention relates to a novel resin-encapsulated semiconductor device that eliminates the above-mentioned drawbacks, and in particular, uses a thin metal wire that is unlikely to cause disconnection failure, and still improves the temperature cycle resistance.
（問題点を解決するための手段） この目的を達成するのに本発明は半導体チップに形成
する電極と外部リード間をボンディング工程で接続する
金属細線にリン脱酸銅を適用する。(Means for Solving the Problems) In order to achieve this object, the present invention applies phosphorous deoxidized copper to thin metal wires that connect electrodes formed on a semiconductor chip and external leads in a bonding process.
（作用） 本発明を完成するに先立ち、前記高純度無酸素銅細線
を使用して得られた樹脂封止型半導体装置のうち耐温度
サイクル特性試験によって不良となったものを詳細に調
査した結果、不良品はすべてCu細線の断線不良であ
り、破断箇所は主として半導体チップに設けた電極に
熱圧着で固着したボールのすぐ上のいわゆるボールネッ
ク部であり、この部分はボンディング工程に必要なボ
ールを形成する際にCuxe細線への附加する熱負荷によっ
て結晶粒が阻大化して強度が低下するためと判断した。(Function) Prior to completing the present invention, as a result of detailed investigation of the resin-encapsulated semiconductor device obtained by using the high-purity oxygen-free copper fine wire, the one that has become defective by the temperature cycle characteristic test The defective products are all Cu fine wire disconnection defects, and the breakage is mainly the so-called ball neck part just above the ball fixed by thermocompression bonding to the electrode provided on the semiconductor chip, and this part is the ball necessary for the bonding process. It was determined that the heat load applied to the Cuxe thin wire during the formation of the grains causes the crystal grains to block and the strength to decrease.
この分析結果を基にして実験を重ねた結果、無酸素
銅細線を高純度にすればする程（例えば99.9％→99.999
％→99.9999％）、ボンディング用ボール形成時におけ
る熱の影響によって結晶粒の粗大化が激しくなって再結
晶領域も大きくなる。一方高純度無酸素銅に代えて20
0ppm程度のリンを含むリン脱酸銅細線を採用したとこ
ろ、前記熱負荷に伴う結晶粒の粗大化がかなり抑えら
れ、従って再結晶領域が小さくなることが確認された。As a result of repeated experiments based on this analysis result, the higher the purity of the oxygen-free copper fine wire (for example, 99.9% → 99.999
% → 99.9999%), due to the influence of heat when forming the bonding balls, the crystal grains become coarser and the recrystallized region becomes larger. On the other hand, instead of high-purity oxygen-free copper, 20
It was confirmed that when a phosphorous deoxidized copper thin wire containing about 0 ppm of phosphorus was adopted, the coarsening of crystal grains due to the heat load was considerably suppressed, and thus the recrystallization region was reduced.
前記不良品分析を実施するうちに、前記ボールネック
部の破断以外に、リードフレームのアウターリードとの
熱圧着部に近い細線にも破断現象がみられ、これについ
ても無酸素銅細線を高純度化するにつれてこの熱圧着
部に近い位置の破断現象が増大し、リン脱酸銅細線は
高温時の引張強度が無酸素銅細線より遥かに高くて、前
記破断現象は全く発生しない事実が判明した。While performing the defective product analysis, apart from the breakage of the ball neck part, a breakage phenomenon was also found in a thin wire close to the thermocompression bonding part with the outer lead of the lead frame. The fracture phenomenon near the thermo-compression bonding portion increased with increasing temperature, and the fact that the phosphorus deoxidized copper thin wire had a much higher tensile strength at high temperatures than the oxygen-free copper thin wire, and the fracture phenomenon did not occur at all was found. .
以上の知見からリン脱酸銅細線はもともと結晶組織が
小さく、ボール形成時の熱の影響による結晶粒組織の粗
大化をリンが抑え、かつ粒界強化元素の役割りを果し
て、温度サイクルによるボールネック部等の破断を防止
していると推定できる。From the above findings, the phosphorous deoxidized copper fine wire originally has a small crystal structure, phosphorus suppresses the coarsening of the crystal grain structure due to the influence of heat during ball formation, and plays a role of a grain boundary strengthening element, so that the ball formed by temperature cycling It can be presumed that the neck portion and the like are prevented from breaking.
尚この考案に当っては結晶化シリカをフイラーとして
採用したエポキシ樹脂を封止樹脂として使用し、その含
有量は前述のように70重量％である。In this invention, an epoxy resin having crystallized silica as a filler is used as a sealing resin, and the content thereof is 70% by weight as described above.
本発明は、上記考察に基づいてリン脱酸銅細線を樹脂
封止型半導体装置に採用する。The present invention employs the phosphorous deoxidized copper thin wire in a resin-sealed semiconductor device based on the above consideration.
（実施例） 図にはリン脱酸銅細線を適用した樹脂封止型半導体装
置の一部切欠斜視図を示した。この図から詳細は不明で
あるが、リードフレームとしてはDIPタイプ用もしくは
いわゆる合掌型フレームを使用する。(Example) The figure shows a partially cutaway perspective view of a resin-encapsulated semiconductor device to which a phosphorous deoxidized copper thin wire is applied. Although the details are not clear from this figure, a DIP type or so-called gassho type frame is used as the lead frame.
即ち相対向して配置する金属製枠体（図示せず）を等
間隔で区分して、単位体を構成し、この単位体の中心に
向けてこの金属枠体を起点とするリード端子1,…を設
け、更にこの各単位体の中心にはベッド部２を金属製枠
体に係止する支柱３によって張架するのが通常である。
このベッド部２には半導体素子４をマウンター等によっ
てマウント後この半導体素子４に形成する電極（図示せ
ず）とリード端子１…間を金属細線５によって接続して
電気的な導通を図る。That is, the metal frame bodies (not shown) arranged to face each other are divided at equal intervals to form a unit body, and the lead terminals 1 whose origin is the metal frame body toward the center of the unit body 1, Is provided, and the bed portion 2 is usually stretched at the center of each unit body by a pillar 3 that is locked to a metal frame body.
The semiconductor element 4 is mounted on the bed portion 2 by a mounter or the like, and an electrode (not shown) formed on the semiconductor element 4 and the lead terminals 1 are connected by a thin metal wire 5 to achieve electrical continuity.
この金属細線５としては前述のように約200ppmのリン
を含有するリン脱酸銅製のものを適用するのは前述の通
りであり、又リード端子１…の一部は図のように外部リ
ードとして使用する。この外部リードは通常のようにモ
ールド工程等を終えてからいわゆるCut and Bend工程に
よって折曲げ成形を施して使用機器への着脱を可能とす
る。この金属細線５…を固着する電極は図で半導体素子
４の外周附近に画かれているが、これはパッド部を想定
したものであり、実際には図示しない不純物領域に隣接
して設ける電極に連続しかつこの半導体基板表面を被覆
する絶縁物層に延長する配線に金属細線５をボンディン
グする場合もある。このボンディング工程はいわゆるボ
ールボンディングであり、その加熱手段としては電気ト
ーチを利用する場合と、酸水素焔を利用する場合があ
り、又超音波ボンディングも適用可能である。As described above, the thin metal wire 5 is made of phosphorus deoxidized copper containing about 200 ppm of phosphorus as described above, and some of the lead terminals 1 ... Are used as external leads as shown in the figure. use. This external lead is bendable by the so-called Cut and Bend process after the molding process is completed as usual, and can be attached to and detached from the equipment used. The electrodes to which the metal thin wires 5 are fixed are drawn near the outer periphery of the semiconductor element 4 in the figure. However, this is based on the assumption of a pad portion, and is actually an electrode provided adjacent to an impurity region (not shown). In some cases, the fine metal wire 5 is bonded to a continuous wiring extending to the insulating layer covering the surface of the semiconductor substrate. This bonding step is so-called ball bonding, and as a heating means thereof, there are cases where an electric torch is used and cases where oxyhydrogen flame is used, and ultrasonic bonding is also applicable.
ボンディング工程によって図のようにリン脱酸銅から
なる金属細線５…をリード端子１…に固着後トランスフ
ァーモールド法によって封止樹脂層６を常法に従って被
覆して、半導体素子４を埋設する。As shown in the figure, the metal thin wires 5 made of phosphorous deoxidized copper are fixed to the lead terminals 1 by a bonding step, and then the sealing resin layer 6 is covered by a transfer molding method according to a conventional method to embed the semiconductor element 4.
この封止樹脂としては熱伝導率λ＝37×10-4cal/cm・
sec・℃、熱膨張率係数α1＝2.8×10-51/℃，α2＝7.0
×10-51/℃を示す結晶性シリカをフィラーとして70重量
％含有するエポキシ樹脂を使用する。This sealing resin has a thermal conductivity λ = 37 × 10 -4 cal / cm ・
sec ・ ℃, coefficient of thermal expansion α 1 = 2.8 × 10 -5 1 / ℃, α 2 = 7.0
An epoxy resin containing 70% by weight of crystalline silica having a concentration of × 10 -5 1 / ° C as a filler is used.
この熱膨張係数α1α2は横軸に温度、縦軸に伸びを採
った場合ガラス転移点Tgまでの値をα1それ以後をα2と
し、半導体用としての上限はα1で3.5×10-51/℃，α2
＝9.0×10-51/℃である。このようにして樹脂封止型半
導体装置を完成する。The thermal expansion coefficient alpha 1 alpha 2 is temperature on the horizontal axis, if adopted a longitudinally extending axis values up to the glass transition point Tg alpha 1 and it and thereafter the alpha 2, 3.5 × upper limit is alpha 1 for use with a semiconductor 10 -5 1 / ℃, α 2
= 9.0 × 10 -5 1 / ° C. Thus, the resin-sealed semiconductor device is completed.
第１表に示すようにリン脱酸銅細線を使用してボール
ボンディングを実施しても、ボールネック部等の結晶粒
阻大化を防止でき、かつ高温時の細線強度も高いので温
度サイクル試験においても外部リード側及びボールネッ
ク部での破断が発生せず信頼性の高い安価な半導体装置
が製造できる。 As shown in Table 1, even if ball bonding is performed using phosphorous deoxidized copper fine wire, it is possible to prevent the crystal grains from enlarging at the ball neck part and the strength of the fine wire at high temperature is high. Also in the above, a reliable and inexpensive semiconductor device can be manufactured without breakage on the external lead side and the ball neck portion.
図は本発明に係る樹脂封止型半導体装置の一部切欠斜視
図である。FIG. 1 is a partially cutaway perspective view of a resin-sealed semiconductor device according to the present invention.
Claims (1)
で接続する半導体素子を封止樹脂層に埋設する半導体装
置において、この金属細線にリン脱酸銅を適用すること
を特徴とする樹脂封止型半導体装置。1. A semiconductor device in which a semiconductor element for connecting external leads and element electrodes with a metal thin wire is embedded in a sealing resin layer, wherein phosphorous deoxidized copper is applied to the metal thin wire. Type semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62099680A JP2515324B2 (en) | 1987-04-24 | 1987-04-24 | Resin-sealed semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62099680A JP2515324B2 (en) | 1987-04-24 | 1987-04-24 | Resin-sealed semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63266841A JPS63266841A (en) | 1988-11-02 |
| JP2515324B2 true JP2515324B2 (en) | 1996-07-10 |
Family
ID=14253746
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62099680A Expired - Lifetime JP2515324B2 (en) | 1987-04-24 | 1987-04-24 | Resin-sealed semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2515324B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4482605B1 (en) * | 2009-01-23 | 2010-06-16 | 田中電子工業株式会社 | High purity Cu bonding wire |
-
1987
- 1987-04-24 JP JP62099680A patent/JP2515324B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63266841A (en) | 1988-11-02 |
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| Date | Code | Title | Description |
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| EXPY | Cancellation because of completion of term |