JP2024517581A5 - - Google Patents

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Publication number
JP2024517581A5
JP2024517581A5 JP2023560920A JP2023560920A JP2024517581A5 JP 2024517581 A5 JP2024517581 A5 JP 2024517581A5 JP 2023560920 A JP2023560920 A JP 2023560920A JP 2023560920 A JP2023560920 A JP 2023560920A JP 2024517581 A5 JP2024517581 A5 JP 2024517581A5
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JP
Japan
Prior art keywords
precursor
semiconductor substrate
deposition
exposing
exposure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2023560920A
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English (en)
Japanese (ja)
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JP2024517581A (ja
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Publication date
Application filed filed Critical
Priority claimed from PCT/US2022/071574 external-priority patent/WO2022217240A1/en
Publication of JP2024517581A publication Critical patent/JP2024517581A/ja
Publication of JP2024517581A5 publication Critical patent/JP2024517581A5/ja
Pending legal-status Critical Current

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JP2023560920A 2021-04-07 2022-04-06 コンフォーマルな窒化チタンシリコン系薄膜及びその形成方法 Pending JP2024517581A (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US202163172002P 2021-04-07 2021-04-07
US202163171970P 2021-04-07 2021-04-07
US63/171,970 2021-04-07
US63/172,002 2021-04-07
PCT/US2022/071574 WO2022217240A1 (en) 2021-04-07 2022-04-06 Conformal titanium silicon nitride-based thin films and methods of forming same

Publications (2)

Publication Number Publication Date
JP2024517581A JP2024517581A (ja) 2024-04-23
JP2024517581A5 true JP2024517581A5 (enExample) 2025-03-05

Family

ID=83546628

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2023560921A Active JP7835776B2 (ja) 2021-04-07 2022-04-06 コンフォーマルな窒化チタンシリコン系薄膜及びその形成方法
JP2023560920A Pending JP2024517581A (ja) 2021-04-07 2022-04-06 コンフォーマルな窒化チタンシリコン系薄膜及びその形成方法

Family Applications Before (1)

Application Number Title Priority Date Filing Date
JP2023560921A Active JP7835776B2 (ja) 2021-04-07 2022-04-06 コンフォーマルな窒化チタンシリコン系薄膜及びその形成方法

Country Status (4)

Country Link
JP (2) JP7835776B2 (enExample)
KR (2) KR20230165332A (enExample)
TW (2) TW202307250A (enExample)
WO (2) WO2022217240A1 (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12431388B2 (en) 2019-10-08 2025-09-30 Eugenus, Inc. Conformal titanium silicon nitride-based thin films and methods of forming same
US12444648B2 (en) 2019-10-08 2025-10-14 Eugenus, Inc. Conformal titanium silicon nitride-based thin films and methods of forming same
CN115985764A (zh) * 2022-12-15 2023-04-18 拓荆科技股份有限公司 一种半导体阻挡层的制备方法及阻挡层薄膜

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6911391B2 (en) * 2002-01-26 2005-06-28 Applied Materials, Inc. Integration of titanium and titanium nitride layers
US20040009336A1 (en) 2002-07-11 2004-01-15 Applied Materials, Inc. Titanium silicon nitride (TISIN) barrier layer for copper diffusion
US6784096B2 (en) * 2002-09-11 2004-08-31 Applied Materials, Inc. Methods and apparatus for forming barrier layers in high aspect ratio vias
US7981473B2 (en) * 2003-04-23 2011-07-19 Aixtron, Inc. Transient enhanced atomic layer deposition
JP2005011940A (ja) * 2003-06-18 2005-01-13 Tokyo Electron Ltd 基板処理方法、半導体装置の製造方法および半導体装置
US7833906B2 (en) * 2008-12-11 2010-11-16 Asm International N.V. Titanium silicon nitride deposition
KR101189642B1 (ko) * 2012-04-09 2012-10-12 아익스트론 에스이 원자층 증착법을 이용한 TiSiN 박막의 형성방법
US10355139B2 (en) * 2016-06-28 2019-07-16 Sandisk Technologies Llc Three-dimensional memory device with amorphous barrier layer and method of making thereof
JP6755164B2 (ja) 2016-11-14 2020-09-16 東京エレクトロン株式会社 TiN系膜およびその形成方法
US11942365B2 (en) * 2017-06-02 2024-03-26 Eugenus, Inc. Multi-region diffusion barrier containing titanium, silicon and nitrogen
US11401607B2 (en) * 2017-06-02 2022-08-02 Eugenus, Inc. TiSiN coating method
JP6826173B2 (ja) * 2019-09-17 2021-02-03 株式会社Kokusai Electric 半導体装置の製造方法、基板処理装置およびプログラム

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