JP2024508822A - 電子アセンブリ及びその作製方法 - Google Patents

電子アセンブリ及びその作製方法 Download PDF

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Publication number
JP2024508822A
JP2024508822A JP2023551976A JP2023551976A JP2024508822A JP 2024508822 A JP2024508822 A JP 2024508822A JP 2023551976 A JP2023551976 A JP 2023551976A JP 2023551976 A JP2023551976 A JP 2023551976A JP 2024508822 A JP2024508822 A JP 2024508822A
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JP
Japan
Prior art keywords
electronic assembly
circuit board
layer
metal foil
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2023551976A
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English (en)
Japanese (ja)
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JP2024508822A5 (https=
Inventor
コン，ジウン
ジュ ソ，ジョン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
3M Innovative Properties Co
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3M Innovative Properties Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 3M Innovative Properties Co filed Critical 3M Innovative Properties Co
Publication of JP2024508822A publication Critical patent/JP2024508822A/ja
Publication of JP2024508822A5 publication Critical patent/JP2024508822A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H10W42/20—Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/42—Vias, e.g. via plugs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/435—Cross-sectional shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H10W42/20—Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
    • H10W42/261—Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons characterised by their shapes or dispositions
    • H10W42/276—Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons characterised by their shapes or dispositions the arrangements being on an external surface of the package, e.g. on the outer surface of an encapsulation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/014—Manufacture or treatment using batch processing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/121—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by multiple encapsulations, e.g. by a thin protective coating and a thick encapsulation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H10W74/117—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts

Landscapes

  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Superconductors And Manufacturing Methods Therefor (AREA)
  • Non-Silver Salt Photosensitive Materials And Non-Silver Salt Photography (AREA)
  • Electrochromic Elements, Electrophoresis, Or Variable Reflection Or Absorption Elements (AREA)
JP2023551976A 2021-02-26 2022-01-28 電子アセンブリ及びその作製方法 Pending JP2024508822A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
KR10-2021-0026758 2021-02-26
KR1020210026758A KR20220122296A (ko) 2021-02-26 2021-02-26 전자 어셈블리 및 이를 제조하는 방법
PCT/IB2022/050766 WO2022180461A1 (en) 2021-02-26 2022-01-28 Electronic assembly and method for fabricating the same

Publications (2)

Publication Number Publication Date
JP2024508822A true JP2024508822A (ja) 2024-02-28
JP2024508822A5 JP2024508822A5 (https=) 2025-02-03

Family

ID=83048695

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2023551976A Pending JP2024508822A (ja) 2021-02-26 2022-01-28 電子アセンブリ及びその作製方法

Country Status (4)

Country Link
US (1) US12604737B2 (https=)
JP (1) JP2024508822A (https=)
KR (1) KR20220122296A (https=)
WO (1) WO2022180461A1 (https=)

Citations (3)

* Cited by examiner, † Cited by third party
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US20150380361A1 (en) * 2014-06-26 2015-12-31 Samsung Electronics Co., Ltd. Semiconductor package
US20160204073A1 (en) * 2015-01-09 2016-07-14 Samsung Electronics Co., Ltd. Semiconductor Package and Method of Manufacturing the Same
US20170141081A1 (en) * 2015-11-12 2017-05-18 Amkor Technology, Inc. Semiconductor package and manufacturing method thereof

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US7576415B2 (en) 2007-06-15 2009-08-18 Advanced Semiconductor Engineering, Inc. EMI shielded semiconductor package
US9282630B2 (en) 2012-04-30 2016-03-08 Apple Inc. Method of forming a conformal electromagnetic interference shield
KR20140066518A (ko) 2012-11-23 2014-06-02 삼성전자주식회사 반도체 장치 및 그 제조 방법
US9484313B2 (en) 2013-02-27 2016-11-01 Advanced Semiconductor Engineering, Inc. Semiconductor packages with thermal-enhanced conformal shielding and related methods
US9461025B2 (en) 2013-03-12 2016-10-04 Taiwan Semiconductor Manfacturing Company, Ltd. Electric magnetic shielding structure in packages
US9337073B2 (en) 2013-03-12 2016-05-10 Taiwan Semiconductor Manufacturing Company, Ltd. 3D shielding case and methods for forming the same
US9269673B1 (en) * 2014-10-22 2016-02-23 Advanced Semiconductor Engineering, Inc. Semiconductor device packages
US10586746B2 (en) 2016-01-14 2020-03-10 Chip Solutions, LLC Semiconductor device and method
US9907179B2 (en) * 2016-04-25 2018-02-27 Tdk Corporation Electronic circuit package
KR101858952B1 (ko) 2016-05-13 2018-05-18 주식회사 네패스 반도체 패키지 및 이의 제조 방법
KR101896435B1 (ko) 2016-11-09 2018-09-07 엔트리움 주식회사 전자파차폐용 전자부품 패키지 및 그의 제조방법
TWI612638B (zh) * 2017-01-25 2018-01-21 Siliconware Precision Industries Co., Ltd. 電子封裝件及其製法
KR101824726B1 (ko) * 2017-02-23 2018-02-01 앰코 테크놀로지 코리아 주식회사 반도체 패키지
US10388611B2 (en) * 2017-03-13 2019-08-20 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming magnetic field shielding with ferromagnetic material
US10332862B2 (en) * 2017-09-07 2019-06-25 Advanced Semiconductor Engineering, Inc. Semiconductor package structure and method for manufacturing the same
KR101905333B1 (ko) 2017-10-19 2018-10-05 앰코테크놀로지코리아(주) 반도체 디바이스
KR102504293B1 (ko) * 2017-11-29 2023-02-27 삼성전자 주식회사 패키지 온 패키지 형태의 반도체 패키지
JP6590327B2 (ja) 2018-02-22 2019-10-16 サムソン エレクトロ−メカニックス カンパニーリミテッド． コイル部品
KR102047604B1 (ko) 2018-02-22 2019-11-21 삼성전기주식회사 코일 부품
US10937741B2 (en) * 2018-11-16 2021-03-02 STATS ChipPAC Pte. Ltd. Molded laser package with electromagnetic interference shield and method of making
DE102019202718B4 (de) * 2019-02-28 2020-12-24 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Dünnes Dual-Folienpackage und Verfahren zum Herstellen desselben
KR102212079B1 (ko) 2019-03-22 2021-02-04 쓰리엠 이노베이티브 프로퍼티즈 캄파니 전자 어셈블리, 이를 포함하는 전자 장치 및 전자 어셈블리를 제작하는 방법

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150380361A1 (en) * 2014-06-26 2015-12-31 Samsung Electronics Co., Ltd. Semiconductor package
US20160204073A1 (en) * 2015-01-09 2016-07-14 Samsung Electronics Co., Ltd. Semiconductor Package and Method of Manufacturing the Same
US20170141081A1 (en) * 2015-11-12 2017-05-18 Amkor Technology, Inc. Semiconductor package and manufacturing method thereof

Also Published As

Publication number Publication date
US20240063139A1 (en) 2024-02-22
KR20220122296A (ko) 2022-09-02
US12604737B2 (en) 2026-04-14
WO2022180461A1 (en) 2022-09-01

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