JP2023067828A - 集積回路、集積回路をテストするテスト装置および方法 - Google Patents

集積回路、集積回路をテストするテスト装置および方法 Download PDF

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Publication number
JP2023067828A
JP2023067828A JP2022172369A JP2022172369A JP2023067828A JP 2023067828 A JP2023067828 A JP 2023067828A JP 2022172369 A JP2022172369 A JP 2022172369A JP 2022172369 A JP2022172369 A JP 2022172369A JP 2023067828 A JP2023067828 A JP 2023067828A
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Japan
Prior art keywords
path
logic
input
multiplexer
integrated circuit
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Pending
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JP2022172369A
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Japanese (ja)
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JP2023067828A5 (https=
Inventor
キリアン トビアス
Kilian Tobias
フーフ マルティン
Huch Martin
アーレンス ハイコ
Ahrens Heiko
ティレ ダニエル
Tille Daniel
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Infineon Technologies AG
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Infineon Technologies AG
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Publication of JP2023067828A publication Critical patent/JP2023067828A/ja
Publication of JP2023067828A5 publication Critical patent/JP2023067828A5/ja
Pending legal-status Critical Current

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30—Marginal testing, e.g. by varying supply voltage
    • G01R31/3016—Delay or race condition test, e.g. race hazard test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318572—Input/Output interfaces
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2855—Environmental, reliability or burn-in testing
    • G01R31/2856—Internal circuit aspects, e.g. built-in test features; Test chips; Measuring material aspects, e.g. electro migration [EM]
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318522—Test of Sequential circuits
    • G01R31/318525—Test of flip-flops or latches
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318536—Scan chain arrangements, e.g. connections, test bus, analog signals
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318544—Scanning methods, algorithms and patterns
    • G01R31/31855—Interconnection testing, e.g. crosstalk, shortcircuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/03—Astable circuits
    • H03K3/0315—Ring oscillators
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318594—Timing aspects

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Environmental & Geological Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
JP2022172369A 2021-10-29 2022-10-27 集積回路、集積回路をテストするテスト装置および方法 Pending JP2023067828A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102021128331.0A DE102021128331B3 (de) 2021-10-29 2021-10-29 Integrierte schaltung, testanordnung und verfahren zum testen einer integrierten schaltung
DE102021128331.0 2021-10-29

Publications (2)

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JP2023067828A true JP2023067828A (ja) 2023-05-16
JP2023067828A5 JP2023067828A5 (https=) 2025-07-17

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JP2022172369A Pending JP2023067828A (ja) 2021-10-29 2022-10-27 集積回路、集積回路をテストするテスト装置および方法

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Country Link
US (1) US12055587B2 (https=)
JP (1) JP2023067828A (https=)
DE (1) DE102021128331B3 (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102021123889B3 (de) * 2021-09-15 2023-02-16 Infineon Technologies Ag Integrierte schaltung, testanordnung und verfahren zum testen einer integrierten schaltung
DE102021128331B3 (de) * 2021-10-29 2023-03-23 Infineon Technologies Ag Integrierte schaltung, testanordnung und verfahren zum testen einer integrierten schaltung
US11879942B1 (en) * 2022-08-31 2024-01-23 Micron Technology, Inc. Core and interface scan testing architecture and methodology
CN119270040A (zh) * 2023-06-30 2025-01-07 深圳市中兴微电子技术有限公司 芯片及电子设备

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001074813A (ja) * 1999-09-06 2001-03-23 Toshiba Corp 機能ブロック及び機能ブロックの周波数測定回路
JP2002181901A (ja) * 2000-12-15 2002-06-26 Nec Eng Ltd 半導体集積回路
JP2004214684A (ja) * 2003-01-07 2004-07-29 Samsung Electronics Co Ltd スピードビニングテスト回路、半導体装置、及び半導体装置のスピードビニングテスト方法
US20050248415A1 (en) * 2004-05-06 2005-11-10 Mauro Osvaldella Ring oscillator circuit
US20170030967A1 (en) * 2015-07-28 2017-02-02 International Business Machines Corporation Performance-screen ring oscillator (psro) using an integrated circuit test signal distribution network

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0989980A (ja) 1995-09-28 1997-04-04 Nec Corp 半導体集積回路およびその評価方法
FR2912842B1 (fr) * 2007-02-19 2009-05-08 St Microelectronics Sa Circuit integre comprenant un mode de test de performance
EP1967860A1 (en) * 2007-03-08 2008-09-10 Matsushita Electric Industrial Co., Ltd. Ring oscillator
US8560980B2 (en) 2010-11-16 2013-10-15 International Business Machines Corporation Optimal chip acceptance criterion and its applications
US9081991B2 (en) 2011-03-23 2015-07-14 Polytechnic Institute Of New York University Ring oscillator based design-for-trust
FR2996005A1 (fr) * 2012-09-21 2014-03-28 Stmicroeletronics Sa Procede de conception d'un circuit electronique
US9188643B2 (en) 2012-11-13 2015-11-17 Globalfoundries Inc. Flexible performance screen ring oscillator within a scan chain
US9097765B1 (en) 2014-05-08 2015-08-04 International Business Machines Corporation Performance screen ring oscillator formed from multi-dimensional pairings of scan chains
US9501604B1 (en) 2014-09-23 2016-11-22 Xilinx, Inc. Testing critical paths of a circuit design
US9897653B2 (en) * 2016-03-16 2018-02-20 Stmicroelectronics (Grenoble 2) Sas Scan chain circuit supporting logic self test pattern injection during run time
DE102021123889B3 (de) * 2021-09-15 2023-02-16 Infineon Technologies Ag Integrierte schaltung, testanordnung und verfahren zum testen einer integrierten schaltung
DE102021128331B3 (de) * 2021-10-29 2023-03-23 Infineon Technologies Ag Integrierte schaltung, testanordnung und verfahren zum testen einer integrierten schaltung

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001074813A (ja) * 1999-09-06 2001-03-23 Toshiba Corp 機能ブロック及び機能ブロックの周波数測定回路
JP2002181901A (ja) * 2000-12-15 2002-06-26 Nec Eng Ltd 半導体集積回路
JP2004214684A (ja) * 2003-01-07 2004-07-29 Samsung Electronics Co Ltd スピードビニングテスト回路、半導体装置、及び半導体装置のスピードビニングテスト方法
US20050248415A1 (en) * 2004-05-06 2005-11-10 Mauro Osvaldella Ring oscillator circuit
US20170030967A1 (en) * 2015-07-28 2017-02-02 International Business Machines Corporation Performance-screen ring oscillator (psro) using an integrated circuit test signal distribution network

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US12055587B2 (en) 2024-08-06
DE102021128331B3 (de) 2023-03-23
US20230138651A1 (en) 2023-05-04

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