JP2022549067A5 - - Google Patents

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Publication number
JP2022549067A5
JP2022549067A5 JP2022513260A JP2022513260A JP2022549067A5 JP 2022549067 A5 JP2022549067 A5 JP 2022549067A5 JP 2022513260 A JP2022513260 A JP 2022513260A JP 2022513260 A JP2022513260 A JP 2022513260A JP 2022549067 A5 JP2022549067 A5 JP 2022549067A5
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JP
Japan
Prior art keywords
layer
photoresist
substrate
forming
side wall
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Granted
Application number
JP2022513260A
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English (en)
Japanese (ja)
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JP2022549067A (ja
JP7508071B2 (ja
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Priority claimed from PCT/US2020/052771 external-priority patent/WO2021062188A1/en
Publication of JP2022549067A publication Critical patent/JP2022549067A/ja
Publication of JP2022549067A5 publication Critical patent/JP2022549067A5/ja
Application granted granted Critical
Publication of JP7508071B2 publication Critical patent/JP7508071B2/ja
Active legal-status Critical Current
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JP2022513260A 2019-09-25 2020-09-25 基板のパターン化処理 Active JP7508071B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201962905604P 2019-09-25 2019-09-25
US62/905,604 2019-09-25
PCT/US2020/052771 WO2021062188A1 (en) 2019-09-25 2020-09-25 Patterning a substrate

Publications (3)

Publication Number Publication Date
JP2022549067A JP2022549067A (ja) 2022-11-24
JP2022549067A5 true JP2022549067A5 (https=) 2023-09-14
JP7508071B2 JP7508071B2 (ja) 2024-07-01

Family

ID=74881943

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2022513260A Active JP7508071B2 (ja) 2019-09-25 2020-09-25 基板のパターン化処理

Country Status (6)

Country Link
US (2) US11782346B2 (https=)
JP (1) JP7508071B2 (https=)
KR (1) KR102868381B1 (https=)
CN (1) CN114424321B (https=)
TW (1) TWI837423B (https=)
WO (1) WO2021062188A1 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7516200B2 (ja) * 2020-10-09 2024-07-16 株式会社東芝 エッチング方法、半導体チップの製造方法及び物品の製造方法
WO2023028243A1 (en) * 2021-08-25 2023-03-02 Geminatio, Inc. Narrow line cut masking process

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04338959A (ja) * 1991-05-01 1992-11-26 Dainippon Printing Co Ltd パターンの形成方法
JPH0982596A (ja) * 1995-09-12 1997-03-28 Toshiba Corp パターン形成方法
JPH09258451A (ja) * 1996-03-18 1997-10-03 Toshiba Corp 感光性樹脂膜パターンの形成方法及び半導体装置の製造方法
JP2003140352A (ja) * 2001-11-05 2003-05-14 Toshiba Corp 反射防止膜、これを用いたレジストパターン形成方法および半導体装置の製造方法
JP2004093652A (ja) * 2002-08-29 2004-03-25 Seiko Epson Corp レジストパターンの形成方法および半導体装置の製造方法
JP4246578B2 (ja) * 2003-09-05 2009-04-02 ヤマハ株式会社 微小構造体の製法
JP3857692B2 (ja) * 2004-01-15 2006-12-13 株式会社東芝 パターン形成方法
KR101310911B1 (ko) * 2006-06-08 2013-09-25 엘지디스플레이 주식회사 평판 표시장치용 폴리실리콘 박막 트랜지스터 기판의제조방법
US8852851B2 (en) * 2006-07-10 2014-10-07 Micron Technology, Inc. Pitch reduction technology using alternating spacer depositions during the formation of a semiconductor device and systems including same
KR100983724B1 (ko) * 2007-12-20 2010-09-24 주식회사 하이닉스반도체 반도체 소자의 형성 방법
JP2010283095A (ja) * 2009-06-04 2010-12-16 Hitachi Ltd 半導体装置の製造方法
NL2004545A (en) * 2009-06-09 2010-12-13 Asml Netherlands Bv Lithographic method and arrangement
US20110294075A1 (en) * 2010-05-25 2011-12-01 United Microelectronics Corp. Patterning method
KR20120063390A (ko) * 2010-12-07 2012-06-15 에스케이하이닉스 주식회사 반도체 소자의 제조 방법
US8901016B2 (en) * 2010-12-28 2014-12-02 Asm Japan K.K. Method of forming metal oxide hardmask
US9085045B2 (en) * 2011-11-04 2015-07-21 Tokyo Electron Limited Method and system for controlling a spike anneal process
KR101434660B1 (ko) * 2012-12-18 2014-08-28 금호석유화학 주식회사 신규 흡광제 및 이를 포함하는 유기 반사 방지막 형성용 조성물
JP6126961B2 (ja) * 2013-09-30 2017-05-10 富士フイルム株式会社 パターン形成方法、パターンマスクの形成方法及び電子デバイスの製造方法
US10020195B2 (en) * 2014-02-25 2018-07-10 Tokyo Electron Limited Chemical amplification methods and techniques for developable bottom anti-reflective coatings and dyed implant resists
KR20160144146A (ko) * 2015-06-08 2016-12-16 삼성전자주식회사 반도체 장치의 패턴 형성 방법
US10354873B2 (en) * 2016-06-08 2019-07-16 Tokyo Electron Limited Organic mandrel protection process
US10446394B2 (en) * 2018-01-26 2019-10-15 Lam Research Corporation Spacer profile control using atomic layer deposition in a multiple patterning process

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