JP2022526748A5 - - Google Patents

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Publication number
JP2022526748A5
JP2022526748A5 JP2021556496A JP2021556496A JP2022526748A5 JP 2022526748 A5 JP2022526748 A5 JP 2022526748A5 JP 2021556496 A JP2021556496 A JP 2021556496A JP 2021556496 A JP2021556496 A JP 2021556496A JP 2022526748 A5 JP2022526748 A5 JP 2022526748A5
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JP
Japan
Prior art keywords
measurement
parameter
positional
positional displacement
displacement measurement
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JP2021556496A
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English (en)
Japanese (ja)
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JP2022526748A (ja
JP7177949B2 (ja
JPWO2020190318A5 (https=
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Priority claimed from PCT/US2019/047797 external-priority patent/WO2020190318A1/en
Publication of JP2022526748A publication Critical patent/JP2022526748A/ja
Publication of JPWO2020190318A5 publication Critical patent/JPWO2020190318A5/ja
Publication of JP2022526748A5 publication Critical patent/JP2022526748A5/ja
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JP2021556496A 2019-03-21 2019-08-23 半導体デバイスにおけるパラメタ安定位置ずれ計測改善 Active JP7177949B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201962821596P 2019-03-21 2019-03-21
US62/821,596 2019-03-21
PCT/US2019/047797 WO2020190318A1 (en) 2019-03-21 2019-08-23 Parameter-stable misregistration measurement amelioration in semiconductor devices

Publications (4)

Publication Number Publication Date
JP2022526748A JP2022526748A (ja) 2022-05-26
JPWO2020190318A5 JPWO2020190318A5 (https=) 2022-08-25
JP2022526748A5 true JP2022526748A5 (https=) 2022-08-25
JP7177949B2 JP7177949B2 (ja) 2022-11-24

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JP2021556496A Active JP7177949B2 (ja) 2019-03-21 2019-08-23 半導体デバイスにおけるパラメタ安定位置ずれ計測改善

Country Status (6)

Country Link
US (1) US11101153B2 (https=)
JP (1) JP7177949B2 (https=)
KR (1) KR102509764B1 (https=)
CN (1) CN113574643B (https=)
TW (1) TWI845639B (https=)
WO (1) WO2020190318A1 (https=)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102817032B1 (ko) 2020-04-05 2025-06-04 케이엘에이 코포레이션 웨이퍼 틸트가 오정합 측정에 끼친 영향을 보정하기 시스템 및 방법
US12165930B2 (en) 2021-06-03 2024-12-10 Kla Corporation Adaptive modeling misregistration measurement system and method
TWI833185B (zh) * 2022-01-04 2024-02-21 南亞科技股份有限公司 疊置誤差的校正方法及半導體元件的製備方法
US12002765B2 (en) 2022-01-04 2024-06-04 Nanya Technology Corporation Marks for overlay measurement and overlay error correction
US11796924B2 (en) 2022-01-04 2023-10-24 Nanya Technology Corporation Method for overlay error correction and method for manufacturing a semiconductor device structure with overlay marks
US12487533B2 (en) 2024-01-25 2025-12-02 Kla Corporation Amplitude asymmetry measurements in overlay metrology

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6064486A (en) * 1998-05-21 2000-05-16 Leland Stanford Junior University Systems, methods and computer program products for detecting the position of a new alignment mark on a substrate based on fitting to sample alignment signals
US6281027B1 (en) * 1999-09-15 2001-08-28 Therma-Wave Inc Spatial averaging technique for ellipsometry and reflectometry
US6462818B1 (en) * 2000-06-22 2002-10-08 Kla-Tencor Corporation Overlay alignment mark design
TW569368B (en) * 2001-11-14 2004-01-01 Tokyo Electron Ltd Substrate inspecting apparatus, coating and developing apparatus, and substrate inspecting method
EP1512112A4 (en) * 2002-06-05 2006-11-02 Kla Tencor Tech Corp USE OF OVERLAY DIAGNOSIS FOR ADVANCED AUTOMATIC PROCESS CONTROL
JP4072465B2 (ja) * 2003-06-19 2008-04-09 キヤノン株式会社 位置検出方法
WO2005098686A2 (en) * 2004-04-02 2005-10-20 Clear Shape Technologies, Inc. Modeling resolution enhancement processes in integrated circuit fabrication
US20070099097A1 (en) * 2005-11-03 2007-05-03 Samsung Electronics Co., Ltd. Multi-purpose measurement marks for semiconductor devices, and methods, systems and computer program products for using same
CN101063661B (zh) * 2006-04-29 2010-05-12 中芯国际集成电路制造(上海)有限公司 利用微影区域迭对测量仪监控硅单晶外延层层错状况的方法
TWI416096B (zh) * 2007-07-11 2013-11-21 Nova Measuring Instr Ltd 用於監控圖案化結構的性質之方法及系統
US7873585B2 (en) * 2007-08-31 2011-01-18 Kla-Tencor Technologies Corporation Apparatus and methods for predicting a semiconductor parameter across an area of a wafer
US8214771B2 (en) * 2009-01-08 2012-07-03 Kla-Tencor Corporation Scatterometry metrology target design optimization
CN105074896B (zh) * 2013-02-20 2018-04-27 株式会社日立高新技术 图案测定装置以及半导体测量系统
US10296554B2 (en) * 2013-03-01 2019-05-21 Nanometrics Incorporated Correction of angular error of plane-of-incidence azimuth of optical metrology device
CN103398666B (zh) * 2013-05-27 2015-12-23 电子科技大学 一种用于双层周期性微结构的层间错位测试方法
US9383661B2 (en) * 2013-08-10 2016-07-05 Kla-Tencor Corporation Methods and apparatus for determining focus
WO2015031337A1 (en) * 2013-08-27 2015-03-05 Kla-Tencor Corporation Removing process-variation-related inaccuracies from scatterometry measurements
US10152654B2 (en) * 2014-02-20 2018-12-11 Kla-Tencor Corporation Signal response metrology for image based overlay measurements
TWI715582B (zh) * 2015-05-19 2021-01-11 美商克萊譚克公司 用於疊對測量之形貌相位控制
US10504759B2 (en) * 2016-04-04 2019-12-10 Kla-Tencor Corporation Semiconductor metrology with information from multiple processing steps

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